Patents by Inventor Chia-Hung Huang

Chia-Hung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170194162
    Abstract: A semiconductor manufacturing equipment includes a processing chamber, at least one reflector and at least one electromagnetic wave emitting device. The reflector is present in the processing chamber. The electromagnetic wave emitting device is present between the reflector and a wafer in the processing chamber. The electromagnetic wave emitting device is configured to emit a spectrum of electromagnetic wave to the wafer. The reflector has a relative reflectance to Al2O3 with respect to the spectrum of electromagnetic wave, and the relative reflectance of the reflector is in a range from about 70% to about 120%.
    Type: Application
    Filed: January 5, 2016
    Publication date: July 6, 2017
    Inventors: Hsin-Chih LIU, Chia-Hung HUANG, Jen-Chung CHEN, Tung-Ching TSENG
  • Patent number: 9691641
    Abstract: An apparatus for cleaning wafers includes a chamber, a rotatable substrate holder inside the chamber, a nozzle above the rotatable substrate holder, a cover facing downward and fluidly coupled with the nozzle. The rotatable substrate holder is configured to mount one or more semiconductor wafers on the rotatable substrate holder. The nozzle is configured to spray a cleaning medium onto the one or more semiconductor wafers. The cover is of a shape having a top edge with a top cross-sectional area and a bottom edge with a bottom cross-sectional area.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: June 27, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Hung Huang, Jeng-Jyi Hwang, Chi-Ming Yang
  • Publication number: 20170153045
    Abstract: A solar absorption structure including a base, a reflective layer, a light interference layer and an absorption layer is provided. The reflective layer is disposed on the base, wherein a material of the reflective layer includes metallic glass. The light interference layer is disposed on the reflective layer, and the reflective layer is located between the base and the light interference layer. The absorption layer is disposed on the light interference layer, wherein the light interference layer is located between the reflective layer and the absorption layer, and a material of the absorption layer includes metallic glass.
    Type: Application
    Filed: November 27, 2015
    Publication date: June 1, 2017
    Inventors: Yu-Lin Chung, Kuang-Kuo Wang, Chia-Hung Huang, Ho-Chung Fu
  • Patent number: 9653648
    Abstract: An LED die includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a transparent conductive layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, the second semiconductor layer and the transparent conductive layer are successively formed on the substrate. The first electrode and the second electrode respectively is formed on the first semiconductor layer and the transparent conductive layer. A plurality of grooves defined on the first semiconductor layer, and a plurality of hole groups defined on the second semiconductor layer. The present disclosure also provides a method of manufacturing the LED die.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: May 16, 2017
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Chia-Hung Huang, Ching-Hsueh Chiu, Shun-Kuei Yang, Po-Min Tu, Shih-Cheng Huang
  • Publication number: 20170104213
    Abstract: The present invention provides a method for manufacturing a negative plate of a secondary battery, which includes the following steps: providing multiple sheets of functional graphene; compressing the functional graphene to form a graphene target; providing copper foil, and forming a microstructure on a surface of the copper foil, so as to strengthen attachment between a graphene layer and the copper foil; depositing the graphene target on the microstructure of the surface of the copper foil, to form the graphene layer; and repairing the graphene layer by using an excimer laser. The foregoing manufacturing method can greatly prolong a cycle life of the whole graphene cathode, and increase a reversible capacitance of a battery.
    Type: Application
    Filed: December 15, 2015
    Publication date: April 13, 2017
    Inventors: Chia-Hung HUANG, Sung-Mao CHIU, Chi-Wen CHU, Yin CHUANG, Chun-Chieh WANG, Chia-Min WEI
  • Patent number: 9449864
    Abstract: A system for orienting a semiconductor wafer. The system includes a wafer retaining device configured to retain a semiconductor wafer, a light source configured to emit light toward an edge exclusion area of the wafer, and a lens configured to direct and focus light emitted from the light source at a subsurface first part of a first portion of the wafer to alter a crystalline structure of the subsurface first part and form a subsurface mark that is detectable using light of a predetermined wavelength, a predetermined transmittance through the wafer, and at a predetermined reflectance angle relative to an axis of rotation of the wafer and based on the predetermined wavelength.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Ming Lin, Wan-Lai Chen, Chia-Hung Huang, Chi-Ming Yang, Chin-Hsiang Lin
  • Patent number: 9359210
    Abstract: A method for manufacturing a graphene layer includes performing a sputtering process to form a graphite layer on a substrate, and performing a lithography process on the graphite layer for thinning the graphite layer and thereafter making the graphite layer thinned to become a graphene layer.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: June 7, 2016
    Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Chia-Hung Huang, Sung-Mao Chiu, Chung-Jen Chung, Bo-Hsiung Wu
  • Publication number: 20160064605
    Abstract: An LED die includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a transparent conductive layer, a first electrode and a second electrode. The first semiconductor layer, the active layer, the second semiconductor layer and the transparent conductive layer are successively formed on the substrate. The first electrode and the second electrode respectively is formed on the first semiconductor layer and the transparent conductive layer. A plurality of grooves defined on the first semiconductor layer, and a plurality of hole groups defined on the second semiconductor layer. The present disclosure also provides a method of manufacturing the LED die.
    Type: Application
    Filed: August 6, 2015
    Publication date: March 3, 2016
    Inventors: CHIA-HUNG HUANG, CHING-HSUEH CHIU, SHUN-KUEI YANG, PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20160064613
    Abstract: A light emitting diode includes a first electrode, a second electrode and an epitaxial structure. The epitaxial structure is arranged on the first electrode, and electrically connects with the first electrode and the second electrode. The second electrode surrounds periphery of the epitaxial structure to reflect light from the epitaxial structure to emit out from the top of the epitaxial structure. This disclosure also relates to a method for manufacturing the light emitting diode. The light emitting diode and the method help solve the problem of low light efficiency of the light emitting diode.
    Type: Application
    Filed: August 11, 2015
    Publication date: March 3, 2016
    Inventors: CHING-HSUEH CHIU, CHIA-HUNG HUANG, YA-WEN LIN, PO-MIN TU, SHIH-CHENG HUANG
  • Publication number: 20150265917
    Abstract: A game apparatus having an attack apparatus, a wearable apparatus and a communication apparatus is provided. The communication apparatus determines a property of the attack apparatus according to an attack signal sensed by the wearable apparatus and adjusts a status prompt signal emitted by the wearable apparatus according to the property of the attack apparatus.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 24, 2015
    Inventors: Chia-Han Chang, Chia-Hung Huang, Mark Junren Wiener
  • Patent number: 9040328
    Abstract: A manufacturing method for an LED includes providing a substrate having a buffer layer and a first N-type epitaxial layer, forming a blocking layer on the first N-type epitaxial layer, and etching the blocking layer to form patterned grooves penetrating the blocking layer to the first N-type epitaxial layer. A second N-type epitaxial layer is then formed on the blocking layer to contact the first N-type epitaxial layer; a light emitting layer, a P-type epitaxial layer and a conductive layer are thereafter disposed on the second N-type epitaxial layer; an N-type electrode is formed to electrically connect with the first N-type epitaxial layer, and a P-type electrode is formed on the conductive layer. The N-type electrode is disposed on the blocking layer and separated from the second N-type epitaxial layer and has a portion extending into the patterned grooves to contact the first N-type epitaxial layer.
    Type: Grant
    Filed: May 4, 2014
    Date of Patent: May 26, 2015
    Assignee: Zhongshan Innocloud Intellectual Property Services Co., Ltd.
    Inventors: Ya-Wen Lin, Shih-Cheng Huang, Po-Min Tu, Chia-Hung Huang, Shun-Kuei Yang
  • Publication number: 20150114821
    Abstract: A method for modifying properties of graphene includes a graphene film provision step and a modification step. In the graphene film provision step, a graphene film is provided, and the graphene is formed on a substrate. In the modification step, the graphene film is placed in a vacuum environment and radiated by an electron beam to obtain a graphene material.
    Type: Application
    Filed: April 1, 2014
    Publication date: April 30, 2015
    Applicant: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTRE
    Inventors: Chia-Hung Huang, Chi-Wen Chu, Sung-Mao Chiu, Chun-Chieh Wang, Chia-Min Wei, Chung-Jen Chung, Bo-Hsiung Wu
  • Patent number: 8987025
    Abstract: A manufacturing method for an LED (light emitting diode) includes following steps: providing a substrate; disposing a transitional layer on the substrate, the transitional layer comprising a planar area with a flat top surface and a patterned area with a rugged top surface; coating an aluminum layer on the transitional layer; using a nitriding process on the aluminum layer to form an AlN material on the transitional layer; disposing an epitaxial layer on the transitional layer and covering the AlN material, the epitaxial layer contacting the planar area and the patterned area of the transitional layer, a plurality of gaps being defined between the epitaxial layer and the slugs of the second part of the AlN material in the patterned area of the transitional layer.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: March 24, 2015
    Assignee: Zhongshan Innocloud Intellectual Property Services Co., Ltd.
    Inventors: Chia-Hung Huang, Shih-Cheng Huang, Po-Min Tu, Ya-Wen Lin, Shun-Kuei Yang
  • Patent number: 8946737
    Abstract: A light emitting diode (LED) includes a substrate, a buffer layer and an epitaxial structure. The substrate has a first surface with a patterning structure formed thereon. The patterning structure includes a plurality of projections. The buffer layer is arranged on the first surface of the substrate. The epitaxial structure is arranged on the buffer layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer arranged on the buffer layer in sequence. The first semiconductor layer has a second surface attached to the active layer. A distance between a peak of each the projections and the second surface of the first semiconductor layer is ranged from 0.5 ?m to 2.5 ?m.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: February 3, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang, Chia-Hung Huang, Shun-Kuei Yang
  • Publication number: 20150009499
    Abstract: A system for orienting a semiconductor wafer. The system includes a wafer retaining device configured to retain a semiconductor wafer, a light source configured to emit light toward an edge exclusion area of the wafer, and a lens configured to direct and focus light emitted from the light source at a subsurface first part of a first portion of the wafer to alter a crystalline structure of the subsurface first part and form a subsurface mark that is detectable using light of a predetermined wavelength, a predetermined transmittance through the wafer, and at a predetermined reflectance angle relative to an axis of rotation of the wafer and based on the predetermined wavelength.
    Type: Application
    Filed: September 24, 2014
    Publication date: January 8, 2015
    Inventors: Chin-Ming LIN, Wan-Lai CHEN, Chia-Hung HUANG, Chi-Ming YANG, Chin-Hsiang LIN
  • Patent number: 8916400
    Abstract: A light emitting diode (LED) comprises a substrate, an epitaxial layer and an aluminum nitride (AlN) layer sequentially disposed on the substrate. The AlN layer comprises a plurality of stacks separated from each other, wherein the epitaxial layer entirely covers the plurality of stacks of the AlN layer. The AlN layer with a plurality of stacks reflects upwardly light generated by the epitaxial layer and downwardly toward the substrate to an outside of LED through a top plan of the LED. A method for forming the LED is also disclosed.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: December 23, 2014
    Assignee: Advanced Optoelectronics Technology, Inc.
    Inventors: Chia-Hung Huang, Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Ya-Wen Lin
  • Patent number: 8871605
    Abstract: A method of orienting a semiconductor wafer. The method includes rotating a wafer about a central axis; exposing a plurality of edge portions of the rotating wafer to light having a predetermined wavelength from one or more light sources; detecting a subsurface mark in one of the plurality of edge portions of the rotating wafer; and orienting the wafer using the detected subsurface mark as a reference.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: October 28, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Ming Lin, Wan-Lai Chen, Chia-Hung Huang, Chi-Ming Yang, Chin-Hsiang Lin
  • Publication number: 20140311894
    Abstract: A method for manufacturing a graphene layer includes performing a sputtering process to form a graphite layer on a substrate, and performing a lithography process on the graphite layer for thinning the graphite layer and thereafter making the graphite layer thinned to become a graphene layer.
    Type: Application
    Filed: July 11, 2013
    Publication date: October 23, 2014
    Inventors: Chia-Hung Huang, Sung-Mao Chiu, Chung-Jen Chung, Bo-Hsiung Wu
  • Patent number: 8843860
    Abstract: A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: September 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Ming Lin, Chia-hung Huang, Chi-Ming Yang, Chin-Hsiang Lin, Yung-Cheng Chen, Chih-Wei Lin
  • Publication number: 20140242738
    Abstract: A manufacturing method for an LED includes providing a substrate having a buffer layer and a first N-type epitaxial layer, forming a blocking layer on the first N-type epitaxial layer, and etching the blocking layer to form patterned grooves penetrating the blocking layer to the first N-type epitaxial layer. A second N-type epitaxial layer is then formed on the blocking layer to contact the first N-type epitaxial layer; a light emitting layer, a P-type epitaxial layer and a conductive layer are thereafter disposed on the second N-type epitaxial layer; an N-type electrode is formed to electrically connect with the first N-type epitaxial layer, and a P-type electrode is formed on the conductive layer. The N-type electrode is disposed on the blocking layer and separated from the second N-type epitaxial layer and has a portion extending into the patterned grooves to contact the first N-type epitaxial layer.
    Type: Application
    Filed: May 4, 2014
    Publication date: August 28, 2014
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: YA-WEN LIN, SHIH-CHENG HUANG, PO-MIN TU, CHIA-HUNG HUANG, SHUN-KUEI YANG