Patents by Inventor Chia-Hung Huang

Chia-Hung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8629534
    Abstract: A semiconductor structure includes a Si substrate, a supporting layer and a blocking layer formed on the substrate and an epitaxy layer formed on the supporting layer. The supporting layer defines a plurality of grooves therein to receive the blocking layer. The epitaxy layer is grown from the supporting layer. A plurality of slots is defined in the epitaxy layer and over the blocking layer. The epitaxy layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: January 14, 2014
    Assignee: Advanced Optoelectronics Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • Patent number: 8604503
    Abstract: A light emitting diode includes a substrate, a transitional layer on the substrate and an epitaxial layer on the transitional layer. The transitional layer includes a planar area with a flat top surface and a patterned area with a rugged top surface. An AlN material includes a first part consisting of a plurality of spheres and a second part consisting of a plurality of slugs. The spheres are on a top surface of the transitional layer, both at the planar area and the patterned area. The slugs are in grooves defined in the patterned area. Air gaps are formed between the slugs and a bottom surface of the epitaxial layer. The spheres and slugs of the AlN material help reflection of light generated by the epitaxial layer to a light output surface of the LED.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: December 10, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chia-Hung Huang, Shih-Cheng Huang, Po-Min Tu, Ya-Wen Lin, Shun-Kuei Yang
  • Publication number: 20130285216
    Abstract: A semiconductor structure includes a Si substrate, a supporting layer and a blocking layer formed on the substrate and an epitaxy layer formed on the supporting layer. The supporting layer defines a plurality of grooves therein to receive the blocking layer. The epitaxy layer is grown from the supporting layer. A plurality of slots is defined in the epitaxy layer and over the blocking layer. The epitaxy layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer.
    Type: Application
    Filed: June 25, 2013
    Publication date: October 31, 2013
    Inventors: SHIH-CHENG HUANG, PO-MIN TU, SHUN-KUEI YANG, CHIA-HUNG HUANG
  • Publication number: 20130280922
    Abstract: A method of orienting a semiconductor wafer. The method includes rotating a wafer about a central axis; exposing a plurality of edge portions of the rotating wafer to light having a predetermined wavelength from one or more light sources; detecting a subsurface mark in one of the plurality of edge portions of the rotating wafer; and orienting the wafer using the detected subsurface mark as a reference.
    Type: Application
    Filed: April 18, 2012
    Publication date: October 24, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Ming LIN, Wan-Lai CHEN, Chia-Hung HUANG, Chi-Ming YANG, Chin-Hsiang LIN
  • Patent number: 8563340
    Abstract: A method for manufacturing light emitting chips includes steps of: providing a substrate having a plurality of separate epitaxy islands thereon, wherein the epitaxy islands are spaced from each other by channels; filling the channels with an insulation material; sequentially forming a reflective layer, a transition layer and a base on the insulation material and the epitaxy islands; removing the substrate and the insulation material to expose the channels; and cutting the reflective layer, the transition layer and the base to form a plurality of individual chips along the channels.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: October 22, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • Patent number: 8536597
    Abstract: A light emitting diode chip includes an electrically conductive substrate, a reflecting layer disposed on the substrate, a semiconductor structure formed on the reflecting layer, an electrode disposed on the semiconductor structure, and a plurality of slots extending through the semiconductor structure. The semiconductor structure includes a P-type semiconductor layer formed on the reflecting layer, a light-emitting layer formed on the P-type semiconductor layer, and an N-type semiconductor layer formed on the light-emitting layer. A current diffusing region is defined in the semiconductor structure and around the electrode. The slots are located outside the current diffusing region.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: September 17, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
  • Patent number: 8536590
    Abstract: A light emitting element package includes a substrate, at least two light emitting element modules and an encapsulation member. The substrate includes a circuit layer. The circuit layer includes a plurality of solder pads. The at least two light emitting element modules are mounted on the substrate. Each of the at least two light emitting element modules includes a plurality of light emitting elements. Each light emitting element of the at least two light emitting element modules is electrically coupled to neighboring light emitting element in serial through the solder pads. The at least two light emitting element modules are reversely arranged. The encapsulation member is configured to encapsulate the at least two light emitting element modules on the substrate.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: September 17, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • Publication number: 20130234150
    Abstract: A light emitting diode includes a substrate, a transitional layer on the substrate and an epitaxial layer on the transitional layer. The transitional layer includes a planar area with a flat top surface and a patterned area with a rugged top surface. An AlN material includes a first part consisting of a plurality of spheres and a second part consisting of a plurality of slugs. The spheres are on a top surface of the transitional layer, both at the planar area and the patterned area. The slugs are in grooves defined in the patterned area. Air gaps are formed between the slugs and a bottom surface of the epitaxial layer. The spheres and slugs of the AlN material help reflection of light generated by the epitaxial layer to a light output surface of the LED.
    Type: Application
    Filed: August 30, 2012
    Publication date: September 12, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: CHIA-HUNG HUANG, SHIH-CHENG HUANG, PO-MIN TU, YA-WEN LIN, SHUN-KUEI YANG
  • Patent number: 8519419
    Abstract: A semiconductor light-emitting structure includes a silicon substrate, a distributed Bragg reflector, a semiconductor structures layer and an epitaxy connecting layer. The silicon substrate has a top surface. The distributed Bragg reflector is formed on the top surface of the silicon substrate. The semiconductor structures layer is configured for emitting light. The epitaxy connecting layer is placed between the distributed Bragg reflector and the semiconductor structures layer. Grooves extend from the semiconductor structures layer through the epitaxy connecting layer and the distributed Bragg reflector to reach the semiconductor structures layer.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: August 27, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • Patent number: 8501582
    Abstract: A semiconductor structure includes a Si substrate, a supporting layer and a blocking layer formed on the substrate and an epitaxy layer formed on the supporting layer. The supporting layer defines a plurality of grooves therein to receive the blocking layer. The epitaxy layer is grown from the supporting layer. A plurality of slots is defined in the epitaxy layer and over the blocking layer. The epitaxy layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer. A method for manufacturing the semiconductor structure is also disclosed.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: August 6, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang, Chia-Hung Huang
  • Patent number: 8492304
    Abstract: A manufacturing method of an iron complex is mixing ferric chloride and at least one chelating agent with a solvent, wherein Fe3+ ions of ferric chloride is reacted with the at least one chelating agent to form an iron complex Fe[R1]a[R2]b[H2O]c3+ or Fe[R1]a[H2O]c3+, wherein the at least one chelating agent is selected from a group including ethylenediamine, 1,10-phenanthroline, 2,2?-Bipyridine, diethylenetriamine, triethylenetetraamine, phenanthroline, or bipyridine. Moreover, a method for producing an iron oxide catalyst is mixing ferric chloride, at least one chelating agent and the support with a solvent to form an iron complex, which is incorporated with the support. Following, a drying step and a heat treatment step are processed to get the iron oxide catalyst.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: July 23, 2013
    Assignee: National Cheng Kung University
    Inventors: Weng-Sing Hwang, Shyh-Jiun Liu, Chia-Hung Huang, Chun-Kai Huang
  • Publication number: 20130161652
    Abstract: A light emitting diode (LED) includes a substrate, a buffer layer and an epitaxial structure. The substrate has a first surface with a patterning structure formed thereon. The patterning structure includes a plurality of projections. The buffer layer is arranged on the first surface of the substrate. The epitaxial structure is arranged on the buffer layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer arranged on the buffer layer in sequence. The first semiconductor layer has a second surface attached to the active layer. A distance between a peak of each the projections and the second surface of the first semiconductor layer is ranged from 0.5 ?m to 2.5 ?m.
    Type: Application
    Filed: August 8, 2012
    Publication date: June 27, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ya-Wen LIN, Po-Min TU, Shih-Cheng HUANG, Chia-Hung HUANG, Shun-Kuei YANG
  • Patent number: 8466033
    Abstract: A light emitting diode comprises a substrate, a buffer layer, a semiconductor layer and a semiconductor light emitting layer. The buffer layer is disposed on the substrate. The semiconductor layer is disposed on the buffer layer. The semiconductor light emitting layer is disposed on the semiconductor layer. A plurality of voids is defined within the semiconductor layer. Each void encloses air therein. A method for manufacturing the light emitting diode is also provided. Light generated by the semiconductor light emitting layer toward the substrate is reflected by the voids to emit out of the light emitting diode.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: June 18, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
  • Patent number: 8461666
    Abstract: A gallium nitride-based semiconductor device includes a composite substrate and a gallium nitride layer. The composite substrate includes a silicon substrate and a filler. The silicon substrate includes a first surface and a second surface opposite to the first surface, and the first surface defines a number of grooves therein. The filler is filled into the number of grooves on the first surface of the silicon substrate. A thermal expansion coefficient of the filler is bigger than that of the silicon substrate. The gallium nitride layer is formed on the second surface of the silicon substrate.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: June 11, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
  • Patent number: 8461619
    Abstract: An LED chip includes a substrate, a first type semiconductor layer, a light-emitting layer, a second type semiconductor layer, a first electrode and a second electrode formed on the substrate in sequence. A surface of the first type semiconductor layer away from the substrate comprises an exposed first area and a second area covered by the light-emitting layer. The first electrode is formed on the exposed first area of the substrate. A number of recesses are defined in the second area of the surface of the first type semiconductor layer. The recesses are spaced apart from each other and arranged in sequence in a direction away from the first electrode; depths of the recesses gradually decrease following an increase of a distance between the recesses and the first electrode. The second electrode is formed on the second type semiconductor layer.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: June 11, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chia-Hung Huang, Shih-Cheng Huang, Po-Min Tu, Shun-Kuei Yang
  • Patent number: 8450749
    Abstract: A light emitting element includes a substrate, a GaN layer formed on the substrate, a first low refractive index semiconductor layer formed on the GaN layer, and a lighting structure having a high refractive index formed on the first low refractive index semiconductor layer. A second low refractive index semiconductor layer is embedded in the first low refractive index semiconductor layer. The first low refractive index semiconductor layer and the GaN layer exhibit a lattice mismatch therebetween.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: May 28, 2013
    Assignee: Advanced Optoelectronics Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
  • Publication number: 20130109580
    Abstract: Peptide ligands are found. All of the peptide ligands have high-affinity against a tumor biomarker, GRP-78. Phage display library is used for screening out the peptide ligands. The peptide ligands can be labeled with a luminescent or a radioactive material to be used as probes for detecting tumor.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: ATOMIC ENERGY CONCIL-INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Chia-Hung Huang, Shui-Cheng Lee, Pei-Tzu Ku, Ker-Jer Huang
  • Patent number: 8394653
    Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate with a first block layer dividing an upper surface of the substrate into a plurality of epitaxial regions; forming a first semiconductor layer on the epitaxial regions; forming a second block layer partly covering the first semiconductor layer; forming a lighting structure on an uncovered portion of the first semiconductor layer; removing the first and the second block layers thereby defining clearances at the bottom surfaces of the first semiconductor layer and the lighting structure; and permeating etching solution into the first and second clearances to etch the first semiconductor layer and the lighting structure, thereby to form each of the first semiconductor layer and the lighting structure with an inverted frustum-shaped structure.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: March 12, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Ya-Wen Lin, Chia-Hung Huang, Shun-Kuei Yang
  • Publication number: 20130032779
    Abstract: A light emitting diode (LED) comprises a substrate, an epitaxial layer and an aluminum nitride (AlN) layer sequentially disposed on the substrate. The AlN layer comprises a plurality of stacks separated from each other, wherein the epitaxial layer entirely covers the plurality of stacks of the AlN layer. The AlN layer with a plurality of stacks reflects upwardly light generated by the epitaxial layer and downwardly toward the substrate to an outside of LED through a top plan of the LED. A method for forming the LED is also disclosed.
    Type: Application
    Filed: April 26, 2012
    Publication date: February 7, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Chia-Hung HUANG, Shih-Cheng Huang, Po-Min TU, Shun-Kuei YANG, Ya-Wen LIN
  • Patent number: 8349742
    Abstract: A gallium nitride-based semiconductor device includes a composite substrate and a gallium nitride layer. The composite substrate includes a silicon substrate and a filler. The silicon substrate includes a first surface and a second surface opposite to the first surface, and the first surface defines a number of grooves therein. The filler is filled into the number of grooves on the first surface of the silicon substrate. A thermal expansion coefficient of the filler is bigger than that of the silicon substrate. The gallium nitride layer is formed on the second surface of the silicon substrate.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: January 8, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang