Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may determine multiple voltage values associated with a rechargeable battery over a period of time; store the multiple voltage values with respect to multiple clock values over the period of time; determine a voltage drop rate from the multiple voltage values and the multiple clock values; determine a threshold voltage value associated with a predicted energy capacity of the rechargeable battery for a mobile information handling system (IHS) to perform a power state transition; determine a voltage value associated with the rechargeable battery; determine that the voltage value has reached the threshold voltage value; provide a notification to an operating system executed by the mobile IHS; store data from a volatile memory medium to a non-volatile memory medium; and transition the mobile IHS from an operational state to a power conservation state.

Abstract: An information handling system may include a processor; a battery to supply power to the information handling system, the battery comprising a voltage regulator to power a battery management unit (BMU) on the battery and set a system present pin of the BMU to a high voltage; the BMU to: detect a voltage indicator indicating a change in voltage state at a system present pin of the BMU that is externally connectable to a ground or voltage source at the information handling system, the voltage indicator indicative of an electrical coupling of the battery to the information handling system while the information handling system is in an off state; and register the voltage indicator within a battery register of the BMU; and a microcontroller, upon powering on of the information handling system, to read the voltage indicator at the battery register and determine that the battery has been coupled to the information handling system.

Abstract: Systems and methods for compensating battery health readings at low temperatures are described. In some embodiments, an Information Handling System (IHS) may include: a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution by the processor, cause the IHS to: calculate a state-of-health (SOH) of a battery, and compensate the SOH, at least in part, by taking into account at least one temperature measured during a charge cycle.

Abstract: Systems and methods for compensating battery health readings at low temperatures are described. In some embodiments, an Information Handling System (IHS) may include: a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution by the processor, cause the IHS to: calculate a state-of-health (SOH) of a battery, and compensate the SOH, at least in part, by taking into account at least one temperature measured during a charge cycle.

Abstract: An information handling system may include a processor; a battery to supply power to the information handling system, the battery comprising a voltage regulator to power a battery management unit (BMU) on the battery and set a system present pin of the BMU to a high voltage; the BMU to: detect a voltage indicator indicating a change in voltage state at a system present pin of the BMU that is externally connectable to a ground or voltage source at the information handling system, the voltage indicator indicative of an electrical coupling of the battery to the information handling system while the information handling system is in an off state; and register the voltage indicator within a battery register of the BMU; and a microcontroller, upon powering on of the information handling system, to read the voltage indicator at the battery register and determine that the battery has been coupled to the information handling system.

Abstract: An information handling system real time clock (RTC)/CMOS circuit is powered from a battery that powers the information handling system. The battery power is supplied through a power management circuit that manages power constraints to the real time clock and that protects the battery from exceeding current and voltage thresholds. A protection integrated circuit selectively cuts off power supply from a power module to the RTC/CMOS circuit if predetermined conditions are detected. The protection circuit may also cutoff all power from battery with a permanent failure option or may itself directly supply power to the real time clock/CMOS circuit.

Abstract: Dynamic battery discharge at an information handling system during battery charge, such as to support increased power use associated with processor turbo mode, is managed by setting a reduced maximum charge current dynamically during constant voltage charging so that battery voltage droop from discharge does not result in command of an excessive charge current after the discharge.

Abstract: In one or more embodiments, one or more systems, methods, and/or processes may determine that a timeout value has been reached; for each battery cell of multiple of battery cells: may determine if a temperature value associated with the battery cell meets or exceeds a threshold temperature value; if the temperature value associated with the battery cell does not meet or exceed the threshold temperature value, may permit the battery cell to be charged and discharged; if the temperature value associated with the battery cell meets or exceeds the threshold temperature value: may increment a temporary fail count associated with the battery cell; and may prevent at least one of charging and discharging the battery cell; may determine if temporary fail count exceeds a temporary fail count threshold; and if the temporary fail count does not exceed the temporary fail count threshold, may permit charging and discharging the battery cell.

Abstract: An information handling system real time clock (RTC)/CMOS circuit is powered from a battery that powers the information handling system. The battery power is supplied through a power management circuit that manages power constraints to the real time clock and that protects the battery from exceeding current and voltage thresholds. A protection integrated circuit selectively cuts off power supply from a power module to the RTC/CMOS circuit if predetermined conditions are detected. The protection circuit may also cutoff all power from battery with a permanent failure option or may itself directly supply power to the real time clock/CMOS circuit.

Abstract: In one or more embodiments, one or more systems, methods, and/or processes may determine that a timeout value has been reached; for each battery cell of multiple of battery cells: may determine if a temperature value associated with the battery cell meets or exceeds a threshold temperature value; if the temperature value associated with the battery cell does not meet or exceed the threshold temperature value, may permit the battery cell to be charged and discharged; if the temperature value associated with the battery cell meets or exceeds the threshold temperature value: may increment a temporary fail count associated with the battery cell; and may prevent at least one of charging and discharging the battery cell; may determine if temporary fail count exceeds a temporary fail count threshold; and if the temporary fail count does not exceed the temporary fail count threshold, may permit charging and discharging the battery cell.

Abstract: An apparatus is provided that includes a frequency doubler circuit and a duty cycle adjusting circuit. The frequency doubler circuit includes a multiplexer, a variable delay circuit and a divide-by-2 circuit. The multiplexer selects one of a first and a second clock signals having opposite phases according to a selection signal to generate a frequency doubled clock signal. The variable delay circuit delays the frequency doubled clock signal. The divide-by-2 circuit divides a frequency of the frequency doubled clock signal to generate the selection signal. The duty cycle adjusting circuit includes an average voltage generation circuit and a comparison circuit. The average voltage generation circuit generates an average voltage value of the frequency doubled clock signal. The comparison circuit generates a control signal according to a comparison result of the average voltage value and a reference voltage to control the duty cycle of the frequency doubled clock signal.

Abstract: In one or more embodiments, an information handling system may include an embedded controller, communicatively coupled to a battery system that is configured to power the information handling system. The embedded controller may be configured to: receive a cycle count from the battery system; determine that the cycle count is above a threshold; query the battery system for an expected margin of error, in response to determining that the cycle count is above the threshold; receive the expected margin of error from the battery system; determine that the expected margin of error is within a range; and in response to determining that the expected margin of error is within the range, compute a condition metric of the battery system based on a prediction of a capacity of the battery system and a design capacity of the battery system and store the condition metric of the battery system.

Abstract: An apparatus is provided that includes a frequency doubler circuit and a duty cycle adjusting circuit. The frequency doubler circuit includes a multiplexer, a variable delay circuit and a divide-by-2 circuit. The multiplexer selects one of a first and a second clock signals having opposite phases according to a selection signal to generate a frequency doubled clock signal. The variable delay circuit delays the frequency doubled clock signal. The divide-by-2 circuit divides a frequency of the frequency doubled clock signal to generate the selection signal. The duty cycle adjusting circuit includes an average voltage generation circuit and a comparison circuit. The average voltage generation circuit generates an average voltage value of the frequency doubled clock signal. The comparison circuit generates a control signal according to a comparison result of the average voltage value and a reference voltage to control the duty cycle of the frequency doubled clock signal.

Abstract: Dynamic battery discharge at an information handling system during battery charge, such as to support increased power use associated with processor turbo mode, is managed by setting a reduced maximum charge current dynamically during constant voltage charging so that battery voltage droop from discharge does not result in command of an excessive charge current after the discharge.

Abstract: A laser diode control circuit includes: a LD driver circuit for driving a laser diode; a direct current component remover circuit for generating a feedback signal based on a detected signal; a first conversion and filter circuit for generating a first filtered signal based on the feedback signal; a first rectifier for rectifying the first filtered signal to generate a first rectified signal; a reference signal generator for generating a reference signal; a second conversion and filter circuit for generating a second filtered signal based on the reference signal; a second rectifier for rectifying the second filtered signal to generate a second rectified signal; a rectified signals processing circuit for generating a processed signal based on the first and second rectified signals; and a comparator for generating a comparison signal based on the processed signal.

Abstract: In one or more embodiments, an information handling system may include an embedded controller, communicatively coupled to a battery system that is configured to power the information handling system. The embedded controller may be configured to: receive a cycle count from the battery system; determine that the cycle count is above a threshold; query the battery system for an expected margin of error, in response to determining that the cycle count is above the threshold; receive the expected margin of error from the battery system; determine that the expected margin of error is within a range; and in response to determining that the expected margin of error is within the range, compute a condition metric of the battery system based on a prediction of a capacity of the battery system and a design capacity of the battery system and store the condition metric of the battery system.

Abstract: A display panel includes a first substrate, and at least one data driver integrated circuit. The data driver integrated circuit is electrically connected to the first substrate, wherein the data driver integrated circuit receives a first set signal and a second set signal, the first set signal includes a first data transmission interface, the second set signal includes a second data transmission interface, and the first data transmission interface and the second data transmission interface are different.

Abstract: A circuit receives a reference clock and output an output clock in accordance with a clock multiplication factor, the circuit comprising: a digitally controlled timing adjustment circuit, a timing detection circuit, a loop filter, a controllable oscillator, a clock divider, a modulator, and a calibration circuit, wherein the modulator is configured to modulate a clock multiplication factor into a division factor and also calculate a pre-known noise caused by the modulation, and the digitally controlled timing adjustment circuit, the timing detection circuit, the loop filter, the controllable oscillator, and the clock divider form a feedback loop such that a frequency of the output clock is equal to a frequency of the reference clock multiplied by the clock multiplication, but a pre-known noise caused by the modulation is corrected by the digitally controlled timing adjustment circuit, which is calibrated by the calibration circuit in a closed-loop manner to minimize a correlation between the pre-known noise a

Abstract: An apparatus comprises a charge pump to receive a phase signal representing a result of a phase detection and to output a current flowing between an internal node of the charge pump and an output node of the charge pump; a capacitive load coupled to the output node; a current source controlled by a bias voltage to output a compensation current to the output node; a current sensor coupled between the internal node and the output node to sense the current; and a feedback network to generate the bias voltage in accordance with an output of the current sensor. A comparable method is also disclosed.

Abstract: A serial data link receiver and method are provided. In one implementation, the receiver includes a first equalizer for receiving a first received signal and outputting a first equalized signal, and a second equalizer for receiving a second received signal and outputting a second equalized signal. The receiver further includes an analog CDR (clock-data recovery) circuit for receiving the first equalized signal and outputting a first recovered bit stream and a first recovered clock generated in accordance with an analog control voltage, and a digital CDR circuit for receiving the second equalized signal and the first recovered clock and outputting a second recovered bit stream and a second recovered clock based on selecting a phase of the first recovered clock in accordance with a digital phase selection signal.