Abstract: A method of making a semiconductor device, the method includes forming a first opening and a second opening in a substrate. The method further includes forming a conductive material in the first opening and in the second opening, the conductive material comprising a joined portion where the conductive material in the first opening and the conductive material in the second opening are electrically and thermally connected together at a first surface of the substrate. The method further includes reducing a thickness of the substrate from a second surface of the substrate, opposite the first surface, to expose the conductive material in the first opening and the conductive material in the second opening. The method further includes connecting a device to the second surface of the substrate.

Abstract: A light-emitting device comprises a substrate; a plurality of light-emitting diodes formed on the substrate, wherein each of the plurality of light-emitting diodes comprises a first conductivity type layer, an active layer on the first conductivity type layer, and a second conductivity type layer on the active layer; a reflective layer surrounding a sidewall of each of the plurality of light-emitting diodes; and a top electrode formed on the reflective layer and the plurality of light-emitting diodes.

Abstract: A system and method for manufacturing a light-generating device is described. A preferred embodiment comprises a plurality of LEDs formed on a substrate. Each LED preferably has spacers along the sidewalls of the LED, and a reflective surface is formed on the substrate between the LEDs. The reflective surface is preferably located lower than the active layer of the individual LEDs.

Abstract: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

Abstract: A clamping structure includes an object, a clamping component and an elastic component. The object has a hole and a containing space, wherein the containing space is connected to the hole. The clamping component includes a pillar, a bump and a head portion, wherein the bump and the head portion are connected to the pillar, and the pillar is adapted to be inserted into the hole and rotated such that the bump moves to the containing space. When the bump is located in the containing space, the elastic component is compressed between the object and the head portion, and the bump is positioned at the containing space by elastic force of the elastic component, such that the clamping component is fastened to the object.

Abstract: The screwing accessory device comprises a receiving box, a rack and a pushing component. The receiving box is for receiving the screwed component. The rack is connected to the receiving box. The pushing component is disposed within the receiving box and is used for pushing the screwed component.

Abstract: The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns.

Abstract: The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns.

Abstract: A structure comprises a substrate, a mask, a buffer/nucleation layer, and a group III-V compound semiconductor material. The substrate has a top surface and has a recess from the top surface. The recess includes a sidewall. The first mask is the top surface of the substrate. The buffer/nucleation layer is along the sidewall, and has a different material composition than a material composition of the sidewall. The III-V compound semiconductor material continuously extends from inside the recess on the buffer/nucleation layer to over the first mask.

Abstract: A system and method for manufacturing a light-generating device is described. A preferred embodiment comprises a plurality of LEDs formed on a substrate. Each LED preferably has spacers along the sidewalls of the LED, and a reflective surface is formed on the substrate between the LEDs. The reflective surface is preferably located lower than the active layer of the individual LEDs.

Abstract: A circuit structure includes a substrate; a patterned mask layer over the substrate, wherein the patterned mask layer includes a plurality of gaps; and a group-III group-V (III-V) compound semiconductor layer. The III-V compound semiconductor layer includes a first portion over the mask layer and second portions in the gaps, wherein the III-V compound semiconductor layer overlies a buffer/nucleation layer.

Abstract: A light emitting diodes (LEDs) is presented. The LED includes a stress-alleviation layer on a substrate. Open regions and stress-alleviation layer regions are formed on the substrate. Epitaxial layers are disposed on the substrate, at least in the open regions therein, thereby forming an LED structure. The substrate is diced through at least a first portion of the stress-alleviation regions, thereby forming the plurality of LEDs.

Abstract: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

Abstract: A structure comprises a substrate, a mask, a buffer/nucleation layer, and a group III-V compound semiconductor material. The substrate has a top surface and has a recess from the top surface. The recess includes a sidewall. The first mask is the top surface of the substrate. The buffer/nucleation layer is along the sidewall, and has a different material composition than a material composition of the sidewall. The III-V compound semiconductor material continuously extends from inside the recess on the buffer/nucleation layer to over the first mask.

Abstract: A system and method for manufacturing a light-generating device is described. A preferred embodiment comprises a plurality of LEDs formed on a substrate. Each LED preferably has spacers along the sidewalls of the LED, and a reflective surface is formed on the substrate between the LEDs. The reflective surface is preferably located lower than the active layer of the individual LEDs.

Abstract: A structure comprises a substrate, a mask, a buffer/nucleation layer, and a group III-V compound semiconductor material. The substrate has a top surface and has a recess from the top surface. The recess includes a sidewall. The first mask is the top surface of the substrate. The buffer/nucleation layer is along the sidewall, and has a different material composition than a material composition of the sidewall. The III-V compound semiconductor material continuously extends from inside the recess on the buffer/nucleation layer to over the first mask.

Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

Abstract: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

Abstract: A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.

Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.