Abstract: Capacitor cells are provided. A first PMOS transistor is coupled between a power supply and a first node, and has a gate connected to a second node. A first NMOS transistor is coupled between a ground and the second node, and has a gate connected to the first node. A second PMOS transistor is coupled between the second node and the power supply, and has a gate connected to the second node. A second NMOS transistor is coupled between the first node and the ground, a gate connected to the first node, and has a gate connected to the first node. Sources of the first and second PMOS transistors share a P+ doped region in N-type well region, and the first PMOS transistor is disposed between the second PMOS transistor and the first and second NMOS transistors.

Abstract: A transfer device for transferring a substrate is provided, including a base plate, at least one suction unit disposed on a side of the base plate to generate suction on the substrate, and a plurality of movement restriction units disposed on the side of the base plate to limit the movement of the substrate during transfer. Each of the movement restriction units includes a main body, an abutting member, and a pusher. The main body is attached to the base plate and has a chamber therein. The abutting member is movably received in the chamber and has an abutting portion that protrudes beyond the main body to abut the substrate. The pusher is received in the chamber and configured to push the abutting member to move toward the substrate.

Abstract: Semiconductor devices and methods which utilize a passivation dopant to passivate a gate dielectric layer are provided. The passivation dopant is introduced to the gate dielectric layer through a work function layer using a process such as a soaking method. The passivation dopant is an atom which may help to passivate electrical trapping defects, such as fluorine.

Abstract: A capacitor cell is provided. A first PMOS transistor is coupled between a power supply and a first node, and has a gate connected to a second node. A first NMOS transistor is coupled between a ground and the second node, and has a gate connected to the first node. A second PMOS transistor is coupled between the second node and the first node, and has a gate connected to the second node. A second NMOS transistor has a drain connected to the first node, a gate connected to the first node, and a source connected to the ground or the second node. The first and second PMOS transistors and the first and second NMOS transistors are arranged in the same row. The second PMOS transistor is disposed between the first PMOS transistor and the first and second NMOS transistors.

Abstract: A method includes depositing a high-k gate dielectric layer over and along sidewalls of a semiconductor fin. The method further includes depositing an n-type work function metal layer over the high-k gate dielectric layer and performing a passivation treatment on the high-k gate dielectric layer through the n-type work function metal layer. The passivation treatment comprises a remote plasma process. The method further includes depositing a fill metal over the n-type work function metal layer to form a metal gate stack over the high-k gate dielectric layer. The metal gate stack comprising the n-type work function metal layer and the fill metal.

Abstract: A heat dissipation apparatus with energy-saving effect is coupled to an operation unit, and the heat dissipation apparatus includes a control unit and a drive circuit. The control unit determines whether the operation unit enters an energy-saving mode according to a first signal provided by the operation unit. The control unit shields a plurality of second signals provided to the drive circuit according to the energy-saving mode. The drive circuit does not drive the heat dissipation unit and the heat dissipation unit enters an inertia deceleration.

Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.

Abstract: A transfer device for transferring a substrate is provided, including a base plate, at least one suction unit disposed on a side of the base plate to generate suction on the substrate, and a plurality of movement restriction units disposed on the side of the base plate to limit the movement of the substrate during transfer. Each of the movement restriction units includes a main body, an abutting member, and a pusher. The main body is attached to the base plate and has a chamber therein. The abutting member is movably received in the chamber and has an abutting portion that protrudes beyond the main body to abut the substrate. The pusher is received in the chamber and configured to push the abutting member to move toward the substrate.

Abstract: Semiconductor devices and a method for forming the same are provided. In various embodiments, a method for forming a semiconductor device includes receiving a semiconductor substrate including a channel. An atmosphere-modulation layer is formed over the channel. An annealing process is performed to form an interfacial layer between the channel and the atmosphere-modulation layer.

Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.

Abstract: The present invention provides a laser projection clock, comprising a driving device, one or a plurality of pointer light source device, and one or a plurality of grating. The driving device comprises one or a plurality of rotating shafts and power elements for driving the one or plurality of the rotating shafts to rotate at different speeds respectively. The one or plurality of pointer light source devices is configured on one side of the driving device to each output a laser beam. The one or plurality of gratings is configured on the one or a plurality of rotating shafts in a one-on-one manner in order to be rotated by the one or plurality of rotating shafts respectively. The grating has an indication pattern, and the one or plurality of laser beams are projected to a projection plane through the one or a plurality of indication patterns of the one or plurality of gratings to form one or plurality of laser indications respectively.

Abstract: A method of rounding corners of a fin includes providing a substrate with a fin protruding from the substrate, wherein a pad oxide and a pad nitride entirely cover a top surface of the fin. Later, part of the pad oxide is removed laterally to expose part of the top surface of the fin. A silicon oxide layer is formed to contact two sidewalls of the fin and the exposed top surface, wherein two sidewalls and the top surface define two corners of the fin. After forming the silicon oxide layer, an annealing process is performed to round two corners of the fin. Finally, after the annealing process, an STI filling material is formed to cover the pad nitride, the pad oxide and the fin.

Abstract: A method of rounding corners of a fin includes providing a substrate with a fin protruding from the substrate, wherein a pad oxide and a pad nitride entirely cover a top surface of the fin. Later, part of the pad oxide is removed laterally to expose part of the top surface of the fin. A silicon oxide layer is formed to contact two sidewalls of the fin and the exposed top surface, wherein two sidewalls and the top surface define two corners of the fin. After forming the silicon oxide layer, an annealing process is performed to round two corners of the fin. Finally, after the annealing process, an STI filling material is formed to cover the pad nitride, the pad oxide and the fin.

Abstract: A capacitor cell is provided. A first PMOS transistor is coupled between a power supply and a first node, and has a gate connected to a second node. A first NMOS transistor is coupled between a ground and the second node, and has a gate connected to the first node. A second PMOS transistor is coupled between the second node and the first node, and has a gate connected to the second node. A second NMOS transistor has a drain connected to the first node, a gate connected to the first node, and a source connected to the ground or the second node. The first and second PMOS transistors and the first and second NMOS transistors are arranged in the same row. The second PMOS transistor is disposed between the first PMOS transistor and the first and second NMOS transistors.

Abstract: A capacitor cell is provided. A first PMOS transistor is coupled between a power supply and a first node, having a gate coupled to a second node. A first NMOS transistor coupled between a ground and the second node, having a gate coupled to the first node. A second PMOS transistor, having a drain coupled to the second node, a gate coupled to the second node, and a source coupled to the power supply or the first node. A second NMOS transistor, having a drain coupled to the first node, a gate coupled to the first node, and a source coupled to the ground or the second node.

Abstract: Transparent displays enable many useful applications, including heads-up displays for cars and aircraft as well as displays on eyeglasses and glass windows. Unfortunately, transparent displays made of organic light-emitting diodes are typically expensive and opaque. Heads-up displays often require fixed light sources and have limited viewing angles. And transparent displays that use frequency conversion are typically energy inefficient. Conversely, the present transparent displays operate by scattering visible light from resonant nanoparticles with narrowband scattering cross sections and small absorption cross sections. More specifically, projecting an image onto a transparent screen doped with nanoparticles that selectively scatter light at the image wavelength(s) yields an image on the screen visible to an observer. Because the nanoparticles scatter light at only certain wavelengths, the screen is practically transparent under ambient light.

Abstract: A transparent display includes nanoparticles having wavelength-selective scattering (e.g., resonant scattering) to preferentially scatter light at one or more discrete wavelengths so as to create images. The nanoparticles transmit light at other wavelengths to maintain a high transparency of the display. The nanoparticles are disposed in proximity to a thin film, which can enhance the scattering the process by reflecting light back to the nanoparticles for re-scattering or increasing the quality factor of the resonant scattering.

Abstract: Semiconductor devices and a method for forming the same are provided. In various embodiments, a method for forming a semiconductor device includes receiving a semiconductor substrate including a channel. An atmosphere-modulation layer is formed over the channel. An annealing process is performed to form an interfacial layer between the channel and the atmosphere-modulation layer.

Abstract: The present invention provides a laser projection clock, comprising a driving device, one or a plurality of pointer light source device, and one or a plurality of grating. The driving device comprises one or a plurality of rotating shafts and power elements for driving the one or plurality of the rotating shafts to rotate at different speeds respectively. The one or plurality of pointer light source devices is configured on one side of the driving device to each output a laser beam. The one or plurality of gratings is configured on the one or a plurality of rotating shafts in a one-on-one manner in order to be rotated by the one or plurality of rotating shafts respectively. The grating has an indication pattern, and the one or plurality of laser beams are projected to a projection plane through the one or a plurality of indication patterns of the one or plurality of gratings to form one or plurality of laser indications respectively.

Abstract: A method and structure for providing conformal doping of FinFET fin structures, for example by way of a thermal treatment process, includes forming a gate stack at least partially over a fin extending from a substrate. In various embodiments, a barrier metal layer is deposited over the gate stack. By way of example, a thermal fluorine treatment is performed, where the thermal fluorine treatment forms a fluorinated layer within the barrier metal layer, and where the fluorinated layer includes a plurality of fluorine atoms. In some embodiments, after forming the fluorinated layer, an anneal is performed to drive at least some of the plurality of fluorine atoms into the gate stack (e.g., into the interfacial layer and the high-K dielectric layer), thereby conformally doping the gate stack with the at least some of the plurality of fluorine atoms.