Abstract: A method of forming a semiconductor device includes: forming a metal gate structure over a fin that protrudes above a substrate, the metal gate structure being surrounded by an interlayer dielectric (ILD) layer; recessing the metal gate structure below an upper surface of the ILD layer distal from the substrate; after the recessing, forming a first dielectric layer over the recessed metal gate structure; forming an etch stop layer (ESL) over the first dielectric layer and the ILD layer; forming a second dielectric layer over the ESL; performing a first dry etch process to form an opening that extends through the second dielectric layer, through the ESL, and into the first dielectric layer; after the first dry etch process, performing a wet etch process to clean the opening; and after the wet etch process, performing a second dry etch process to extend the opening through the first dielectric layer.

Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.

Abstract: Techniques for selecting a generated image that is representative of an incident are provided. An initial summary of an incident is generated using an artificial intelligence processing tool. At least two images based on the initial summary are generated using an artificial intelligence image generation tool. For each of the at least two images, a subsequent summary is generated using an artificial intelligence image to text generation tool. The initial summary is compared to each of the subsequent summaries. The generated image associated with the subsequent summary that is most similar to the initial summary is selected as representative of the incident.

Abstract: Systems and method for camera calibration. In one example, the camera includes an electronic processor configured to obtain a bounding box in a captured image, the bounding box bounding a person in the image and having a lowermost vertical coordinate and an uppermost vertical coordinate. The electronic processor determines an initial estimation of values of a set of camera parameters ? and a current estimation of values of the set of camera parameters ? based on the initial estimation. The electronic processor iteratively updates the current estimation of values of the set of camera parameters ? by determining feet coordinates within the bounding box, determining a vertical head coordinate, and updating the current estimation of values of the set of camera parameters ? by reducing a difference between the vertical head coordinate and the uppermost vertical coordinate of the bounding box.

Abstract: A device monitors execution of a safety workflow, the safety workflow comprising one or more triggers and one or more responsive actions. The device provides, at a display screen, an indication of the safety workflow and respective visual indications of: a physical sensor that generated sensor data of a trigger of the safety workflow; and a communication device associated with a responsive action to the trigger. The device detects, via an input device, an interaction with one or more of the respective visual indications to interact with one or more of the physical sensor and the communication device. Based on the interaction, the device one or more of: initiates communication with the communication device; and sends the sensor data to the communication device.

Abstract: A method of forming a semiconductor device includes: forming a metal gate structure over a fin that protrudes above a substrate, the metal gate structure being surrounded by an interlayer dielectric (ILD) layer; recessing the metal gate structure below an upper surface of the ILD layer distal from the substrate; after the recessing, forming a first dielectric layer over the recessed metal gate structure; forming an etch stop layer (ESL) over the first dielectric layer and the ILD layer; forming a second dielectric layer over the ESL; performing a first dry etch process to form an opening that extends through the second dielectric layer, through the ESL, and into the first dielectric layer; after the first dry etch process, performing a wet etch process to clean the opening; and after the wet etch process, performing a second dry etch process to extend the opening through the first dielectric layer.

Abstract: A device monitors execution of a safety workflow, the safety workflow comprising one or more triggers and one or more responsive actions. The device provides, at a display screen, an indication of the safety workflow and respective visual indications of: a physical sensor that generated sensor data of a trigger of the safety workflow; and a communication device associated with a responsive action to the trigger. The device detects, via an input device, an interaction with one or more of the respective visual indications to interact with one or more of the physical sensor and the communication device. Based on the interaction, the device one or more of: retrieves the sensor data; initiates communication with the communication device; and sends the sensor data to the communication device.

Abstract: An integrated circuit structure includes a first Inter-Layer Dielectric (ILD), a gate stack in the first ILD, a second ILD over the first ILD, a contact plug in the second ILD, and a dielectric protection layer on opposite sides of, and in contact with, the contact plug. The contact plug and the dielectric protection layer are in the second ILD. A dielectric capping layer is over and in contact with the contact plug.

Abstract: Techniques for summarization of search results are provided. A similarity search query comprising at least one search criteria is received. The similarity search query is executed on at least one data source containing a plurality of images associated with metadata responsive to the search criteria. A plurality of search results response to the similarity search query is received from the at least one data source. The plurality of search results is clustered based on the metadata associated with the plurality of search results excluding the similarity criteria. The plurality of search results is summarized based on the results of the clustering. The summarization is displayed in a display view. An interactive user interface is provided to refine the plurality of search results based on the summarization.

Abstract: A method of forming a semiconductor device includes: forming a metal gate structure over a fin that protrudes above a substrate, the metal gate structure being surrounded by an interlayer dielectric (ILD) layer; recessing the metal gate structure below an upper surface of the ILD layer distal from the substrate; after the recessing, forming a first dielectric layer over the recessed metal gate structure; forming an etch stop layer (ESL) over the first dielectric layer and the ILD layer; forming a second dielectric layer over the ESL; performing a first dry etch process to form an opening that extends through the second dielectric layer, through the ESL, and into the first dielectric layer; after the first dry etch process, performing a wet etch process to clean the opening; and after the wet etch process, performing a second dry etch process to extend the opening through the first dielectric layer.

Abstract: Techniques for summarization of search results are provided. A similarity search query comprising at least one search criteria is received. The similarity search query is executed on at least one data source containing a plurality of images associated with metadata responsive to the search criteria. A plurality of search results response to the similarity search query is received from the at least one data source. The plurality of search results is clustered based on the metadata associated with the plurality of search results excluding the similarity criteria. The plurality of search results is summarized based on the results of the clustering. The summarization is displayed in a display view. An interactive user interface is provided to refine the plurality of search results based on the summarization.

Abstract: An integrated circuit structure includes a first Inter-Layer Dielectric (ILD), a gate stack in the first ILD, a second ILD over the first ILD, a contact plug in the second ILD, and a dielectric protection layer on opposite sides of, and in contact with, the contact plug. The contact plug and the dielectric protection layer are in the second ILD. A dielectric capping layer is over and in contact with the contact plug.

Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.

Abstract: The present disclosure, in some embodiments, relates to an integrated circuit structure. The integrated circuit structure includes a substrate and a hard mask over the substrate. The hard mask has sidewalls that form a first opening and a second opening exposing an upper surface of the substrate. A block mask is arranged on the hard mask and is set back from the sidewalls of the hard mask. Spacers are disposed over the block mask and have sidewalls that define a spacer opening exposing an upper surface of the block mask. The block mask extends from directly below the spacers to laterally past the sidewalls of the spacers.

Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.

Abstract: A method includes forming a first layer on a substrate; forming a first plurality of trenches in the first layer by a patterning process; and forming a second plurality of trenches in the first layer by another patterning process, resulting in combined trench patterns in the first layer. A first trench of the second plurality connects two trenches of the first plurality. The method further includes forming dielectric spacer features on sidewalls of the combined trench patterns. A space between two opposing sidewalls of the first trench is completely filled by the dielectric spacer features and another space between two opposing sidewalls of one of the two trenches is partially filled by the dielectric spacer features.

Abstract: The disclosure provides seals for devices that operate at elevated temperatures and have reactive metal vapors, such as lithium, sodium or magnesium. In some examples, such devices include energy storage devices that may be used within an electrical power grid or as part of a standalone system. The energy storage devices may be charged from an electricity production source for later discharge, such as when there is a demand for electrical energy consumption.