Abstract: A semiconductor device includes a first semiconductor chip having a first surface with a semiconductor element and a second surface opposing the first surface. A first metal layer has a third surface supporting the first semiconductor chip and a fourth surface opposing the third surface. The third surface is larger than the second surface. A resin layer has a fifth surface facing the first semiconductor chip and a sixth surface facing the first metal layer. A pad is on the first surface of the first semiconductor chip. A first via contact is within the resin layer on the third surface of the first metal layer. A second via contact is within the resin layer on the pad. The first and second via contacts are connected to first and the second interconnects, respectively.

Abstract: A semiconductor device includes a first semiconductor chip having a first surface with a semiconductor element and a second surface opposing the first surface. A first metal layer has a third surface supporting the first semiconductor chip and a fourth surface opposing the third surface. The third surface is larger than the second surface. A resin layer has a fifth surface facing the first semiconductor chip and a sixth surface facing the first metal layer. A pad is on the first surface of the first semiconductor chip. A first via contact is within the resin layer on the third surface of the first metal layer. A second via contact is within the resin layer on the pad. The first and second via contacts are connected to first and the second interconnects, respectively.

Abstract: A semiconductor device includes a first semiconductor chip having a first surface with a semiconductor element and a second surface opposing the first surface. A first metal layer has a third surface supporting the first semiconductor chip and a fourth surface opposing the third surface. The third surface is larger than the second surface. A resin layer has a fifth surface facing the first semiconductor chip and a sixth surface facing the first metal layer. A pad is on the first surface of the first semiconductor chip. A first via contact is within the resin layer on the third surface of the first metal layer. A second via contact is within the resin layer on the pad. The first and second via contacts are connected to first and the second interconnects, respectively.

Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes: selectively forming a plurality of mask layers on a first surface of a semiconductor substrate, and the semiconductor substrate having the first surface and a second surface; dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry-etching the first surface of the semiconductor substrate exposed between the plurality of mask layers, and a width of the gap on the second surface side being larger than a width of the gap on the first surface side; and forming a first electrode under a reduced-pressure atmosphere on the first surface of the semiconductor substrate after the semiconductor substrate being divided.

Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes: selectively forming a plurality of mask layers on a first surface of a semiconductor substrate, and the semiconductor substrate having the first surface and a second surface; dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry-etching the first surface of the semiconductor substrate exposed between the plurality of mask layers, and a width of the gap on the second surface side being larger than a width of the gap on the first surface side; and forming a first electrode under a reduced-pressure atmosphere on the first surface of the semiconductor substrate after the semiconductor substrate being divided.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes: selectively forming a plurality of electrode layers on a first surface of a semiconductor substrate, the semiconductor substrate having the first surface and a second surface; and dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry etching the first surface of the semiconductor substrate exposed between the plurality of electrode layers, the plurality of electrode layers being used as masks.

Abstract: A light emitting device includes a first lead frame having a top surface including a first region and a second region, a first metal layer disposed on the first region of the top surface, a reflector layer in contact with the second region of the top surface, a light emitting element mounted on the first metal layer and electrically connected to the first lead frame, and a transparent resin layer covering the light emitting element and in contact with the first metal layer.

Abstract: According to one embodiment, a semiconductor module has a substrate, two nonvolatile memories disposed on a first surface of the substrate, a controller to control the nonvolatile memories, disposed on the first surface of the substrate and between the two nonvolatile memories, and a plurality of terminals that are electrically connected to the two nonvolatile memories and to the controller, disposed on a second surface of the substrate.

Abstract: According to one embodiment, a semiconductor module includes a substrate, which has a first surface and a second surface opposite to the first surface, a controller device and a memory device formed on the first surface, and a metal plate bonded on the second surface. The metal plate is formed at least at a portion of the second surface corresponding to the controller device so that heat generated at the controller device conducts away from the memory device.

Abstract: According to one embodiment, a semiconductor module has a substrate, two nonvolatile memories disposed on a first surface of the substrate, a controller to control the nonvolatile memories, disposed on the first surface of the substrate and between the two nonvolatile memories, and a plurality of terminals that are electrically connected to the two nonvolatile memories and to the controller, disposed on a second surface of the substrate.

Abstract: According to one embodiment, a semiconductor module includes a substrate, which has a first surface and a second surface opposite to the first surface, a controller device and a memory device formed on the first surface, and a metal plate bonded on the second surface. The metal plate is formed at least at a portion of the second surface corresponding to the controller device so that heat generated at the controller device conducts away from the memory device.

Abstract: A semiconductor apparatus includes, a semiconductor substrate having first and second main surfaces and a through hole connecting the first and second main surfaces; a first insulation layer arranged on the first main surface, and having an opening corresponding to the through hole; a first conductive layer arranged on the first insulation layer, and covering the through hole; a second insulation layer arranged on an inner wall of the through hole and the second surface; a second conductive layer arranged in the through hole and on the second insulation layer, the second conductive layer contacting the first conductive layer; and a filling member arranged on the second conductive layer in the through hole, and having a gap between the second conductive layer on the first main surface side.

Abstract: According to an embodiment, there is provided a semiconductor device including a semiconductor substrate having a first surface on which an active layer having a light receiving portion is provided and a second surface to be a light receiving surface for the light receiving portion, a wiring layer provided on the active layer, an insulating layer provided to cover the wiring layer, and a supporting substrate joined to the semiconductor substrate via the insulating layer to face the first surface of the semiconductor substrate. A joined body of the semiconductor substrate and the supporting substrate includes an intercalated portion provided between its outer peripheral surface and the active surface. The intercalated portion is provided to penetrate the semiconductor substrate and the insulating layer from the second surface of the semiconductor substrate and to reach inside the supporting substrate.

Abstract: According to one embodiment, a first substrate and a second substrate are pressed from an opposite surface of a joint surface of the second substrate such that a joint surface of the first substrate and the joint surface of the second substrate are in contact with each other. The second substrate is restrained by a member to provide a gap between the joint surfaces. It is determined, based on a temporal change of a joint interface calculated based on an image imaged from the opposite surface side of the joint surface, whether joining is normally performed.

Abstract: Semiconductor device includes semiconductor substrate, through hole having first opening and second opening, and including an expansion portion so that an opening area of first opening is greater than an opening area of lowermost portion of expansion portion, first insulating layer, and having an opening which communicates with through hole and has an area smaller than opening area of first opening, first wiring layer provided on first insulating layer, second insulating layer provided on expansion portion of through hole, and to cover first opening and an inner wall surface of through hole, second insulating layer having an opening communicating with opening of first insulating layer so as to expose first wiring layer through opening of first insulating layer, and second wiring layer provided on second insulating layer to extend from inside of through hole, and being connected to first wiring layer via openings of first and second insulating layers.

Abstract: According to one mode of the present invention, metal-containing resin particles composed of a resin containing 50 wt % or more of a thermosetting resin and having a ratio of weight of absorbed moisture to weight of resin from 500 to 14500 ppm, and fine metal particles contained in said resin, is provided.

Abstract: According to one embodiment, a first substrate and a second substrate are pressed from an opposite surface of a joint surface of the second substrate such that a joint surface of the first substrate and the joint surface of the second substrate are in contact with each other. The second substrate is restrained by a member to provide a gap between the joint surfaces. It is determined, based on a temporal change of a joint interface calculated based on an image imaged from the opposite surface side of the joint surface, whether joining is normally performed.

Abstract: Provided is metal-containing resin particle for forming a conductor pattern in which the metal particles are dispersed in a resin matrix, and the content of the metal particles is 70 wt % or less.

Abstract: There is disclosed a semiconductor device comprising at least one semiconductor element, one chip mounting base being provided at least one first interconnection on one major surface thereof and at least one second interconnection on the other major surface thereof, and the semiconductor element being electrically connected to at least the one first interconnection and mounted on the one major surface, a sealing member being provided on the one major surface of the chip mounting base and covering the semiconductor element and the first interconnection, at least one third interconnection being provided on a surface of the sealing member, and at least one fourth interconnection being provided in the sealing member and the chip mounting base, and electrically connected to the first interconnection, the second interconnection, and the third interconnection.

Abstract: According to an embodiment, there is provided a semiconductor device including a semiconductor substrate having a first surface on which an active layer having a light receiving portion is provided and a second surface to be a light receiving surface for the light receiving portion, a wiring layer provided on the active layer, an insulating layer provided to cover the wiring layer, and a supporting substrate joined to the semiconductor substrate via the insulating layer to face the first surface of the semiconductor substrate. A joined body of the semiconductor substrate and the supporting substrate includes an intercalated portion provided between its outer peripheral surface and the active surface. The intercalated portion is provided to penetrate the semiconductor substrate and the insulating layer from the second surface of the semiconductor substrate and to reach inside the supporting substrate.