Abstract: According to an embodiment of the present invention, a method of producing an electronic circuit comprises printing first metal-containing resin particles which consist of at least a thermosetting resin and fine metal particles and second metal-containing resin particles which consist of at least a thermoplastic resin and fine metal particles by electrophotography to form a first base pattern which consists of the first metal-containing resin particles and a second base pattern which consists of the second metal-containing resin particles on a substrate; forming a first metal conductor layer on the first and second base patterns; forming a second metal conductor layer on the first metal conductor layer by electrolytic plating by supplying electric current to the first metal conductor layer; and removing the second base pattern and the first and second metal conductor layers which are formed on the second base pattern.

Abstract: A wiring board comprises a substrate; a resin layer which is selectively formed on one main surface of the substrate and has fine metal particles contained or adhered to its surface; and a conductive metal layer which is formed on the resin layer with the fine metal particles interposed between them.

Abstract: An image forming apparatus comprises an exposure unit forming an electrostatic latent image on a photoconductor based on image information, a developing unit developing the electrostatic latent image by toner made of formation material of a circuitry layer, and an electrostatic transferring unit transferring a toner image on the photoconductor onto a substrate. The toner image is transferred so as to cover at least a part of a conductor layer formed on the substrate. At this time, excessive charges caused in the conductor layer accompanying the start of the transfer of the toner image are removed. Alternatively, charges of which polarity is reverse to that of the toner are added to the conductor layer. These allow the circuitry layer to be formed to have a desired pattern favorably and securely on the conductor layer.

Abstract: A conductive underlayer is formed in an electrophotographic manner using a toner comprising toner particles containing a binder resin containing a green thermosetting resin and conductive particles having an average particle diameter of 0.05 ?m to 1 ?m, wherein 50% by volume particle diameter of the toner is in a range 4 ?m to 12 ?m and the ratio of the toner with a size of 4 ?m or smaller is 20% by number or less, or a toner including external additives containing hydrophobic-treated small size metal oxide particles having a BET specific surface area of 150 m2/g to 400 m2/g and large size metal oxide particles having a BET specific surface area of 10 m2/g to 70 m2/g and then a conductive layer is formed thereon by plating.

Abstract: A semiconductor device is disclosed, which comprises a semiconductor element in which a laminated film composed of a plurality of layers including an insulating film is formed on a surface of a semiconductor substrate, and a portion of the laminated film is removed from the surface of the semiconductor substrate so that the semiconductor substrate is exposed at the portion, a mounting substrate on which the semiconductor element is mounted, and a resin layer which seals at least a surface side of the semiconductor element with resin.

Abstract: According to one aspect of the present invention, a semiconductor device, comprising a wiring board provided with wires and electrodes; a semiconductor element which is mounted on the wiring board and has plural connection electrodes formed on its surface; and a metal layer of fine metal particles aggregated and bonded which is interposed between the electrodes on the wiring board and the connection electrodes of the semiconductor element to connect between the electrodes and the connection electrodes, is provided.

Abstract: Provided is metal-containing resin particle for forming a conductor pattern in which the metal particles are dispersed in a resin matrix, and the content of the metal particles is 70 wt % or less.

Abstract: A method of fabrication a semiconductor device characerized by: mounting a first semiconductor chip on a wiring substrate; bonding a spacer having a first main surface and a second main surface oppose to the first main surface so that the first main surface contact to the first semiconductor chip; and bonding a second semiconductor chip having a third main surface larger than the first main surface, onto the second main surface via a layer of a die bonding material selectively formed on a part of the third main surface.

Abstract: According to one mode of the present invention, metal-containing resin particles comprising a resin containing a thermosetting resin at 50 wt % or more and having a rate of moisture absorption from 500 to 14500 ppm, and fine metal particles contained in the resin, is provided.

Abstract: According to one mode of the present invention, a method of producing an electronic circuit, comprising forming an integrated resin layer having a prescribed thickness by repeating a resin layer forming process a number of times so that resin layers are layered to be integrated with all the resin layers on a substrate, wherein the resin forming process comprises charging the surface of a photoconductor; forming an electrostatic latent image having a prescribed pattern on the surface of the charged photoconductor; forming a visible image by electrostatically attaching charged particles composed of resin on the surface of the photoconductor on which the electrostatic latent image is formed; transferring the visible image formed on the surface of the photoconductor and composed of the charged particles onto the substrate; and fixing said visible image transferred onto said substrate on said substrate to form the resin layer on said substrate, is provided.

Abstract: There are provided a metal particulate spraying step to spray metal particulates over a substrate having an insulating pattern formed of thermosetting resin, a heating step to heat and dissolve the resin pattern and fix the metal particulates on the resin pattern, and a metal particulate eliminating step to eliminate metal particulates attached on the surface of the substrate excluding the resin pattern.

Abstract: A wiring board formed by an electrophotographic system of transferring a visible image to a substrate, the wiring board including: a substrate to which a visible image is transferred; a nonconductive metal-containing resin layer selectively formed on the substrate and containing metal particulates dispersed therein; a conductive conductor metal layer formed on the metal-containing resin layer; and a resin layer formed contiguously to the metal-containing resin layer on the substrate.

Abstract: There is disclosed a laminated-chip semiconductor device which comprises two chip-mounting substrates on each of which at least one semiconductor chip having a plurality of terminals for signals is mounted, and a plurality of chip connecting wirings electrically connected to the terminals for signals of the each semiconductor chip which are mounted on the chip-mounting substrates are formed in a same pattern, and which are laminated along a thickness direction, and one intermediate substrate which is arranged between the two chip-mounting substrates, and in which a plurality of interlayer connecting wirings electrically connected to each of the plurality of chip connecting wirings of the adjacent chip-mounting substrate are formed in a predetermined wiring pattern.

Abstract: According to one aspect of the invention, a contact sheet for testing electronic parts, comprising an insulating porous layer; and a connection electrode which is disposed on the insulating porous layer and electrically connect the electrode or terminal of the electronic parts and the terminal of a test apparatus; wherein the connection electrode is embedded below at least one main surface of the insulating porous layer.

Abstract: A semiconductor device includes a semiconductor substrate, a first wiring arranged on the semiconductor substrate, a first electrode pad electrically connected to the first wiring, and a porous organic resin film covering the front surface of the semiconductor substrate such that the first electrode pad is exposed to the outside.

Abstract: A method of manufacturing an electronic circuit satisfying demands for cost reduction, diversified small-quantity production, and a shorter cycle of design, manufacture, evaluation, correction, and so on is provided. The method includes at least forming a first pattern or forming a second pattern. Forming the first pattern comprises: forming a visible image on an electrostatic latent image formed on a photosensitive base, by the adhesion of charged particles essentially made of a resin; transferring the visible image onto the intermediate transfer base by the contact and pressurization of the visible image; heating/softening on the intermediate transfer base; and transferring a heated/softened resin layer onto a base material by the contact and pressurization of the resin layer.

Abstract: A first insulating film has a first planar surface as a lower surface. A first semiconductor chip is disposed on the first insulating film. A second insulating film is disposed on the first semiconductor chip and the first insulating film and has a second planar surface as an upper surface. A first wiring layer is disposed under the first planar surface. A second wiring layer is disposed on the second planar surface and electrically connected to the first semiconductor chip. A first conductive column penetrates the first insulating film and the second insulating film. A conductor penetrates the second insulating film.

Abstract: Provided is a stacked type semiconductor device formed of a plurality of semiconductor integrated circuit devices stacked, each having a specification and including a semiconductor integrated circuit chip, wherein at least three of the semiconductor integrated circuit devices are stacked in the order of a value of the specification.

Abstract: Provided a semiconductor device including: a wiring board; a semiconductor chip having a pad electrically connected to a wiring on the wiring board; a second semiconductor chip provided on the wiring board at a position facing a side of the semiconductor chip, having passive elements integrated therein, and having pads for external connection to which both ends of the passive elements are connected respectively and at least one of which is electrically connected to the wiring on the wiring board electrically connected to the pad of the semiconductor chip.

Abstract: There is disclosed a semiconductor device which comprises a first chip-mounting substrate on which at least one semiconductor chip having a plurality of terminals is mounted, and a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, a second chip-mounting substrate which is laminated on the first chip-mounting substrate and on which at least one semiconductor chip is mounted, a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, and at least one of the semiconductor chips has a center offset from a center of a whole arrangement of the relay terminals.