Patents by Inventor Chieh Fang
Chieh Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11362192Abstract: A method of manufacturing a diode structure includes forming a first stack on a silicon layer on a substrate. A first sidewall spacer extending along and covering a sidewall of the first stack is formed. The silicon layer is selectively etched to a first predetermined depth, thereby forming a second stack. The remaining silicon layer includes a silicon base. A second sidewall spacer extending along and covering a sidewall of the second stack is formed. The silicon base is selectively etched to form a third stack on the substrate. With the second sidewall spacer as a mask, lateral plasma ion implantation is performed. Defects at the interface between two adjacent semiconductor layers can be reduced by the method.Type: GrantFiled: August 13, 2020Date of Patent: June 14, 2022Assignees: JIANGSU ADVANCED MEMORY TECHNOLOGY CO., LTD., JIANGSU ADVANCED MEMORY SEMICONDUCTOR CO., LTD.Inventors: Chieh-Fang Chen, Kuo-Feng Lo, Chung-Hon Lam, Yu Zhu
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Patent number: 11342372Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a first side, a second side opposite to the first side, and at least one light-sensing region close to the first side. The image sensor device includes a dielectric feature covering the second side and extending into the semiconductor substrate. The dielectric feature in the semiconductor substrate surrounds the light-sensing region. The image sensor device includes a reflective layer in the dielectric feature in the semiconductor substrate, wherein a top portion of the reflective layer protrudes away from the second side, and a top surface of the reflective layer and a top surface of the insulating layer are substantially coplanar.Type: GrantFiled: July 9, 2020Date of Patent: May 24, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chun-Chieh Fang, Ming-Chi Wu, Ji-Heng Jiang, Chi-Yuan Wen, Chien-Nan Tu, Yu-Lung Yeh, Shih-Shiung Chen, Kun-Yu Lin
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Patent number: 11302734Abstract: A method includes etching a semiconductor substrate to form a trench, filling a dielectric layer into the trench, with a void being formed in the trench and between opposite portions of the dielectric layer, etching the dielectric layer to reveal the void, forming a diffusion barrier layer on the dielectric layer, and forming a high-reflectivity metal layer on the diffusion barrier layer. The high-reflectivity metal layer has a portion extending into the trench. A remaining portion of the void is enclosed by the high-reflectivity metal layer.Type: GrantFiled: September 4, 2018Date of Patent: April 12, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Chi Wu, Chun-Chieh Fang, Bo-Chang Su, Chien Nan Tu, Yu-Lung Yeh, Kun-Yu Lin, Shih-Shiung Chen
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Patent number: 11221654Abstract: An electronic device includes a first body, a second body, a hinge assembly, and a linkage assembly. The first body has a first pivoting end. The second body includes first and second casings slidably disposed on each other. The first casing has a second pivoting end. The hinge assembly has a first axial portion, a second axial portion, and a connection portion. The first and second pivoting ends are pivotally connected to the first axial portion and the second axial portion, respectively. The connection portion does not overlap the second axial portion along an axial direction. The linkage assembly is connected between the connection portion and the second casing. When the hinge assembly rotates along the second axial portion relative to the first casing to drive the first body to be unfolded, the linkage assembly drives the second casing to slide, so that an end of the second casing protrudes.Type: GrantFiled: March 31, 2020Date of Patent: January 11, 2022Assignee: COMPAL ELECTRONICS, INC.Inventors: Jen-Yu Chiang, Wang-Hung Yeh, Hsin-Chieh Fang, Shu-Hsien Chu
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Publication number: 20210405805Abstract: An electronic device including a body, a controller, a first touch layer and a second touch layer is provided. The body includes a first operating region and a second operating region. The second operating region is divided into a first touch region, a second touch region and a third touch region located between the first touch region and the second touch region. The controller, the first touch layer and the second touch layer are disposed in the body, and the first touch layer and the second touch layer are electrically coupled to the controller. In a first mode, the controller controls the first touch layer to switch from a detection status to a working status. In a second mode, the controller controls the second touch layer to switch from the detection status to the working status. A control method of an electronic device is also provided.Type: ApplicationFiled: March 10, 2021Publication date: December 30, 2021Applicant: COMPAL ELECTRONICS, INC.Inventors: Hsin-Chieh Fang, Wang-Hung Yeh, Shu-Hung Lin
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Publication number: 20210376110Abstract: A method of manufacturing a diode structure includes forming a first stack on a silicon layer on a substrate. A first sidewall spacer extending along and covering a sidewall of the first stack is formed. The silicon layer is selectively etched to a first predetermined depth, thereby forming a second stack. The remaining silicon layer includes a silicon base. A second sidewall spacer extending along and covering a sidewall of the second stack is formed. The silicon base is selectively etched to form a third stack on the substrate. With the second sidewall spacer as a mask, lateral plasma ion implantation is performed. Defects at the interface between two adjacent semiconductor layers can be reduced by the method.Type: ApplicationFiled: August 13, 2020Publication date: December 2, 2021Inventors: Chieh-Fang CHEN, Kuo-Feng LO, Chung-Hon LAM, Yu ZHU
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Patent number: 11079808Abstract: A dual-axis hinge assembly including a first rotating shaft, a second rotating shaft, torque components, a rotating shaft sleeve, a first bracket, a second bracket, and two bracket sleeves is provided. The second rotating shaft is disposed side-by-side to the first rotating shaft. The torque components are disposed at the first rotating shaft and the second rotating shaft. The rotating shaft sleeve covers the first rotating shaft, the second rotating shaft, and the torque components. The first bracket is connected to the first rotating shaft. The second bracket is connected to the second rotating shaft. The two bracket sleeves are respectively coaxial with the first rotating shaft and the second rotating shaft and respectively cover the first bracket and the second bracket. The two bracket sleeves and the rotating shaft sleeve are sleeved together. The invention further provides a plurality of electronic devices.Type: GrantFiled: September 4, 2018Date of Patent: August 3, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Hsin-Chieh Fang, Wang-Hung Yeh, Shu-Hung Lin, Chun-Wen Wang
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Patent number: 11023012Abstract: An electronic device includes a first body, a first supporting member, and a second body. The first supporting member has a first end and a second end opposite to each other, and the first end is pivoted at the first body. The second body has a notch, the second end is pivoted at the second body, and the first supporting member is fitted to the notch. The second body and the first supporting member fitted to the notch are closed or opened up with respect to the first body together as the first supporting member is pivotally rotated relative to the first body. When the second body is opened up, the second body and the first supporting member are pivotally rotated relatively to separate the first supporting member from the notch and move a bottom end of the second body to a preset position on the first body.Type: GrantFiled: October 9, 2019Date of Patent: June 1, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Shu-Hsien Chu, Wang-Hung Yeh, Hsin-Chieh Fang, Jen-Yu Chiang
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Patent number: 10921862Abstract: An electronic device including a first body, a second body and a rotating switch is provided. The second body is pivoted to the first body. The rotating switch is disposed at a side of the first body, and the rotating switch includes a rotary knob, a rotation sensor and a switch component. The rotary knob is configured to rotate around and slide along a reference axis, and the rotary knob includes a rotating portion and an actuation portion opposite to the rotating portion. The rotation sensor is sleeved on the actuation portion. The switch component is disposed at a side of the actuation portion. On the reference axis, the actuation portion is aligned to the switch component.Type: GrantFiled: May 22, 2019Date of Patent: February 16, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Shu-Hsien Chu, Wang-Hung Yeh, Hsin-Chieh Fang, Ching-Shiang Chang
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Publication number: 20200343289Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a first side, a second side opposite to the first side, and at least one light-sensing region close to the first side. The image sensor device includes a dielectric feature covering the second side and extending into the semiconductor substrate. The dielectric feature in the semiconductor substrate surrounds the light-sensing region. The image sensor device includes a reflective layer in the dielectric feature in the semiconductor substrate, wherein a top portion of the reflective layer protrudes away from the second side, and a top surface of the reflective layer and a top surface of the insulating layer are substantially coplanar.Type: ApplicationFiled: July 9, 2020Publication date: October 29, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chun-Chieh FANG, Ming-Chi WU, Ji-Heng JIANG, Chi-Yuan WEN, Chien-Nan TU, Yu-Lung YEH, Shih-Shiung CHEN, Kun-Yu LIN
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Publication number: 20200335510Abstract: A semiconductor structure includes a substrate, conductive layers, dielectric layers, an isolation structure, a first memory structure, and a second memory structure. The conductive layers and the dielectric layers are interlaced and stacked on the substrate. The isolation structure is disposed on the substrate and through the conductive layers and the dielectric layers. Each of the first and second memory structures has a radius of curvature. The first and second memory structures penetrate through the conductive layers and the dielectric layers and are disposed on opposite sidewalls of the isolation structure. Each of the first and second memory structures includes protecting structures and a memory structure layer including a memory storage layer. The protecting structures are disposed at two ends of the memory storage layer, and an etching selectivity to the protecting structures is different from an etching selectivity to the memory storage layer.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Inventors: Yu-Wei JIANG, Kuo-Pin CHANG, Chieh-Fang CHEN
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Patent number: 10811427Abstract: A semiconductor structure includes a substrate, conductive layers, dielectric layers, an isolation structure, a first memory structure, and a second memory structure. The conductive layers and the dielectric layers are interlaced and stacked on the substrate. The isolation structure is disposed on the substrate and through the conductive layers and the dielectric layers. Each of the first and second memory structures has a radius of curvature. The first and second memory structures penetrate through the conductive layers and the dielectric layers and are disposed on opposite sidewalls of the isolation structure. Each of the first and second memory structures includes protecting structures and a memory structure layer including a memory storage layer. The protecting structures are disposed at two ends of the memory storage layer, and an etching selectivity to the protecting structures is different from an etching selectivity to the memory storage layer.Type: GrantFiled: April 18, 2019Date of Patent: October 20, 2020Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Yu-Wei Jiang, Kuo-Pin Chang, Chieh-Fang Chen
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Publication number: 20200310498Abstract: An electronic device includes a first body, a second body, a hinge assembly, and a linkage assembly. The first body has a first pivoting end. The second body includes first and second casings slidably disposed on each other. The first casing has a second pivoting end. The hinge assembly has a first axial portion, a second axial portion, and a connection portion. The first and second pivoting ends are pivotally connected to the first axial portion and the second axial portion, respectively. The connection portion does not overlap the second axial portion along an axial direction. The linkage assembly is connected between the connection portion and the second casing. When the hinge assembly rotates along the second axial portion relative to the first casing to drive the first body to be unfolded, the linkage assembly drives the second casing to slide, so that an end of the second casing protrudes.Type: ApplicationFiled: March 31, 2020Publication date: October 1, 2020Applicant: COMPAL ELECTRONICS, INC.Inventors: Jen-Yu Chiang, Wang-Hung Yeh, Hsin-Chieh Fang, Shu-Hsien Chu
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Patent number: 10784150Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.Type: GrantFiled: April 25, 2019Date of Patent: September 22, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ching-Chung Su, Jiech-Fun Lu, Jian Wu, Che-Hsiang Hsueh, Ming-Chi Wu, Chi-Yuan Wen, Chun-Chieh Fang, Yu-Lung Yeh
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Patent number: 10734427Abstract: A method for forming an image sensor device is provided. The method includes providing a semiconductor substrate including a front surface, a back surface opposite to the front surface, at least one light-sensing region close to the front surface, and a first trench surrounding the light-sensing region. The method includes forming an insulating layer over the back surface and in the first trench. A void is formed in the insulating layer in the first trench, and the void is closed. The method includes removing the insulating layer over the void to open up the void. The opened void forms a second trench partially in the first trench. The method includes filling a reflective structure in the second trench. The reflective structure has a light reflectivity ranging from about 70% to about 100%.Type: GrantFiled: February 15, 2019Date of Patent: August 4, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-Chieh Fang, Ming-Chi Wu, Ji-Heng Jiang, Chi-Yuan Wen, Chien-Nan Tu, Yu-Lung Yeh, Shih-Shiung Chen, Kun-Yu Lin
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Patent number: D915394Type: GrantFiled: November 22, 2017Date of Patent: April 6, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Che-Hsien Lin, Hsin-Chieh Fang, Wang-Hung Yeh, Shu-Hong Lin, Chun-Wen Wang, Che-Hsien Chu
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Patent number: D915395Type: GrantFiled: February 13, 2018Date of Patent: April 6, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Chun-Wen Wang, Wang-Hung Yeh, Hsin-Chieh Fang, Che-Hsien Lin, Shu-Hung Lin, Che-Hsien Chu
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Patent number: D917460Type: GrantFiled: February 13, 2018Date of Patent: April 27, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Chun-Wen Wang, Wang-Hung Yeh, Hsin-Chieh Fang, Che-Hsien Lin, Shu-Hung Lin, Che-Hsien Chu, Ming-Chung Liu, Tung-Ying Wu
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Patent number: D920970Type: GrantFiled: January 25, 2018Date of Patent: June 1, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Wang-Hung Yeh, Jyh-Chyang Tzou, Chun-Ting Lee, Yao-Hsien Yang, Hsin-Chieh Fang, Chun-Wen Wang, Shu-Hong Lin
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Patent number: D934854Type: GrantFiled: January 21, 2019Date of Patent: November 2, 2021Assignee: COMPAL ELECTRONICS, INC.Inventors: Shu-Hsien Chu, Wang-Hung Yeh, Hsin-Chieh Fang, Jen-Yu Chiang