Patents by Inventor Chieh Fang

Chieh Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10276427
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Ching-Chung Su, Jiech-Fun Lu, Jian Wu, Che-Hsiang Hsueh, Ming-Chi Wu, Chi-Yuan Wen, Chun-Chieh Fang, Yu-Lung Yeh
  • Patent number: 10254794
    Abstract: A lifting type electronic device includes a first body, a second body and a lifting mechanism. The second body includes a fixing plate and a moving plate. The lifting mechanism is connected between the fixing plate and the moving plate and is adapted to move the moving plate between the initial position and the lifted-up position. The lifting mechanism includes a first moving member, a pressing member, at least one second moving member, and at least one elastic member.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: April 9, 2019
    Assignee: Compal Electronics, Inc.
    Inventors: Tung-Ying Wu, Ming-Chung Liu, Hsin-Chieh Fang
  • Patent number: 10241546
    Abstract: A portable electronic device includes a first body and a second body. The second body includes a processing unit, and a first touch panel, a second touch panel, a keyboard and at least one detecting module electrically connected to the processing unit, respectively. The keyboard is slidably disposed above the second touch panel, and the detecting module is adapted to detect a position of the keyboard. When the keyboard is located at a first position, the keyboard module covers the second touch panel, and the detecting module transmits a first signal to the processing unit so that the first touch panel is turned on. When the keyboard is located at a second position, the keyboard exposes the second touch panel, and the detecting module transmits a second signal to the processing unit so that the first touch panel is turned off. A touch panel controlling method of the portable electronic device is further provided.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: March 26, 2019
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Ming-Shun Lu, Ming-Chung Liu, Hsin-Chieh Fang, Yu-Wen Cheng, Yu-Ning Chang
  • Publication number: 20190086970
    Abstract: A dual-axis hinge assembly including a first rotating shaft, a second rotating shaft, torque components, a rotating shaft sleeve, a first bracket, a second bracket, and two bracket sleeves is provided. The second rotating shaft is disposed side-by-side to the first rotating shaft. The torque components are disposed at the first rotating shaft and the second rotating shaft. The rotating shaft sleeve covers the first rotating shaft, the second rotating shaft, and the torque components. The first bracket is connected to the first rotating shaft. The second bracket is connected to the second rotating shaft. The two bracket sleeves are respectively coaxial with the first rotating shaft and the second rotating shaft and respectively cover the first bracket and the second bracket. The two bracket sleeves and the rotating shaft sleeve are sleeved together. The invention further provides a plurality of electronic devices.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 21, 2019
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Hsin-Chieh Fang, Wang-Hung Yeh, Shu-Hung Lin, Chun-Wen Wang
  • Patent number: 10211244
    Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a front surface, a back surface opposite to the front surface, at least one light-sensing region close to the front surface, and a first trench surrounding the light-sensing region. The first trench has an inner wall and a bottom surface. The image sensor device includes an insulating layer covering the back surface, the inner wall, and the bottom surface. A thickness of a first upper portion of the insulating layer in the first trench increases in a direction away from the front surface, and the insulating layer has a second trench partially in the first trench. The image sensor device includes a reflective structure filled in the second trench. The reflective structure has a light reflectivity ranging from about 70% to about 100%.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: February 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Chieh Fang, Ming-Chi Wu, Ji-Heng Jiang, Chi-Yuan Wen, Chien-Nan Tu, Yu-Lung Yeh, Shih-Shiung Chen, Kun-Yu Lin
  • Publication number: 20190006408
    Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate having a front surface, a back surface opposite to the front surface, at least one light-sensing region close to the front surface, and a first trench surrounding the light-sensing region. The first trench has an inner wall and a bottom surface. The image sensor device includes an insulating layer covering the back surface, the inner wall, and the bottom surface. A thickness of a first upper portion of the insulating layer in the first trench increases in a direction away from the front surface, and the insulating layer has a second trench partially in the first trench. The image sensor device includes a reflective structure filled in the second trench. The reflective structure has a light reflectivity ranging from about 70% to about 100%.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Chieh FANG, Ming-Chi WU, Ji-Heng JIANG, Chi-Yuan WEN, Chien-Nan TU, Yu-Lung YEH, Shih-Shiung CHEN, Kun-Yu LIN
  • Patent number: 10157944
    Abstract: A semiconductor device includes a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes recesses in the second surface, and surfaces of each of the recesses are wet etched surfaces. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chang Huang, Wei-Tung Huang, Yen-Hsiang Hsu, Yu-Lung Yeh, Chun-Chieh Fang
  • Publication number: 20180340648
    Abstract: An electronic device includes a base, a pivoting component, a display and a supporting component. The base has an upper side and a lower side and is suitable to be placed on a surface. The pivoting component is pivotally connected to a rear end of the base. The display is connected to the pivoting component and suitable to be unfolded or closed at the upper side of the base by the pivoting of the pivoting component. The supporting component is pivotally connected to the lower side of the base and suitable to be unfolded or closed at the lower side of the base. When the display is unfolded on the base, an end of the display slides along the supporting component, and the supporting component is unfolded on the base and supports the pivoting component and the rear end of the base away from the surface.
    Type: Application
    Filed: May 24, 2018
    Publication date: November 29, 2018
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Shu-Hsien Chu, Wang-Hung Yeh, Hsin-Chieh Fang, Ping-Chu Tsai, Ching-Shiang Chang
  • Publication number: 20180277420
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Application
    Filed: May 25, 2018
    Publication date: September 27, 2018
    Inventors: Ching-Chung SU, Jiech-Fun LU, Jian WU, Che-Hsiang HSUEH, Ming-Chi WU, Chi-Yuan WEN, Chun-Chieh FANG, Yu-Lung YEH
  • Patent number: 10033358
    Abstract: A buffer circuit includes a transistor cascode circuit, a latch circuit, a first transistor, a second transistor, and a voltage generator. The transistor cascode circuit is biasing at a first voltage. The latch circuit is biasing at a second voltage, whose voltage level is negative. The first transistor and the second transistor are coupling between the transistor cascode circuit and the latch circuit, and a gate of the first transistor is coupled to a gate of the second transistor. The voltage generator provides a biasing voltage to the gate of the first transistor and adjusts a voltage level of the biasing voltage dynamically according to a voltage level of the second voltage. The biasing voltage is at a first level when the buffer circuit is initially turned on, and the biasing voltage is at a second level when the buffer circuit enters the steady state.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: July 24, 2018
    Assignee: ALI CORPORATION
    Inventors: Wei-Chieh Fang, Chien-Yuan Lu
  • Publication number: 20180201662
    Abstract: The present disclosure provides a peptide for promoting cell migration and/or skin wound healing, including an IL-6-derived peptide, which is designed within the region of the sequence of SEQ ID NO. 1 and of which the sequence includes the sequence of SEQ ID NO. 2, in which the IL-6-derived peptide has about 6-50 amino acids.
    Type: Application
    Filed: November 29, 2017
    Publication date: July 19, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Chieh-Fang CHENG, Nien-Tzu CHOU, Ssu-Yuan WU
  • Patent number: 9984918
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: May 29, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Chung Su, Jiech-Fun Lu, Jian Wu, Che-Hsiang Hsueh, Ming-Chi Wu, Chi-Yuan Wen, Chun-Chieh Fang, Yu-Lung Yeh
  • Publication number: 20170236864
    Abstract: A semiconductor device includes a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes recesses in the second surface, and surfaces of each of the recesses are wet etched surfaces. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.
    Type: Application
    Filed: May 3, 2017
    Publication date: August 17, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chang HUANG, Wei-Tung HUANG, Yen-Hsiang HSU, Yu-Lung YEH, Chun-Chieh FANG
  • Publication number: 20170194190
    Abstract: A semiconductor structure includes a semiconductive substrate including a first surface and a second surface opposite to the first surface, a shallow trench isolation (STI) including a first portion at least partially disposed within the semiconductive substrate and tapered from the first surface towards the second surface, and a second portion disposed inside the semiconductive substrate, coupled with the first portion and extended from the first portion towards the second surface, and a void enclosed by the STI, wherein the void is at least partially disposed within the second portion of the STI.
    Type: Application
    Filed: April 1, 2016
    Publication date: July 6, 2017
    Inventors: CHING-CHUNG SU, JIECH-FUN LU, JIAN WU, CHE-HSIANG HSUEH, MING-CHI WU, CHI-YUAN WEN, CHUN-CHIEH FANG, YU-LUNG YEH
  • Patent number: 9666619
    Abstract: A semiconductor device includes a carrier, a substrate, light-sensing devices and a bonding layer. The substrate overlies the carrier, and has a first surface and a second surface opposite to the first surface. The substrate includes inverted pyramid recesses in the second surface. The light-sensing devices are disposed on the first surface of the substrate. The bonding layer is disposed between the substrate and the carrier.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: May 30, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Chang Huang, Wei-Tung Huang, Yen-Hsiang Hsu, Yu-Lung Yeh, Chun-Chieh Fang
  • Patent number: D787503
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: May 23, 2017
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yun Bai, Ming-Chung Liu, Wang-Hung Yeh, Yu-Wen Cheng, Yu-Ning Chang, Hsin-Chieh Fang
  • Patent number: D797718
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: September 19, 2017
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Shu-Hsien Chu, Ming-Chung Liu, Hsin-Chieh Fang
  • Patent number: D797719
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: September 19, 2017
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Shu-Hsien Chu, Ming-Chung Liu, Hsin-Chieh Fang
  • Patent number: D810750
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: February 20, 2018
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Ning Chang, Hong-Tien Wang, Ming-Chung Liu, Hsin-Chieh Fang, Shih-Chin Chou, Yun Bai
  • Patent number: D812617
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: March 13, 2018
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yun Bai, Wang-Hung Yeh, Ming-Chung Liu, Yu-Wen Cheng, Hsin-Chieh Fang, Yu-Ning Chang