Abstract: The present invention relates to an ultrasound image enhancement processing system and method thereof. The ultrasound image enhancement processing system includes at least one first ultrasound device and at least one server apparatus. The server apparatus receives a first ultrasound original image file, processes the first ultrasound original image file through a speckle reduction algorithm to generate a first processed image file, and performs a deep learning training on the first ultrasound original image file and the first processed image file to generate a first neural network model. The first neural network learning module is used to output a first speckle reduction enhancement image file. The image content of the first speckle reduction enhancement image file is approximating to the image content of the first processed image file.

Abstract: The present disclosure provides a polyester including residues of formulas (i), (ii), (iii), and (iv): for example, terephthalic acid, for example, ethylene glycol, for example, cyclohexanedimethanol, and for example, tricyclodecane dimethanol, in which R1 is an aromatic group, R2 is a C2-C6 straight-chain hydrocarbon group, * represents a linking bond. Based on 100 mol % of a sum of the residues of the formula (ii), the formula (iii) and the formula (iv), a content of the residue of the formula (iii) ranges from 50 mol % to 85 mol %, and the residue of the formula (iv) ranges from 12 mol % to 40 mol %.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element stacking structure is disposed on a carrier structure to integrate multiple chips into a single package, so that the electronic package can meet with the requirements of miniaturization without increasing the layout area of the carrier structure.

Abstract: Systems and methods for controlling traffic flow along an arterial. The systems comprise a data processing apparatus configured to: monitor traffic light control signals (TLCSs) used to control traffic lights at intersection(s) and traffic delays occurring at intersection(s) at a time when the traffic lights are being controlled by TLCSs; access a hybrid model comprising a first linear term corresponding to an instance of traffic delays, a second linear term corresponding to a concurrent instance of TLCSs, and a nonlinear function defining a nonlinear relationship between the instance of the traffic delays and a previous instance of TLCSs; use the hybrid module to predict traffic delays at intersection(s) based on the traffic control signals and the traffic delays; determine, based on TLCSs and the traffic delays, traffic control signals that cause the predicted traffic delays to decrease; and cause the traffic lights to be controlled using the traffic control signals.

Abstract: The present invention relates to a license plate identification system and method thereof. The license plate identification system comprises at least a server apparatus storing at least one license plate picture file to be identified and a plurality of license plate sample picture files. Each of the license plate sample picture files has a double-row of character. Through deep learning training, the system generates a neural network model, inputs the license plate picture file to be identified into the neural network model for outputting analysis result information, and decodes the analysis result information through a decoding algorithm to obtain an identification license plate character content.

Abstract: A method for forming an indium gallium nitride quantum well structure is disclosed. The method includes forming a gallium nitride microdisk on a substrate, with the gallium nitride microdisk having an inverted pyramid form and an end face; and forming multiple quantum well layers on the end face, with each quantum well layer including an indium gallium nitride quantum well and a barrier layer. The indium gallium nitride quantum well is grown at a growth temperature adjusted using a trend equation within a temperature range of 480° C. to 810° C.

Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.

Abstract: A semiconductor device assembly is provided, which comprises a vertical stack of semiconductor devices, the vertical stack including a plurality of electrical interconnects, a plurality of retention structures, and a non-conductive film (NCF) between each adjacent pair of semiconductor devices of the vertical stack. The plurality of retention structures between each adjacent pair of semiconductor devices is disposed peripherally to the corresponding plurality of electrical interconnects. Each of the plurality of retention structures has a height less than a space between the corresponding adjacent pair of semiconductor devices, and the plurality of retention structures between each adjacent pair of semiconductor devices has a smaller first average pitch between adjacent ones of the plurality of retention structures than a second average pitch between adjacent ones of the corresponding plurality of electrical interconnects.

Abstract: A wireless charging control method and a wireless charging system employing the same are provided. The wireless charging control method is applicable for the wireless charging system including a transmitter module and a receiver module and includes steps of: (a) by the transmitter module, when an input power is higher than a threshold power or a component temperature is higher than a threshold temperature, determining a target output power according to the input power or the component temperature; (b) by the transmitter module, modulating information of the target output power into an input electric energy; (c) by the receiver module, receiving and sampling the input electric energy to demodulate the information of the target output power; and (d) by the receiver module, converting the input electric energy into the target output power according to the information of the target output power.

Abstract: A fast-transient buffer is shown. The fast-transient buffer has a flipped voltage follower coupled between the input terminal and the output terminal of the fast-transient buffer, and a first MOS transistor coupled to the flipped voltage follower as well as the output terminal of the fast-transient buffer. The first MOS transistor regulates the output voltage of the output terminal of the fast-transient buffer, in the opposite direction in comparison with an output voltage regulation direction due to the flipped voltage follower.

Abstract: A memory device and a manufacturing method are provided. The memory device includes active regions defined in a semiconductor substrate by an isolation structure, wherein the active regions are arranged as an array along first and second directions, and extend along a third direction; and word lines, extending through the active regions along the second direction in the semiconductor substrate. The active regions are arranged in pairs along the second direction. The active regions in the same pair are closely adjacent to each other by a first spacing. Adjacent pairs of the active regions are separated by a greater second spacing. A featured portion of each active region below an intersecting word line has a first side closely adjacent to the other active region in the same pair by the first spacing and a second side separated from another pair of the active regions by the second spacing, and has an inclined top surface ascending from the second side to the first side.

Abstract: The present invention provides a quadrature phase detector including a detection circuit. The detection circuit includes a first switch, a second switch and a first filter, wherein the first switch is controlled by a second clock signal to selectively couple a first clock signal to a first node, the second switch is controlled by the second clock signal to selectively coupled the first node to a reference voltage, and the first filter is configured to filter voltages at the first node to generate a first detection result.

Abstract: A tape measure includes a housing having an interior surface with a post mount protruding therefrom, and a post having a shaft extending from a keyed shape. The post and the post mount are configured such that the post is slid laterally along the interior surface until the post mount is received in the keyed shape. The keyed shape is configured to prevent rotation of the shaft relative to the housing once the keyed shape is received in the post mount.

Abstract: The present invention provides a light emitting panel, which includes: a substrate, at least one light emitting element disposed on the substrate, and a reflective structure layer. The reflective structure layer includes a plurality of first microstructure units disposed on the substrate and distributed around the at least one light emitting element, and a plurality of second microstructure units disposed on and overlapping the first microstructure units. A spacing between adjacent first microstructure units among the first microstructure units is less than a spacing between adjacent second microstructure units among the second microstructure units.

Abstract: A tape measure includes a housing with first and second housing portions; a reel configured to be secured between the first and second housing portions, the reel containing a tape blade wound thereon and partially extending therefrom terminating in a hook portion; and an integral component coupled to the first and second housing portions, including an aperture defining a finger brake, the finger brake exposing the tape blade for engagement by a user. The tape blade is biased to retract into the housing, winding around the reel, such that in a fully retracted position the hook portion abuts the portion of the mouth of the tape measure. In an extended position the tape blade is unwound from the reel such that the hook extends away from the integral component. An integral component including an aperture defining a tape measure mouth and a light emitter receiving slot is also disclosed.

Abstract: A tape measure includes a housing having an interior surface with a post mount protruding therefrom, and a post having a shaft extending from a keyed shape. The post and the post mount are configured such that the post is slid laterally along the interior surface until the post mount is received in the keyed shape. The keyed shape is configured to prevent rotation of the shaft relative to the housing once the keyed shape is received in the post mount.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.

Abstract: A noise reduction (NR) system includes a finite impulse response (FIR) filter and a filter manager circuit. The FIR filter is used to perform NR upon a filter input derived from an input signal. The filter manager circuit is used to determine a configuration of a minimum phase filter according to the input signal, and update the FIR filter by the configuration of the minimum phase filter.

Abstract: The present invention relates to a composite laminate plate, a housing and a mobile communication device. The composite laminate includes a top metal layer with a through hole and an array antenna, and an area ratio of the array antenna to the through hole meets a specific range, thereby enhancing wave transmissivity of a millimeter wave. Moreover, the composite laminate has a specific material structure, such that it has good mechanical properties and low density. The housing and the mobile communication device made by the composite laminate have advantages of metallic texture, high signal intensity and excellent effect for light weight tendency.