Abstract: A memory device includes an array of resistive memory cells with a plurality of word lines connected to the array of resistive memory cells. A voltage compensation controller is configured to determine a word line voltage to be applied to a selected word line of the plurality of word lines. A word line driver is configured apply the determined word line voltage to the selected word line.

Abstract: A surge current suppression circuit includes a switch, a bypass resistor, a detection resistor, and a comparator. The switch is coupled to a first end of an energy storage capacitor in series, wherein a second end of the energy storage capacitor is coupled to a load and receives an input power source. The bypass resistor is coupled to the switch in parallel. The detection resistor is coupled to the switch in series to generate a detection voltage according to a capacitor current flowing through the energy storage capacitor. The comparator compares the detection voltage with a reference voltage to generate a control signal. When the detection voltage is greater than the reference voltage, the control signal controls the switch to be turned off. When the detection voltage is less than the reference voltage, the control signal controls the main switch to be turned on.

Abstract: An active bridge rectifier circuit includes a rectifier unit and a control unit. The rectifier unit includes a first upper bridge switch, a second upper bridge switch, a first lower bridge switch, and a second lower bridge switch. The control unit includes a first signal comparator and a second signal comparator. The first signal comparator compares a live wire signal provided from a live wire end with a neutral wire signal provided from a neutral wire end to generate a first comparison signal. The second signal comparator compares the live wire signal with the neutral wire signal to generate a second comparison signal. The first comparison signal controls the first upper bridge switch and the first lower bridge switch. The second comparison signal controls the second upper bridge switch and the second lower bridge switch.

Abstract: A surge current suppression circuit includes a switch, a bypass resistor, a detection resistor, and a comparator. The switch is coupled to a first end of an energy storage capacitor in series, wherein a second end of the energy storage capacitor is coupled to a load and receives an input power source. The bypass resistor is coupled to the switch in parallel. The detection resistor is coupled to the switch in series to generate a detection voltage according to a capacitor current flowing through the energy storage capacitor. The comparator compares the detection voltage with a reference voltage to generate a control signal. When the detection voltage is greater than the reference voltage, the control signal controls the switch to be turned off. When the detection voltage is less than the reference voltage, the control signal controls the main switch to be turned on.

Abstract: A memory circuit includes a bias voltage generator, a drive circuit, and a resistive random-access memory (RRAM) device. The bias voltage generator includes a first transistor configured to generate a voltage difference based on a first current and an activation voltage, and is configured to output the activation voltage and a bias voltage based on the voltage difference. The drive circuit is configured to receive the bias voltage and output a drive voltage having a voltage level based on the bias voltage, and the RRAM device is configured to receive the activation voltage and conduct a second current responsive to the drive voltage and the activation voltage.

Abstract: A memory device is provided, the memory device includes multiple cells arranged in a matrix of multiple rows and multiple columns. The memory device further includes multiple bit lines each of which is connected to first cells of the multiple cells arranged in a row of the multiple rows. A voltage control circuit is connectable to a selected bit line of the multiple bit lines and includes a voltage detection circuit that detects an instantaneous supply voltage and a voltage source selection circuit connected to the voltage detection circuit. The voltage source selection circuit selects a voltage source from multiple voltage sources based on the detected instantaneous supply voltage. The voltage source selection circuit includes a switch that connects the selected voltage source to the selected bit line to provide a write voltage.

Abstract: A memory device includes an array of resistive memory cells with a plurality of word lines connected to the array of resistive memory cells. A voltage compensation controller is configured to determine a word line voltage to be applied to a selected word line of the plurality of word lines. A word line driver is configured apply the determined word line voltage to the selected word line.

Abstract: An active bridge rectifier circuit includes a rectifier unit and a control unit. The rectifier unit includes a first upper bridge switch, a second upper bridge switch, a first lower bridge switch, and a second lower bridge switch. The control unit includes a first signal comparator and a second signal comparator. The first signal comparator compares a live wire signal provided from a live wire end with a neutral wire signal provided from a neutral wire end to generate a first comparison signal. The second signal comparator compares the live wire signal with the neutral wire signal to generate a second comparison signal. The first comparison signal controls the first upper bridge switch and the first lower bridge switch. The second comparison signal controls the second upper bridge switch and the second lower bridge switch.

Abstract: A memory circuit includes a bias voltage generator, a drive circuit, and a resistive random-access memory (RRAM) device. The bias voltage generator includes a first current path configured to receive a first current from a current source, and output a bias voltage based on a voltage difference generated from conduction of the first current in the first current path. The drive circuit is configured to receive the bias voltage and output a drive voltage having a voltage level based on the bias voltage, and the RRAM device is configured to conduct a second current responsive to the drive voltage.

Abstract: A memory device includes an array of resistive memory cells with a plurality of word lines connected to the array of resistive memory cells. A voltage compensation controller is configured to determine a word line voltage to be applied to a selected word line of the plurality of word lines. A word line driver is configured apply the determined word line voltage to the selected word line.

Abstract: An electronic device including a main body, a driver module, and a plurality of expanded members is provided. The main body includes at least one image module. The driver module is movably disposed in the main body. The expanded members are disposed beside the main body and connected to the driver module, and each of the expanded members includes at least one of a radio module and a speaker module. The driver module is adapted to drive the expanded members to expand from a collapsed position to a use position, when the expanded members are located at the collapsed position, the expanded members are collapsed to the main body, and the expanded members are driven by the driver module to be expanded with respect to the main body and are moved to the use position.

Abstract: A method includes receiving a semiconductor wafer into a chamber; generating a plasma within the chamber to accelerate particles toward the semiconductor wafer; generating a magnetic field above the semiconductor wafer by an electromagnetic structure contained within the chamber, wherein the electromagnetic structure comprises a plurality of electromagnetic elements; and adjusting the magnetic field, wherein the adjusting of the magnetic field includes moving positions of each of the plurality of electromagnetic elements independently.

Abstract: An electronic device includes a first body, a second body, a base, a first shaft structure, a second shaft structure, and a locking component. The second body is connected to the first body through the base. The first shaft structure includes a first shaft and a second shaft. The second body is pivoted to a first base portion of the base through the first shaft and a second base portion of the base through the second shaft. The second shaft structure includes a connecting component fixed to the first body and a third shaft pivoted to the first base portion and the connecting component. The first and second shafts are perpendicular to the third shaft. The locking component is slidably disposed between the second base portion and the first body and configured to lock or release a connection between the second base portion and the first body.

Abstract: An electronic device includes a first component, a second component, a dual axis module, and a third component. The second component is flipably disposed at the first component. The dual axis module has a first shaft and a second shaft. The second component is pivoted to the second shaft. The third component is pivoted to the first shaft. The electronic device is switched between a first state, a second state, a third state, and a fourth state. During the switching of the first state to the second state, the first shaft is rotatable relative to the first component and the second shaft is non-rotatable. During the switching of the second state to the third state, the first shaft is non-rotatable and the second shaft is rotatable relative to the first component. During the switching of the third state to the fourth state, the first shaft is rotatable relative to the first component and the second shaft is non-rotatable.

Abstract: A memory device includes an array of resistive memory cells with a plurality of word lines connected to the array of resistive memory cells. A voltage compensation controller is configured to determine a word line voltage to be applied to a selected word line of the plurality of word lines. A word line driver is configured apply the determined word line voltage to the selected word line.