Abstract: A close-end fuel cell and an anode bipolar plate thereof are provided. The anode bipolar plate includes an airtight conductive frame and a conductive porous substrate disposed within the airtight conductive frame. In the airtight conductive frame, an edge of a first side has a fuel inlet, and an edge of a second side has a fuel outlet. The conductive porous substrate has at least one flow channel, where a first end of the flow channel communicates with the fuel inlet, a second end of the flow channel communicates with the fuel outlet. The flow channel is provided with a blocking part near the fuel inlet to divide the flow channel into two areas.

Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.

Abstract: A semiconductor structure including a first substrate, a first conductive layer, and first bonding pads is provided. The first conductive layer is located on the first substrate. The first conductive layer includes a main body portion and an extension portion. The extension portion is connected to the main body portion and includes a terminal portion away from the main body portion. The first bonding pads are connected to the main body portion and the extension portion. The number of the first bonding pads connected to the terminal portion of the extension portion is plural.

Abstract: A six-piece optical image capturing system is disclosed. In order from an object side to an image side, the optical lens along the optical axis includes a first lens with refractive power; a second lens with refractive power; a third lens with refractive power; a fourth lens with refractive power; a fifth lens with refractive power, and a sixth lens with negative refractive power. The image-side surface and object-side surface of the sixth lens are aspheric, and at least one surface of the sixth lens has an inflection point. At least one among the first lens to the fifth lens has positive refractive power. The optical lens of the optical image capturing system can increase aperture value and improve the imagining quality for use in compact cameras.

Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.

Abstract: A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.

Abstract: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.

Abstract: A semiconductor structure for wafer level bonding includes a bonding dielectric layer disposed on a substrate and a bonding pad disposed in the bonding dielectric layer. The bonding pad includes a top surface exposed from the bonding dielectric layer, a bottom surface opposite to the top surface, and a sidewall between the top surface and the bottom surface. A bottom angle between the bottom surface and sidewall of the bonding pad is smaller than 90 degrees.

Abstract: A semiconductor structure in which the upper and lower semiconductor wafers are bonded by a hybrid bonding method is provided. The two semiconductor wafers each have discontinuous multiple metal traces or spiral coil-shaped metal traces. By hybrid bonding the two semiconductor wafers, multiple discontinuous metal traces are bonded together to form an inductance element with a continuous and non-intersecting path, or the two spiral coil-shaped metal traces are bonded together to form an inductance element. In this semiconductor structure, the inductance element formed by hybrid bonding has the advantage that the inductance value is easily adjusted.

Abstract: An air-cooling fuel cell stack includes fuel cells, wherein each of the fuel cells includes an anode bipolar plate, a cathode bipolar plate, a membrane electrode assembly (MEA) between the anode and cathode bipolar plates, and an anode sealing member. The MEA includes an anode side structure, a cathode side structure, and an ion conductive membrane (ICM), and the ICM is sandwiched between the anode side structure and the cathode side structure. The anode sealing member is disposed at a periphery of the anode side structure and sandwiched by the anode bipolar plate and the ICM. The anode sealing member includes a first sealing material and a second sealing material, a Shore hardness of the first sealing material is different from that of the second sealing material, and an arrangement direction of the first and second sealing materials is perpendicular to a compression direction of the plurality of fuel cells.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: A surface-treated copper foil including a treating surface, where the root mean square height (Sq) of the treating surface is in a range of 0.20 to 1.50 ?m and the texture aspect ratio (Str) of the treating surface is not greater than 0.65. When the surface-treated copper foil is heated at a temperature of 200° C. for 1 hour, the ratio of the integrated intensity of (111) peak to the sum of the integrated intensities of (111) peak, (200) peak, and (220) peak of the treating surface is at least 60%.

Abstract: A surface-treated copper foil includes a treated surface, where the peak extreme height (Sxp) of the treating surface is 0.4 to 3.0 ?m. When the surface-treated copper foil is heated at a temperature of 200° C. for 1 hour, the ratio of the integrated intensity of diffraction peak of (111) plane to the sum of the integrated intensities of diffraction peaks of (111) plane, (200) plane, and (220) plane of the treating surface is at least 60%.

Abstract: A surface-treated copper foil including a treating surface, where the root mean square height (Sq) of the treating surface is in a range of 0.20 to 1.50 ?m and the texture aspect ratio (Str) of the treating surface is not greater than 0.65. When the surface-treated copper foil is heated at a temperature of 200° C. for 1 hour, the ratio of the integrated intensity of (111) peak to the sum of the integrated intensities of (111) peak, (200) peak, and (220) peak of the treating surface is at least 60%.

Abstract: A semiconductor structure for wafer level bonding includes a bonding dielectric layer disposed on a substrate and a bonding pad disposed in the bonding dielectric layer. The bonding pad includes a top surface exposed from the bonding dielectric layer, a bottom surface opposite to the top surface, and a sidewall between the top surface and the bottom surface. A bottom angle between the bottom surface and sidewall of the bonding pad is smaller than 90 degrees.

Abstract: A close-end fuel cell and an anode bipolar plate thereof are provided. The anode bipolar plate includes an airtight conductive frame and a conductive porous substrate disposed within the airtight conductive frame. In the airtight conductive frame, an edge of a first side has a fuel inlet, and an edge of a second side has a fuel outlet. The conductive porous substrate has at least one flow channel, where a first end of the flow channel communicates with the fuel inlet, a second end of the flow channel communicates with the fuel outlet. The flow channel is provided with a blocking part near the fuel inlet to divide the flow channel into two areas.

Abstract: A semiconductor structure includes a first layer, a second layer, a first interconnection layer, and a second interconnection layer. The first layer includes an upper passive component pattern, and the second layer includes a lower passive component pattern, wherein the upper passive component pattern is opposite to the lower passive component pattern. The first interconnection layer includes at least one first interconnect structure electrically connected on the upper passive component pattern. The second interconnection layer includes at least one second interconnect structure electrically connected on the passive component pattern. The first interconnect structure on the upper passive component pattern is hybrid bonded with the second interconnect structure on the lower passive component pattern. Therefore, the upper passive component pattern and the lower passive component pattern are joined by hybrid bonding to form a passive device.

Abstract: An air-cooling fuel cell stack includes fuel cells, wherein each of the fuel cells includes an anode bipolar plate, a cathode bipolar plate, a membrane electrode assembly (MEA) between the anode and cathode bipolar plates, and an anode sealing member. The MEA includes an anode side structure, a cathode side structure, and an ion conductive membrane (ICM), and the ICM is sandwiched between the anode side structure and the cathode side structure. The anode sealing member is disposed at a periphery of the anode side structure and sandwiched by the anode bipolar plate and the ICM. The anode sealing member includes a first sealing material and a second sealing material, a Shore hardness of the first sealing material is different from that of the second sealing material, and an arrangement direction of the first and second sealing materials is perpendicular to a compression direction of the plurality of fuel cells.