Abstract: A semiconductor device includes a substrate and a gate structure on the substrate, in which the gate structure includes a high-k dielectric layer on the substrate and a bottom barrier metal (BBM) layer on the high-k dielectric layer. Preferably, the BBM layer includes a top portion, a middle portion, and a bottom portion, the middle portion being a nitrogen rich portion, the top portion and the bottom portion being titanium rich portions, and the top portion, the middle portion, and the bottom portion are of same material composition.

Abstract: A semiconductor device includes a substrate and a gate structure on the substrate, in which the gate structure includes a high-k dielectric layer on the substrate and a bottom barrier metal (BBM) layer on the high-k dielectric layer. Preferably, the BBM layer includes a top portion, a middle portion, and a bottom portion, the middle portion being a nitrogen rich portion, the top portion and the bottom portion being titanium rich portions, and the top portion, the middle portion, and the bottom portion are of same material composition.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate and a gate structure on the substrate. The gate structure includes a high-k dielectric layer on the substrate and a bottom barrier metal (BBM) layer on the high-k dielectric layer. Preferably, the BBM layer includes a top portion, a middle portion, and a bottom portion, in which the top portion being a nitrogen rich portion, and the middle portion and the bottom portion being titanium rich portions.

Abstract: An electrocatalyst is provided. The electrocatalyst includes Pd-containing metal nitride, wherein the metal is Co, Fe, Y, Lu, Sc, Ti, V, Cu, Ni, or a combination thereof. The molar ratio between the metal and Pd is greater than 0 and less than or equal to 0.8. A fuel cell utilizing the above electrocatalyst is further provided.

Abstract: An oxide semiconductor device includes an oxide semiconductor transistor and a protection wall. The protection wall extends in a vertical direction and surrounds the oxide semiconductor transistor. The oxide semiconductor transistor includes a first oxide semiconductor layer, and a bottom surface of the protection wall is lower than the first oxide semiconductor layer in the vertical direction. In the oxide semiconductor device of the present invention, the protection wall is used to surround the oxide semiconductor transistor for improving the ability of blocking environment substances from entering the oxide semiconductor transistor. The electrical stability and product reliability of the oxide semiconductor device are enhanced accordingly.

Abstract: A metal gate transistor includes a substrate, a metal gate on the substrate, and a source/drain region in the substrate adjacent to the metal gate. The metal gate includes a high-k dielectric layer, a bottom barrier metal (BBM) layer comprising TiSiN on the high-k dielectric layer, a TiN layer on the BBM layer, a TiAl layer between the BBM layer and the TiN layer, and a low resistance metal layer on the TiN layer.

Abstract: A metal gate transistor includes a substrate, a metal gate on the substrate, and a source/drain region in the substrate adjacent to the metal gate. The metal gate includes a high-k dielectric layer, a bottom barrier metal (BBM) layer comprising TiSiN on the high-k dielectric layer, a TiN layer on the BBM layer, a TiAl layer between the BBM layer and the TiN layer, and a low resistance metal layer on the TiN layer.

Abstract: A gateway, system and method for multiple radio access technology service are provided. The gateway is between base stations and a core network, including a receiving module, determining module and processing module. The receiving module receives a packet from the base stations or the core network through a tunnel between the base stations and the core network. The determining module determines whether the packet has a virtual IP header. If the packet has a virtual IP header, the processing module deletes the virtual IP header and replaces it with a tunnel header to transmit the packet to the core network through the tunnel by the tunnel header. If the packet has no virtual IP header, the processing module forwards the packet to the core network through the tunnel. The disclosure enhances transmitting and processing performance of the packet when the packet is transmitted through only a single tunnel.

Abstract: The present invention provides a complementary metal oxide semiconductor device, comprising a PMOS and an NMOS. The PMOS has a P type metal gate, which comprises a bottom barrier layer, a P work function metal (PWFM) layer, an N work function tuning (NWFT) layer, an N work function metal (NWFM) layer and a metal layer. The NMOS has an N type metal gate, which comprises the NWFT layer, the NWFM layer and the low-resistance layer. The present invention further provides a method of forming the same.

Abstract: A semiconductor device having metal gate includes a first metal gate structure and a second metal gate structure disposed in a first device region and in a second device region on a substrate respectively. The first metal gate structure includes a gate insulating layer, a first bottom barrier layer, a top barrier layer, and a metal layer disposed on the substrate in order, wherein the top barrier layer is directly in contact with the first bottom barrier layer. The second metal gate structure includes the gate insulating layer, a second bottom barrier layer, the top barrier layer, and the metal layer on the substrate in order, wherein the top barrier layer is directly in contact with the second bottom barrier layer. The first bottom barrier layer and the second bottom barrier layer have different impurity compositions.

Abstract: A gateway, system and method for multiple radio access technology service are provided. The gateway is between base stations and a core network, including a receiving module, determining module and processing module. The receiving module receives a packet from the base stations or the core network through a tunnel between the base stations and the core network. The determining module determines whether the packet has a virtual IP header. If the packet has a virtual IP header, the processing module deletes the virtual IP header and replaces it with a tunnel header to transmit the packet to the core network through the tunnel by the tunnel header. If the packet has no virtual IP header, the processing module forwards the packet to the core network through the tunnel. The disclosure enhances transmitting and processing performance of the packet when the packet is transmitted through only a single tunnel.

Abstract: A bipolar plate for a fuel cell is provided. The bipolar plate for the fuel cell has a plurality of flow channels, and a rib is defined between neighboring two flow channels. A side surface of the rib is non-porous. A top surface of the rib may be a roughened surface in order to improve performance of the fuel cell.

Abstract: A semiconductor device having metal gate includes a first metal gate structure and a second metal gate structure disposed in a first device region and in a second device region on a substrate respectively. The first metal gate structure includes a gate insulating layer, a first bottom barrier layer, a top barrier layer, and a metal layer disposed on the substrate in order, wherein the top barrier layer is directly in contact with the first bottom barrier layer. The second metal gate structure includes the gate insulating layer, a second bottom barrier layer, the top barrier layer, and the metal layer on the substrate in order, wherein the top barrier layer is directly in contact with the second bottom barrier layer. The first bottom barrier layer and the second bottom barrier layer have different impurity compositions.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate and a gate structure on the substrate. The gate structure includes a high-k dielectric layer on the substrate and a bottom barrier metal (BBM) layer on the high-k dielectric layer. Preferably, the BBM layer includes a top portion, a middle portion, and a bottom portion, in which the top portion being a nitrogen rich portion, and the middle portion and the bottom portion being titanium rich portions.

Abstract: A manufacturing method of semiconductor devices having metal gate includes following steps. A substrate having a first semiconductor device and a second semiconductor device formed thereon is provided. The first semiconductor device includes a first gate trench and the second semiconductor device includes a second gate trench. A first work function metal layer is formed in the first gate trench and the second gate trench. A portion of the first work function metal layer is removed from the second gate trench. A second work function metal layer is formed in the first gate trench and the second gate trench. The second work function metal layer and the first work function metal layer include the same metal material. A third work function metal layer and a gap-filling metal layer are sequentially formed in the first gate trench and the second gate trench.

Abstract: A fabrication method of semiconductor device having metal gate includes providing a substrate, successively forming a gate insulating layer and a bottom barrier layer on the surface of the substrate, forming a work function layer covering the bottom barrier layer, removing the work function layer, and forming a top barrier layer on the bottom barrier layer to be directly contact with the bottom barrier layer, and forming a metal layer on the top bottom barrier layer.

Abstract: A semiconductor device and a method of forming the same, the semiconductor device include a substrate, and a first transistor, a second transistor and a third transistor all disposed on the substrate. The first transistor includes a first channel, and a first barrier layer and a first work function layer stacked with each other on the first channel. The second transistor includes a second channel, and a second barrier layer and a second work function layer stacked with each other. The third transistor includes a third channel and a third barrier layer and a third work function layer stacked with each other on the third channel, wherein the first barrier layer, the second barrier layer and the third barrier layer have different nitrogen ratio. The first, the second and the third transistors have different threshold voltages, respectively.

Abstract: A bipolar plate and a fuel cell are provided. The bipolar plate for the fuel cell has a plurality of flow channels, and a rib is defined between neighboring two flow channels. A top surface of the rib may be a roughened surface or have a porous structure in order to improve performance of the fuel cell.

Abstract: A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided. Then, the dummy gate electrode layer is removed to form an opening in the dummy gate structure, thereby exposing an underlying layer beneath the dummy gate electrode layer. Then, an ammonium hydroxide treatment process is performed to treat the dummy gate structure. Afterwards, a metal material is filled into the opening.

Abstract: The present invention provides a complementary metal oxide semiconductor device, comprising a PMOS and an NMOS. The PMOS has a P type metal gate, which comprises a bottom barrier layer, a P work function metal (PWFM) layer, an N work function tuning (NWFT) layer, an N work function metal (NWFM) layer and a metal layer. The NMOS has an N type metal gate, which comprises the NWFT layer, the NWFM layer and the low-resistance layer. The present invention further provides a method of forming the same.