Patents by Inventor Chien-Ming Lai

Chien-Ming Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090242997
    Abstract: A method for fabricating a semiconductor structure is disclosed. A substrate with a first transistor having a first dummy gate and a second transistor having a second dummy gate is provided. The conductive types of the first transistor and the second transistor are different. The first and second dummy gates are simultaneously removed to form respective first and second openings. A high-k dielectric layer, a second type conductive layer and a first low resistance conductive layer are formed on the substrate and fill in the first and second openings, with the first low resistance conductive layer filling up the second opening. The first low resistance conductive layer and the second type conductive layer in the first opening are removed. A first type conductive layer and a second low resistance conductive layer are then formed in the first opening, with the second low resistance conductive layer filling up the first opening.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Hao Yu, Li-Wei Cheng, Che-Hua Hsu, Tian-Fu Chiang, Cheng-Hsien Chou, Chien-Ming Lai, Yi-Wen Chen, Chien-Ting Lin, Guang-Hwa Ma
  • Publication number: 20090236669
    Abstract: A method for fabricating metal gate transistors and a polysilicon resistor is disclosed. First, a substrate having a transistor region and a resistor region is provided. A polysilicon layer is then formed on the substrate to cover the transistor region and the resistor region of the substrate. Next, a portion of the polysilicon layer disposed in the resistor is removed, and the remaining polysilicon layer is patterned to create a step height between the surface of the polysilicon layer disposed in the transistor region and the surface of the polysilicon layer disposed in the resistor region.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Inventors: Yi-Wen Chen, Li-Wei Cheng, Che-Hua Hsu, Chih-Hao Yu, Cheng-Hsien Chou, Chien-Ming Lai, Tian-Fu Chiang, Chien-Ting Lin, Guang-Hwa Ma
  • Publication number: 20090206415
    Abstract: A semiconductor element structure includes a first MOS having a first high-K material and a first metal for use in a first gate, a second MOS having a second high-K material and a second metal for use in a second gate and a bridge channel disposed in a recess connecting the first gate and the second gate for electrically connecting the first gate and the second gate, wherein the bridge channel is embedded in at least one of the first gate and the second gate.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 20, 2009
    Inventors: Tian-Fu Chiang, Li-Wei Cheng, Che-Hua Hsu, Chih-Hao Yu, Cheng-Hsien Chou, Chien-Ming Lai, Yi-Wen Chen, Chien-Ting Lin, Guang-Hwa Ma
  • Publication number: 20060254931
    Abstract: The present invention provides a new method to obtain an effective diffusivity for a certain substance in solutions that diffuse through a porous material. The porous material initially separates two solutions that are different in concentration of the substance. The concentration gradient gives rise to diffusion through the porous material, The concentration change of the substance in the low-concentration compartment is detected through a measurement of the electrochemical impedance data. By means of the measurement, an effective diffusivity coefficient of the substance through the porous material is calculated.
    Type: Application
    Filed: November 23, 2005
    Publication date: November 16, 2006
    Inventors: Jing-Chie Lin, Chien-Ming Lai
  • Patent number: 6852643
    Abstract: A method for using ammonium fluoride solution in a photoelectrochemical etching process of a silicon wafer, comprising steps of: placing a wafer after the pre-etching process into an alcohol solution for activating the surface of wafer and into an ammonium fluoride solution as an etching solution; and illuminating the back of wafer with a halogen light and performing a photoelectrochemical etching process in a potentiostatic.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: February 8, 2005
    Assignee: National Central University
    Inventors: Jing-Chie Lin, Chih-Chang Tsai, Chien-Ming Lai, Wen-Chu Hsiao