Abstract: A multi-chip stack structure and a fabrication method thereof are proposed, including providing a leadframe having a die base and a plurality of leads and disposing a first and a second chips on the two surfaces of the die base respectively; disposing the leadframe on a heating block having a cavity in a wire bonding process with the second chip received in the cavity of the heating block; performing a first wire bonding process to electrically connect the first chip to the leads through a plurality of first bonding wires, and forming a bump on one side of the leads connected with the first bonding wires; disposing the leadframe in an upside down manner to the heating block via the bump with the first chip and the first bonding wires received in the cavity of the heating block; and performing a second wire bonding process to electrically connect the second chip to the leads through a plurality of second bonding wires.

Abstract: A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.

Abstract: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

Abstract: A chip scale package structure and a method for fabricating the same are disclosed. The method includes forming metal pads on a predetermined part of a carrier; mounting chips on the carrier, each of the chips having a plurality of conductive bumps soldered to the metal pads; forming an encapsulant on the carrier to encapsulate the chips and the conductive bumps; removing the carrier to expose the metal pads and even the metal pads with a surface of the encapsulant; forming on the encapsulant a plurality of first conductive traces electrically connected to the metal pads; applying a solder mask on the first conductive traces, and forming a plurality of openings on the solder mask to expose a predetermined part of the first conductive traces; forming a plurality of conductive elements on the predetermined part; and cutting the encapsulant to form a plurality of chip scale package structures.

Abstract: A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.

Abstract: A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.

Abstract: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

Abstract: A semiconductor package without a chip carrier includes an insulating structure having an opening; an electroplated die pad provided in the opening; a chip attached to the electroplated die pad by a thermally conductive adhesive; a plurality of electrical contacts formed around the electroplated die pad, wherein at least one of the electrical contacts is provided on a top surface of the insulating structure, and the chip is electrically connected to the electrical contacts; and an encapsulant for encapsulating the chip, the insulating structure and the electrical contacts, wherein bottom surfaces of the insulating structure, the electroplated die pad and the electrical contacts, except the at least one electrical contact provided on the top surface of the insulating structure, are exposed from the encapsulant and are flush with a bottom surface of the encapsulant. A fabrication method of the semiconductor package is also provided.

Abstract: A semiconductor package on which a semiconductor device can be stacked and fabrication method thereof are provided. The fabrication method includes the steps of mounting and electrically connecting at least one semiconductor chip on the substrate, mounting an electrical connecting structure consisting of an upper layer circuit board and a lower layer circuit board on the substrate and electrically connecting the electrical connecting structure to the substrate, where the semiconductor chip is received in a receiving space formed in the electrical connecting structure; forming an encapsulant on the substrate encapsulating the semiconductor chip and the electrical connecting structure, and after the encapsulant is formed, exposing top surface of the upper layer circuit board with a plurality of solder pads from the encapsulant to allow at least one semiconductor device to electrically connect the upper layer circuit board so as to form a stack structure.

Abstract: A semiconductor package and a fabrication method are disclosed. The fabrication method includes applying a sacrificial layer on one surface of a metal carrier, applying an insulation layer on the sacrificial layer, and forming through holes in the sacrificial layer and the insulation layer to expose the metal carrier; forming a conductive metallic layer in each through hole; forming a patterned circuit layer on the insulation layer to be electrically connected to the conductive metallic layer; mounting at least a chip on the insulation layer and electrically connecting the chip to the patterned circuit layer; forming an encapsulant to encapsulate the chip and the patterned circuit layer; and removing the metal carrier and the sacrificial layer to expose the insulation layer and conductive metallic layer to allow the conductive metallic layer to protrude from the insulation layer.

Abstract: A semiconductor package with a heat dissipating device and a fabrication method of the semiconductor package are provided. A chip is mounted on a substrate. The heat dissipating device is mounted on the chip, and includes an accommodating room, and a first opening and a second opening that communicate with the accommodating room. An encapsulant is formed between the heat dissipating device and the substrate to encapsulate the chip. A cutting process is performed to remove a non-electrical part of structure and expose the first and second openings from the encapsulant. A cooling fluid is received in the accommodating room to absorb and dissipate heat produced by the chip. The heat dissipating device covers the encapsulant and the chip to provide a maximum heat transfer area for the semiconductor package.

Abstract: A semiconductor device and a fabrication method thereof are provided. A semiconductor substrate having a plurality of bonding pads is prepared, and a first passivation layer, a second passivation layer and a metallic layer are successively formed on the semiconductor substrate. A third passivation layer is further applied on the semiconductor substrate and has a plurality of openings for exposing a portion of the metallic layer, wherein each of the openings is shifted in position from a corresponding one of the bonding pads by a distance not exceeding a radius of the bonding pad. A plurality of solder bumps are bonded to the exposed portion of the metallic layer and have a larger contact area with the third passivation layer. This provides better buffer to reduce stress exerted on the solder bumps, thereby preventing problems of cracking and delamination as in the prior art.

Abstract: A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.

Abstract: A semiconductor package and a fabrication method are disclosed. The fabrication method includes applying a sacrificial layer on one surface of a metal carrier, applying an insulation layer on the sacrificial layer, and forming through holes in the sacrificial layer and the insulation layer to expose the metal carrier; forming a conductive metallic layer in each through hole; forming a patterned circuit layer on the insulation layer to be electrically connected to the conductive metallic layer; mounting at least a chip on the insulation layer and electrically connecting the chip to the patterned circuit layer; forming an encapsulant to encapsulate the chip and the patterned circuit layer; and removing the metal carrier and the sacrificial layer to expose the insulation layer and conductive metallic layer to allow the conductive metallic layer to protrude from the insulation layer.

Abstract: A semiconductor package with build-up layers formed on a chip and a fabrication method of the semiconductor package are provided. A chip with a plurality of conductive bumps formed on bond pads thereof is received within a cavity of a carrier, and a dielectric layer encapsulates the conductive bumps whose ends are exposed. A plurality of conductive traces are formed on the dielectric layer and electrically connected to the ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with openings via which predetermined portions of the conductive traces are exposed and bonded to a plurality of solder balls. Thereby, positions of the bond pads are easily recognized and distinguished by the exposed ends of the conductive bumps, making the conductive traces capable of being well electrically connected through the conductive bumps to the bond pads to improve yield of the fabricated packages.

Abstract: A semiconductor package device, a semiconductor package structure, and fabrication methods thereof are provided, which mainly includes disposing a plurality of semiconductor chips on a wafer formed with TSVs (Through Silicon Vias) and electrically connecting the semiconductor chips to the TSVs; encapsulating the semiconductor chips with an encapsulant; and disposing a hard component on the encapsulant. The hard component ensures flatness of the wafer during a solder bump process and provides support to the wafer during a singulation process such that the wafer can firmly lie on a singulation carrier, thereby overcoming the drawbacks of the prior art, namely difficulty in mounting of solder bumps, and difficulty in cutting of the wafer.

Abstract: A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; a heat spreader having a first surface, an opposed second surface and a hollow structure, the second surface of the heat spreader being mounted on the chip, wherein the chip is larger in size than the hollow structure such that the chip is partly exposed to the hollow structure; an encapsulant formed between the heat spreader and the chip carrier, for encapsulating the chip, wherein the first surface and sides of the heat spreader are exposed from the encapsulant to dissipate heat produced from the chip; and a plurality of conductive elements disposed on the chip carrier, for electrically connecting the chip to an external device. The present invention also provides a method for fabricating the heat dissipating package structure.

Abstract: A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.

Abstract: A semiconductor device and a manufacturing method thereof are disclosed. The method includes the steps of providing a carrier board having conductive circuits disposed thereon and a plurality of chips with active surfaces having solder pads disposed thereon, wherein conductive bumps are disposed on the solder pads; mounting chips on the carrier board; filling the spacing between the chips with a dielectric layer and forming openings in the dielectric layer at periphery of each chip to expose the conductive circuits; forming a metal layer in the openings of the dielectric layer and at periphery of the active surface of the chips for electrically connecting the conductive bumps and the conductive circuits; and cutting along the dielectric layer between the chips and removing the carrier board to separate each chip and exposing the conductive circuits from the non-active surface.

Abstract: This invention provides a semiconductor package and a method for fabricating the same. The method includes: forming a first resist layer on a metal carrier; forming a plurality of openings penetrating the first resist layer; forming a conductive metal layer in the openings; removing the first resist layer; covering the metal carrier having the conductive metal layer with a dielectric layer; forming blind vias in the dielectric layer to expose a portion of the conductive metal layer; forming conductive circuit on the dielectric layer and conductive posts in the blind vias, such that the conductive circuit is electrically connected to the conductive metal layer via the conductive posts; electrically connecting at least one chip to the conductive circuit; forming an encapsulant for encapsulating the chip and the conductive circuit; and removing the metal carrier, thereby allowing a semiconductor package to be formed without a chip carrier.