Patents by Inventor Chih Chen

Chih Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936238
    Abstract: An uninterruptible power apparatus is coupled between a power grid and a load. The uninterruptible power apparatus includes a bypass path, a power conversion module, and a control module. The bypass path is coupled to the power grid through a grid terminal, and coupled to the load through a load terminal. The control module turns off a first thyristor and a second thyristor by injecting a second voltage into the load terminal during a forced commutation period. The control module calculates a magnetic flux offset amount based on an error amount between the second voltage and a voltage command, and provides a compensation command in response to the magnetic flux offset amount. The control module controls the DC/AC conversion circuit to provide a third voltage to the load terminal based on the compensation command and the voltage command.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: March 19, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hsin-Chih Chen, Hung-Chieh Lin, Chao-Lung Kuo, Yi-Ping Hsieh, Chien-Shien Lee
  • Patent number: 11937266
    Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, a grant is received from a network node. The grant allocates a set of sidelink data resources. One or more sidelink data transmissions are performed on the set of sidelink data resources. A second feedback information associated with the one or more sidelink data transmissions is received and/or detected. An uplink resource is derived. A first feedback information is transmitted on the uplink resource to the network node. The first feedback information is set based upon the second feedback information.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: March 19, 2024
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Li-Chih Tseng, Wei-Yu Chen, Li-Te Pan
  • Publication number: 20240090314
    Abstract: Provided are organic light emitting devices (OLED) comprising an anode; a cathode, and an organic layer between the anode and the cathode, the organic layer comprising a light-emitting dopant within a host material, the light-emitting dopant being an optically active Pt complex comprising a tetradentate ligand; wherein one enantiomer of the optically active Pt complex is present in an enantiomeric excess (ee) of at least 5%. Further provided are OLEDs comprising an anode, a cathode, and an organic layer between the anode and the cathode, the organic layer the organic layer comprising a light-emitting chiral dopant within a chiral host material, the light-emitting chiral dopant being an optically active complex; wherein one enantiomer of the optically active complex of the chiral dopant is present in an ee of at least 5%, and wherein one enantiomer of the chiral host material is present in an ee of at least 5%.
    Type: Application
    Filed: July 14, 2023
    Publication date: March 14, 2024
    Applicant: UNIVERSAL DISPLAY CORPORATION
    Inventors: Ting-Chih WANG, Hsiao-Fan CHEN, Geza SZIGETHY, Joseph A. MACOR, Neil PALMER, Jerald FELDMAN, Jason BROOKS
  • Publication number: 20240088001
    Abstract: A semiconductor device package includes a carrier, an electronic component, a connection element and an encapsulant. The electronic component is disposed on a surface of the carrier. The connection element is disposed on the surface and adjacent to an edge of the carrier. The encapsulant is disposed on the surface of the carrier. A portion of the connection element is exposed from an upper surface and an edge of the encapsulant.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 14, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE, Chun Chen CHEN, Cheng Yuan CHEN
  • Publication number: 20240088154
    Abstract: The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed directly on an upper surface of the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Kong-Beng Thei, Ming Chyi Liu, Shih-Chung Hsiao, Jhih-Bin Chen
  • Publication number: 20240081649
    Abstract: A wearable device and a method for performing a registration process in the wearable device are provided. The wearable device includes a light source, a light sensor and a microcontroller that performs the method. In the method, the light source is activated to emit a detection light and the light sensor senses a reflected light. A light intensity of the reflected light is calculated. Specifically, an upper limit and a lower limit are referred to for detecting whether the wearable device is properly worn by a person. For example, since the wearable device can be worn on the person's wrist, the registration value is used to detect whether the wearable device is away from the wrist.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: CHUN-CHIH CHEN, YUNG-CHANG LIN, MING-HSUAN KU
  • Publication number: 20240087896
    Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Chih-Min HSIAO, Chien-Wen LAI, Ru-Gun LIU, Chih-Ming LAI, Shih-Ming CHANG, Yung-Sung YEN, Yu-Chen CHANG
  • Patent number: 11925457
    Abstract: A device for encouraging and guiding a spirometer user includes a housing, a main valve, a visual assembly, and a sound making assembly. The housing has a guiding channel, a first outlet channel, a second outlet channel, and an inlet channel. The main valve is disposed in a housing communicating with the guiding channel, the first outlet channel, the second outlet channel or the inlet channel and configured to regulate or control fluid flowing paths. The visual assembly includes a check valve in the second outlet channel, and at least one movable member. The sound making assembly includes a check valve and a sound maker. So, it can generate the visual and sound encouraging effects for learning how to use a spirometer correctly.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: March 12, 2024
    Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, CENTRAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Ming-Feng Wu, Yu-Hsuan Chen, Kuo-Chih Su, Chun-Hsiang Wang
  • Patent number: 11927555
    Abstract: The design and structure of a fluidic concentration metering device with a full dynamic range utilizing micro-machined thermal time-of-flight sensing elements is exhibited in this disclosure. With an additional identical sensing chip but packaged at the different locations in the measurement fluidic chamber with a closed conduit, the device can simultaneously measure the fluidic concentration and the fluidic flowrate. With a temperature thermistor integrated on the same micro-machined thermal sensing chip, the disclosed device will be able to provide the key processing parameters for the fluidic applications.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: March 12, 2024
    Assignee: Siargo Ltd.
    Inventors: Liji Huang, Yahong Yao, Li Chen, Chih-Chang Chen
  • Patent number: 11927793
    Abstract: A double-sided display device includes a first panel, a second panel, a light guide plate and a light source. The second panel is arranged opposite to the first panel. The light guide plate is arranged between the first panel and the second panel, and includes a main body portion including a first surface and a second surface, a first pattern arranged on the first surface, and a second pattern arranged on the second surface. The light source is arranged adjacent to the light guide plate. The first pattern is different from the second pattern.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: March 12, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Yi-Hui Lee, Kuan-Chou Chen, Yung-Chih Cheng
  • Patent number: 11929561
    Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: March 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: I-Shu Lee, Chih-Hung Cho, Hau Yuen Tan, Chien-Yi Wu, Po-Sheng Chen, Chao-Hsu Wu, Yi Chen, Hung-Ming Yu, Chih-Chien Hsieh
  • Patent number: 11928416
    Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Chih Ou, Kuo-Fu Lee, Wen-Hao Chen, Keh-Jeng Chang, Hsiang-Ho Chang
  • Publication number: 20240075082
    Abstract: Provided is a composition including a lactic acid bacterium and a carrier thereof for prophylaxis or treatment of an allergy. The lactic acid bacterium is Lactobacillus paragasseri, such as Lactobacillus paragasseri BBM171 deposited under DSMZ Accession No. DSM 34311. Also provided is a method for preventing or treating an allergy in a subject that includes administering an effective amount of the composition of Lactobacillus paragasseri to the subject.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 7, 2024
    Inventors: Ying-Chieh Tsai, Yu-Hsuan Wei, Chih-Chieh Hsu, Chien-Chen Wu
  • Patent number: 11923630
    Abstract: An electrical connector assembly includes: a bracket; and at least one transmission assembly mounted to the bracket and including an internal printed circuit board (PCB), a board-mount connector connected to a first row of conductive pads disposed at a bottom end portion of the PCB, and a plug-in connector connected to a second row of conductive pads disposed at a front end portion of the PCB, wherein the PCB has a third row of conductive pads disposed at a rear end portion thereof.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: March 5, 2024
    Assignees: FUDING PRECISION INDUSTRY (ZHENGZHOU) CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Shih-Wei Hsiao, Yu-San Hsiao, Yen-Chih Chang, Yu-Ke Chen, Na Yang, Wei-Hua Zhang
  • Patent number: 11923466
    Abstract: A photodetector with an integrated reflective grating structure includes a substrate, an active layer disposed on the substrate, and a grating structure disposed between the substrate and the active layer. A first doped region is formed on the substrate at a location near the grating structure. A second doped region is formed on a surface of the active layer away from the grating structure. The doping type of the second doped region is different from that of the first doped region.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: March 5, 2024
    Assignee: INNOLIGHT TECHNOLOGY (SUZHOU) LTD.
    Inventors: Chih-Kuo Tseng, Guoliang Chen, Xiaoyao Li, Yuzhou Sun, Yue Xiao
  • Publication number: 20240074033
    Abstract: A power module includes a power circuit board, a signal pin, a shielding substrate, and an electrically insulating component. The signal pin is disposed and stands on the power circuit board. The shielding substrate is located above the power circuit board and spaced apart from the power circuit board. The shielding substrate has a first through hole. The signal pin is disposed through the first through hole. The electrically insulating component surrounds the signal pin. The electrically insulating component has a second through hole. The signal pin is disposed through the second through hole. The signal pin is spaced apart from the shielding substrate by a distance by the electrically insulating component.
    Type: Application
    Filed: April 18, 2023
    Publication date: February 29, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Wen-Chih CHEN
  • Publication number: 20240066664
    Abstract: The present disclosure relates to a pad surface cleaning system to be used with a conditioning module to condition a polishing surface of a polishing pad. The pad surface cleaning system may be used to spray the polishing surface with a high-pressure fluid spray to loosen debris from the polishing surface. The pad surface cleaning system may also be used to remove the loosened debris. Further, the pad surface cleaning system may isolate a conditioning disk from a polishing fluid to protect the conditioning disk from reacting with the polishing fluid.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 29, 2024
    Inventors: Shou-Sung CHANG, Hui CHEN, Haosheng WU, Jianshe TANG, Sidney P. HUEY, Jeonghoon OH, Chad POLLARD, Chih Chung CHOU, Sameer A. DESHPANDE
  • Publication number: 20240068903
    Abstract: This invention is a methodology, called CFD-based AIC generator, that can generate CFD-based structurally-independent Aerodynamic Influence Coefficient (AIC) matrices. Because the AIC matrices are independent of structure, they can be repeatedly used during the flight vehicle's structural design cycle for a fixed aerodynamic configuration to rapidly generate flutter, aeroservoelastic (ASE), and dynamic loads solutions. Inputs to processing include a CFD surface mesh, a coarsening ratio criterion, and a mid-layer panel model. The coarsening ratio criterion is computed from the CFD mesh. The mid-layer panel model is comprised of coarsened grid points derived from the CFD mesh and the coarsening ratio criterion.
    Type: Application
    Filed: August 18, 2022
    Publication date: February 29, 2024
    Inventor: Pin-Chih Chen
  • Publication number: 20240069592
    Abstract: An enclosure for an electronic device has a staggered materials corner structure. The enclosure includes an integral metal frame defining exterior sides of the enclosure. The integral metal frame has a tab inset and not visible at a corner of the enclosure. The enclosure includes either or both of first and second materials molded around the tab. The tab of the integral metal frame and either or both of the first and second materials define the staggered materials corner structure of the enclosure.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Wen-Chih Chen, Po-Feng Chuang
  • Publication number: 20240069619
    Abstract: A method, system, and article provide image processing with power reduction while using universal serial bus cameras.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: Intel Corporation
    Inventors: Ko Han Wu, Thiam Wah Loh, Kenneth K. Lau, Wen-Kuang Yu, Ming-Jiun Chang, Andy Yeh, Wei Chih Chen