Abstract: A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.

Abstract: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connecting with the conductive part, a second porous low-k layer over the first porous low-k layer and the damascene structure, and a UV cutting layer at least between the first and the second porous low-k layers, wherein the UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.

Abstract: A method for fabricating an interconnect structure is described. A substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted. A damascene structure is formed in the first porous low-k layer to electrically connect with the conductive part, and then a first UV-absorption layer is formed on the first porous low-k layer and the damascene structure. A second porous low-k layer is formed on the first UV-absorption layer, and a second UV-curing step is conducted.

Abstract: A stress layer structure disposed on a substrate including a device region and a non-device region is provided. The device region includes active regions and a non-active region. The stress layer structure has stress patterns, at least one partition line, and at least one dummy stress pattern. Each of the stress patterns is disposed on the substrate of each of the active regions, respectively. The partition line exposes a portion of the substrate and divides the two adjacent stress patterns. The dummy stress pattern is disposed on the substrate in the partition line.

Abstract: A method for instant on multimedia playing is provided, which enables a computer to selectively enter an operation mode of an IOMP (Instant On Multimedia Player) program when it enters a power conservation mode. First, a computer system stays in the power conservation mode, until an IOMP activating signal has been received. Next, the computer system saves the hardware information of the computer into a memory. And then a processor of the computer reads an IOMP program from another memory and executes the IOMP program to produce and display a human-computer interface menu, which is provided for users to select files for playing. Next, the processor executes the IOMP program to play the files selected previously. Finally, upon the receipt of a recovery instruction, the computer system saves the hardware information back into the computer to recover the computer to the power conservation mode.

Abstract: A high performance focusing actuator of a voice coil motor comprises a retaining unit having a plastic retaining frame; a center portion of the plastic retaining frame being a receiving space; two opposite corners of the receiving space being chamfered; an inner side of each chamfered side being formed with a slide portion; and a metal rear cover plate having a shape corresponding to that of the plastic retaining frame; the metal rear cover plate having an open space coaxial with the receiving space of the plastic retaining frame; an outer side of the metal rear cover plate having four outer plates; each of two opposite corners of each outer plate being formed with an inclined guide surface corresponding to the slide portion of the plastic retaining frame; an iron receiving gap being formed between an inclined guide surface and outer plate; and each iron receiving gap receiving a magnet.

Abstract: A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.

Abstract: A method for fabricating an interconnect structure is described. A substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted. A damascene structure is formed in the first porous low-k layer to electrically connect with the conductive part, and then a first UV-absorption layer is formed on the first porous low-k layer and the damascene structure. A second porous low-k layer is formed on the first UV-absorption layer, and a second UV-curing step is conducted.

Abstract: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connecting with the conductive part, a second porous low-k layer over the first porous low-k layer and the damascene structure, and a UV cutting layer at least between the first and the second porous low-k layers, wherein the UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.

Abstract: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connecting with the conductive part, a second porous low-k layer over the first porous low-k layer and the damascene structure, and a UV-absorption layer at least between the first and the second porous low-k layers.

Abstract: A method for instant on multimedia playing is provided, which enables a computer to selectively enter an operation mode of an IOMP (Instant On Multimedia Player) program when it enters a power conservation mode. First, a computer system stays in the power conservation mode, until an IOMP activating signal has been received. Next, the computer system saves the hardware information of the computer into a memory. And then a processor of the computer reads an IOMP program from another memory and executes the IOMP program to produce and display a human-computer interface menu, which is provided for users to select files for playing. Next, the processor executes the IOMP program to play the files selected previously. Finally, upon the receipt of a recovery instruction, the computer system saves the hardware information back into the computer to recover the computer to the power conservation mode.

Abstract: A method of fabricating a stacked structure for forming a damascene process is described. A doped dielectric layer is formed on a substrate. A surface treatment is performed to the dielectric layer to make the dopant concentration in an upper surface layer of the dielectric layer lower than that in the other portions of the dielectric layer. A metal hard mask is then formed on the dielectric layer. Since the dopant conc. in the upper surface layer of the dielectric layer is lowered, the reaction between the metal hard mask and the dopant in the dielectric layer can be inhibited.

Abstract: A method of fabricating a stacked structure for forming a damascene process is described. A doped dielectric layer is formed on a substrate. A surface treatment is performed to the dielectric layer to make the dopant concentration in an upper surface layer of the dielectric layer lower than that in the other portions of the dielectric layer. A metal hard mask is then formed on the dielectric layer. Since the dopant conc. in the upper surface layer of the dielectric layer is lowered, the reaction between the metal, hard mask and the dopant in the dielectric layer can be inhibited.

Abstract: A dielectric layer overlying a substrate is prepared. A damascene opening is etched into the dielectric layer. The damascene opening is filled with copper or copper alloy. A surface of the copper or copper alloy is treated with hydrogen-containing plasma such as H2 or NH3 plasma. The treated surface of the copper or copper alloy then reacts with trimethylsilane or tertramethylsilane under plasma enhanced chemical vapor deposition (PECVD) conditions. Subsequently, by PECVD, a silicon carbide layer is in-situ deposited on the copper or copper alloy.

Abstract: A manufacturing method of interconnect is provided. A dielectric layer is provided. A metal layer is formed in the dielectric layer. A fluorine-containing barrier layer is formed on the dielectric layer and covers the metal layer. The fluorine-containing barrier layer is formed by using chemical deposition method and introducing fluorine to the film in-situ.

Abstract: An inlaid copper/barrier interconnect includes a semiconductor substrate; a carbon-doped oxide (CDO) dielectric layer disposed over the semiconductor substrate; a damascene recess etched into the CDO dielectric layer; an alpha-phase tantalum (?-Ta) single-layer barrier sputter deposited on sidewall and bottom of the damascene recess; and a conductive layer deposited directly on the alpha-phase tantalum single-layer barrier, wherein the conductive layer fills the damascene recess. According to one preferred embodiment, the alpha-phase tantalum single-layer barrier has a resistivity of about 25 ??-cm.

Abstract: A method of reducing the number of particles on a low-k material layer is described. The low-k material layer is formed by a plasma enhanced chemical vapor deposition process, wherein a reaction gas, a cleaning gas, a high-frequency power and a low-frequency power are used. The method comprises turning off the reaction gas and the low-frequency power after the low-k material layer is formed, and continuing to provide the cleaning gas during a delay time.

Abstract: A method of reducing the number of particles on a low-k material layer is described. The low-k material layer is formed by a plasma enhanced chemical vapor deposition process, wherein a reaction gas, a cleaning gas, a high-frequency power and a low-frequency power are used. The method includes turning off the reaction gas and the low-frequency power after the low-k material layer is formed, and continuing to provide the cleaning gas during a delay time.

Abstract: A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.

Abstract: A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.