Abstract: A semiconductor package includes a photonic integrated circuit, an encapsulating material, and a redistribution structure. The photonic integrated circuit includes a coupling surface, a back surface opposite to the coupling surface and a plurality of optical couplers disposed on the coupling surface and configured to be coupled to a plurality of optical fibers. The encapsulating material encapsulates the photonic integrated circuit and revealing the plurality of optical couplers. The redistribution structure is disposed over the encapsulating material and the back surface of the photonic integrated circuit, wherein the redistribution structure is electrically connected to the photonic integrated circuit.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.

Abstract: According to an embodiment of the present disclosure, a method of manufacturing semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer and exposing upper portion of the line-end cut pattern; reducing a width of the line-end cut pattern; etching the spacer layer to expose the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.

Abstract: Provided is a transient voltage suppression device including a power supply terminal, a ground terminal, a Zener diode, a diode string, and an isolation device. The Zener diode is coupled between the power supply terminal and the ground terminal, and a node is between the Zener diode and the power supply terminal. The diode string has a first terminal, a second terminal, and an input/output (I/O) terminal. The second terminal is coupled to the ground terminal. The isolation device is coupled between the node and the first terminal. When an abnormal current flows through the isolation device and an energy of the abnormal current per unit time exceeds a preset value of the isolation device, the isolation device blocks a path of the abnormal current.

Abstract: Provided is an electrostatic discharge protection device including a first work area and a second work area. The first work area is configured to form a face-to-face connected diode string. The first work area includes a plurality of first sub-work areas. Each of the first sub-work areas includes a first doped region of a first conductivity type disposed in a substrate, a second doped region of a second conductivity type disposed in the substrate and surrounding the first doped region, and a third doped region of the second conductivity type disposed below the second doped region. The second work area is configured to form at least one diode. The second work area includes at least one second sub-work area. The second sub-work area includes a fourth doped region of the second conductivity type disposed in the substrate. Besides, the fourth doped region is electrically connected to the first doped region.

Abstract: The present application discloses a keyboard, which includes a base plate and a thin film circuit board. The base plate includes a first part, a second part and an inclined part. The first part has a first limiting portion and a second limiting portion, the second part has a third limiting portion. The thin film circuit board includes a first region, a second region and at least one connecting portion. The first region is located on the first part, and the first region has at least one opening. The first limiting portion and the second limiting portion are disposed in said opening. The second region is located on the second part, and the second region has at least one opening. The connecting portion is located on the inclined part, and the third limiting portion is passed through the opening of the second part and propped against the connecting portion.

Abstract: A wireless docking station is disclosed. The wireless docking station is used for arranging a stylus for signal transmission with an external electronic device. The stylus includes an image capturing module and a first connection port. The wireless docking station includes a placement, a second connection port, a wireless transmission module, a microphone, and a speaker. The placement is used for placing the stylus. The wireless transmission module is connected to the external electronic device, when the image capturing module captures an image, the wireless transmission module transmits the image to the external electronic device. The microphone is used for receiving an external sound signal and transmitting the external sound signal to the external electronic device via the wireless transmission module. The speaker is used for receiving and outputting an output sound signal from the external electronic device via the wireless transmission module.

Abstract: A keyswitch structure includes a base plate, a keycap, a first support, and a second support. The keycap is located above the base plate. The first support is connected to and between the keycap and the base plate and has an upper connection portion, a lower connection portion, and a protruding limitation portion. The upper connection portion is located between the lower connection portion and the protruding limitation portion. The first support is rotatably connected to the keycap and the base plate through the upper connection portion and the lower connection portion respectively. The protruding limitation portion is located close to and under the cap body. The second support is connected to and between the keycap and the base plate. The keycap moves up and down relative to the base plate through the first support and the second support.

Abstract: A keyboard is disclosed, which includes a base plate and a thin film circuit board. The base plate includes a first part, a second part, and an inclined part. Two edges of the inclined part are connected to the first part and the second part, respectively. The inclined part includes a hollow portion. The thin film circuit board is disposed on the base plate and includes a first region, a second region, and a connecting portion. The connecting portion has a first connecting end, a second connecting end, and an inclined segment. The first connecting end is connected to the first region; the second connecting end is connected to the second region. The first connecting end and the second connecting end correspond to different positions on an axial direction. Moreover, part of the inclined segment is located in the hollow portion.

Abstract: An optical transceiver including a photonic integrated circuit component, an electric integrated circuit component and an insulating encapsulant is provided. The photonic integrated circuit component includes at least one optical input/output portion and at least one groove located in proximity of the at least one optical input/output portion. The electric integrated circuit component is disposed on and electrically connected to the photonic integrated circuit component. The insulating encapsulant is disposed on the photonic integrated circuit component and laterally encapsulating the electric integrated circuit component. The at least one groove of the photonic integrated circuit component is revealed by the insulating encapsulant and is adapted for insertion of a photonic device.

Abstract: A light-emitting device includes a first semiconductor layer; a plurality of semiconductor pillars separated from each other and formed on the first semiconductor layer, the plurality of semiconductor pillars respectively includes a second semiconductor layer and an active layer; a first electrode covering one portion of the plurality of semiconductor pillars; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein the plurality of semiconductor pillars under a covering region of the first electrode are separated from each other by a first space, the plurality of semiconductor pillars outside the covering region of the first electrode are separated from each other by a second space, and the first space is larger than the second space.

Abstract: In a pattern formation method, a photo resist pattern is formed over a target layer to be patterned. An extension material layer is formed on the photo resist pattern. The target layer is patterned by using at least the extension material layer as an etching mask.

Abstract: A method of manufacturing a semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer on the line-end cut pattern; reducing a width of the line-end cut pattern; etching first horizontal portions of the spacer layer with the reduced line-end cut pattern as an etching mask; removing the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the etched line-end cut pattern as an etch mask.

Abstract: An embodiment is a method of fabricating a semiconductor structure. The method includes utilize uses of a multi-layer structure disposed on a pattern defining layer. In some embodiments, a method of fabricating a semiconductor structure includes forming a first multi-layer structure on a pattern defining layer disposed on a film stack on a substrate, patterning the first multi-layer structure to form an aperture in the first multi-layer structure, forming a first cut opening in the pattern defining layer through the aperture defined by the first multi-layer structure, and forming a second multi-layer structure on the pattern defining layer, a portion of the second multi-layer structure being disposed in the first cut opening.

Abstract: A transient voltage suppression device including a substrate and a first transient voltage suppressor is provided. The substrate includes a device region and a seal-ring region. The seal-ring region surrounds the device region. A first transient voltage suppressor is located in the device region. The first transient voltage suppressor includes a first well region having a first conductivity type, a first doped region having a second conductivity type, and a second doped region having the second conductivity type. The first well region is located in the substrate of the device region. The first doped region is located in the first well region. The second doped region is located in the first well region. A third doped region having the second conductivity type is located in the substrate of the seal-ring region, and the third doped region is electrically connected to the first doped region.

Abstract: A keyboard is disclosed, which includes a base plate and a thin film circuit board. The base plate includes a first part, a second part, and an inclined part. Two edges of the inclined part are connected to the first part and the second part, respectively. The inclined part includes a hollow portion. The thin film circuit board is disposed on the base plate and includes a first region, a second region, and a connecting portion. The connecting portion has a first connecting end, a second connecting end, and an inclined segment. The first connecting end is connected to the first region; the second connecting end is connected to the second region. The first connecting end and the second connecting end correspond to different positions on an axial direction. Moreover, part of the inclined segment is located in the hollow portion.

Abstract: A high electron mobility transistor (HEMT) device including a substrate, a first channel layer, a second channel layer, a cap layer, a first metal nitride layer, a gate, a source, and a drain is provided. The first channel layer is disposed on the substrate. The second channel layer is disposed on the first channel layer. The cap layer is disposed on the second channel layer and exposes a portion of the second channel layer. The first metal nitride layer is disposed on the cap layer. The gate is disposed on the first metal nitride layer. The width of the first metal nitride layer is greater than or equal to the width of the gate. The source and the drain are disposed on the second channel layer at two sides of the gate.

Abstract: The present application discloses a keyboard, which includes a base plate and a thin film circuit board. The base plate includes a first part, a second part and an inclined part. The first part has a first limiting portion and a second limiting portion, the second part has a third limiting portion. The thin film circuit board includes a first region, a second region and at least one connecting portion. The first region is located on the first part, and the first region has at least one opening. The first limiting portion and the second limiting portion are disposed in said opening. The second region is located on the second part, and the second region has at least one opening. The connecting portion is located on the inclined part, and the third limiting portion is passed through the opening of the second part and propped against the connecting portion.

Abstract: A transient voltage suppressor includes a substrate, a first well, a second well, a third well, a first electrode, a second electrode and a doped region. The first well is formed in the substrate and near a surface of the substrate. The second well is formed in the first well and near the surface. The third well is formed in the first well and near the surface. There is a gap between the second well and the third well. The first electrode and second electrode are formed in the second well and near the surface respectively. The first well and first electrode have a first electrical property. The second well, third well and second electrode have a second electrical property. The doped region is formed between the first electrode and second electrode and near the surface and electrically connected with the first well and third well.