Abstract: A smoke detection device includes a housing, a smoke collector, an optical detector and a cover plate. The housing has a piercing hole. The smoker collector has a smoke hole, and position of the smoke hole is close to position of the piercing hole. The optical detector is disposed inside the smoke collector and adapted to detect gaseous concentration inside the smoke collector. The cover plate is disposed between the housing and the smoke collector, and used to set a channel from the piercing hole to the smoke hole, so that gaseous matter flows from outside the smoke detection device into the smoke collector through the piercing hole and the smoke hole.

Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.

Abstract: The present invention relates to a nicotinohydrazide derivative, a stereoisomer thereof or a pharmaceutically acceptable salt thereof having a structure of formula (I): wherein each of X, Y and Z is one of N and CH, at least one of X, Y and Z is CH, at least one of X, Y and Z is N, and R is one of OH and NH2.

Abstract: A method for preparing a carbide protective layer comprises: (A) mixing a carbide powder, an organic binder, an organic solvent and a sintering aid to form a slurry; (B) spraying the slurry on a surface of a graphite component to form a composite component; (C) subjecting the composite component to a cold isostatic pressing densification process; (D) subjecting the composite component to a constant temperature heat treatment; (E) repeating steps (B)-(D) until a coating is formed on a surface of the composite component; (F) subjecting the coating to a segmented sintering process; (G) obtaining a carbide protective layer used for the surface of the composite component. Accordingly, while the carbide protective layer can be completed by using the wet cold isostatic pressing densification process and the cyclic multiple superimposition method, so that it can improve the corrosion resistance in the silicon carbide crystal growth process environment.

Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.

Abstract: To maximize throughput, an optimization method includes determining at least one precoding matrix and at least one combining matrix together according to Bayesian Optimization, Causal Bayesian Optimization, or Dynamic Causal Bayesian Optimization, and outputting the at least one precoding matrix and the at least one combining matrix. The at least one precoding matrix is configured for at least one precoder of a transmitter. The at least one combining matrix is configured for at least one combiner of at least one receiver.

Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip in which a pad barrier layer caps a pad of a piezoelectric device. The pad barrier layer is configured to block hydrogen ions and/or other errant materials from diffusing to the piezoelectric layer. Absent the pad barrier layer, hydrogen ions from hydrogen-ion containing processes performed after forming the pad may diffuse to the piezoelectric layer along a via extending from the pad to the piezoelectric device. By blocking diffusion of hydrogen ions and/or other errant materials to the piezoelectric device, the pad barrier layer may prevent delamination and breakdown of the piezoelectric layer. Hence, the pad barrier layer may prevent failure of the piezoelectric device.

Abstract: Various embodiments of the present disclosure are directed towards an optoelectronic device. The device includes a substrate, and a germanium photodiode region extending into an upper surface of the substrate. The germanium photodiode region has a curved upper surface that extends past the upper surface of the substrate. A silicon cap overlies the curved upper surface of the germanium photodiode region. There is an absence of oxide between the curved upper surface of the germanium photodiode region and an upper surface of the silicon cap.

Abstract: A pre-compensation method for a pre-compensation circuit coupled to a power amplifier to compensate for nonlinearity of the power amplifier includes performing pre-distortion according to at least one parameter or at least one hyperparameter to convert a first input signal received by the pre-compensation circuit into a first pre-distortion output signal, updating the at least one parameter or the at least one hyperparameter according to Bayesian Optimization, Causal Bayesian Optimization, or Dynamic Causal Bayesian Optimization, and performing pre-distortion according to the at least one parameter updated or the at least one hyperparameter updated to convert a second input signal received by the pre-compensation circuit into a second pre-distortion output signal.

Abstract: The present disclosure relates to a method of forming a device. The method includes depositing a first layer of getter material on a substrate. A first electrode is formed in a first conductive layer deposited on the first layer of getter material. An insulator element is formed in a piezoelectric layer deposited on the first electrode. A second electrode is formed in a second conductive layer deposited on the insulator element. A first input-output electrode is formed to be conductively connected to the first layer of getter material and a second input-output electrode is formed to be conductively connected to the second electrode.

Abstract: A cable clip assembly for a computing device includes a primary clip with a primary surface between first and second primary ends. The first side extends in a first transverse direction from the first primary end, and the second side extends in the first transverse direction from the second primary end. Cable-receiving holes are arranged longitudinally between the first and second sides. A secondary clip has a secondary surface and is attached to the primary clip via the first and second sides. The secondary clip is movable relative to the primary clip between a cable installation position and a secured cable position, and is removably attached at one or more of the first and second sides. A compressible interface is attached to the primary surface, includes a flexible material that compresses when subjected to an installation force, and creates an airflow barrier in an installed position within the computing device.

Abstract: In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer.

Abstract: A heat exchanging apparatus includes a main body and N contact blocks formed on a head end surface of the main body, where N is a natural number. The main body therein has a multi-turn flow passage, a first arc-shell flow passage and a second arc-shell flow passage. Each contact block therein has a plurality of plate-shell flow passages parallel to each other and parallel to a longitudinal direction defined by the main body. The first arc-shell flow passage and the second arc-shell flow passage respectively communicate with the multi-turn flow passage and the plurality of plate-shell flow passages. A liquid flows into the multi-turn flow passage from an inlet of the multi-turn flow passage, and flows through the first arc-shell flow passage, the plurality of plate-shell flow passages and the second arc-shell flow passage, and flows out from an outlet of the multi-turn flow passage.

Abstract: A test system, for testing a plurality of semiconductor devices, includes a carrying apparatus, an abutting apparatus and a pressing apparatus including a cover and a seat. The cover and the seat constitute a test chamber and a sealed auxiliary chamber. The carrying apparatus is disposed within the test chamber. Each semiconductor device is carried by one of a plurality of test sockets of the carrying apparatus. The abutting apparatus is disposed between the cover and the test sockets. The auxiliary chamber is extracted through at least one extraction hole, such that an air pressure in the auxiliary chamber is lowered to actuate the cover toward the seat and further to apply force to the abutting apparatus, and such that the abutting apparatus presses against the test sockets and the semiconductor devices to allow each test socket to electrically contact with the semiconductor device carried by said one test socket.

Abstract: A wavelength conversion element includes a substrate, a wavelength conversion layer and a fixed ring. The fixed ring has a first surface, a second surface, and a plurality of flow guiding structures. The second surface has a first region and a second region. The plurality of flow guiding structures is located on the first surface, and each of the plurality of flow guiding structures is formed with a first flow guiding hole. The first flow guiding hole extends from the first surface to the second region of the second surface. The plurality of flow guiding structures respectively have a spoiler surface, the spoiler surface stands on the first surface and has a second flow guiding hole, in which the second flow guiding hole and the first flow guiding hole of each of the plurality of flow guiding structures face different directions. A projection device of the invention is further provided.

Abstract: A planning method and communication device thereof are provided. The planning method for a network includes generating a constrained causal graph according to observation data of a plurality of communication devices and performing finite domain representation planning by using the constrained causal graph to generate action data related to how to configure a plurality of antenna elements. A plurality of causal variables of the constrained causal graph and a causal structure of the constrained causal graph are determined together. The plurality of antenna elements are divided into a plurality of groups according to the action data. One of the plurality of groups adopts spatial diversity, single-user multiplexing, multi-user multiplexing, single-user beamforming, or multi-user beamforming.

Abstract: A wavelength conversion element includes an illumination system, a light valve, and a projection lens. The illumination system is configured to provide an illumination beam. The light valve is disposed on a transmissive path of the illumination beam to convert the illumination beam into an image beam. The projection lens is disposed on a transmissive path of the image beam. The illumination system includes an excitation beam source and the aforementioned wavelength conversion element. The excitation beam source is configured to provide an excitation beam. The wavelength conversion element is disposed on a transmissive path of the excitation beam. A projection apparatus adopting the aforementioned wavelength conversion element is further provided. The substrate has good structural strength and the surface of the substrate has better flatness, so the excitation beam can be accurately focused on the wavelength conversion layer to maintain stable excitation efficiency.

Abstract: A method for manufacturing a semiconductor device includes: forming a first waveguide structure and a second waveguide structure on a substrate in which the first waveguide structure and the second waveguide structure is spaced apart from each other by a recess; conformally forming an un-doped dielectric layer to cover the first and second waveguide structures and to form a gap between two corresponding portions of the un-doped dielectric layer laterally covering the first waveguide structure and the second waveguide structure, respectively; and forming a doped filling layer to fill the gap.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor with a passivation layer for dark current reduction. A device layer overlies a substrate. Further, a cap layer overlies the device layer. The cap and device layers and the substrate are semiconductor materials, and the device layer has a smaller bandgap than the cap layer and the substrate. For example, the cap layer and the substrate may be silicon, whereas the device layer may be or comprise germanium. A photodetector is in the device and cap layers, and the passivation layer overlies the cap layer. The passivation layer comprises a high k dielectric material and induces formation of a dipole moment along a top surface of the cap layer.