Abstract: A system for use in a poultry house includes a control server, a network gateway disposed in the poultry house and equipping with a wireless communication capability; a movable sensor module disposed in the poultry house, wherein the movable sensor module is movable within the poultry house for obtaining a plurality of environmental parameters associated with specific locations within the poultry house, and a sampling machine disposed in the poultry house for obtaining a sample of poultry waste on the ground of the poultry house. The movable sensor module transmits the environmental parameters to the network gateway, and the network gateway transmits the environmental parameters to the control server for processing the environmental parameters.

Abstract: A semiconductor structure includes a semiconductor substrate, a semiconductor device and a heating structure. The semiconductor substrate includes a device region and a heating region surrounding the device region. The semiconductor device is located on the device region. The heating structure is located on the heating region and includes an intrinsic semiconductor area, at least one heating element and at least one heating pad. The intrinsic semiconductor area is surrounding the semiconductor device. The at least one heating element is located at a periphery of the intrinsic semiconductor area. The at least one heating pad is joined with the at least one heating element, wherein the at least one heating pad includes a plurality of contact structures, and a voltage is supplied from the plurality of contact structures to control a temperature of the at least one heating element.

Abstract: An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

Abstract: A method of forming a semiconductor device includes forming a conductive line over a substrate; forming an etch stop layer (ESL) over the conductive line, the ESL extending continuously along an upper surface of the conductive line and along an upper surface of a first dielectric layer adjacent to the conductive line, where a first lower surface of the ESL contacts the upper surface of the conductive line, and a second lower surface of the ESL contacts the upper surface of the first dielectric layer, the first lower surface being closer to the substrate than the second lower surface; forming a second dielectric layer over the ESL; forming an opening in the second dielectric layer, the opening exposing a first portion of the ESL; removing the first portion of the ESL to expose the conductive line; and filling the opening with an electrically conductive material to form a via.

Abstract: In an embodiment, a package includes a first package structure including a first die having a first active side and a first back-side, the first active side including a first bond pad and a first insulating layer a second die bonded to the first die, the second die having a second active side and a second back-side, the second active side including a second bond pad and a second insulating layer, the second active side of the second die facing the first active side of the first die, the second insulating layer being bonded to the first insulating layer through dielectric-to-dielectric bonds, and a conductive bonding material bonded to the first bond pad and the second bond pad, the conductive bonding material having a reflow temperature lower than reflow temperatures of the first and second bond pads.

Abstract: An electric package device is provided, including a first chip and a second chip. The first chip includes a first conductive pad. The second chip includes a second conductive pad. The second conductive pad couples to the first conductive pad through a connection wire. In some embodiments, the first chip includes a first signal control circuit that receives, in response to a selection signal, one of multiple input signals as a first signal, filters the first signal, and outputs the filtered first signal, as a second signal, from the first conductive pad to the second conductive pad.

Abstract: An illumination system for a projector includes a light engine module, a light source module, a reflective mirror, a beam splitter, a phosphor wheel, and a lens assembly. The light source module can emit blue light along a first direction. The reflective mirror may reflect the blue light such that the blue light transmits in a second direction. A reflective region of the phosphor wheel can reflect a first portion of the blue light, and a first wavelength conversion region of the phosphor wheel can to activate a second portion of the blue light to form first band light. The lens assembly is configured to allow the first band light to pass through. The reflective region of the beam splitter is configured to reflect the first portion of the blue light and the first band light to the light engine module along the first direction.

Abstract: Examples described herein relate to network layer 7 (L7) offload to an infrastructure processing unit (IPU) for a service mesh. An apparatus described herein includes an IPU comprising an IPU memory to store a routing table for a service mesh, the routing table to map shared memory address spaces of the IPU and a host device executing one or more microservices, wherein the service mesh provides an infrastructure layer for the one or more microservices executing on the host device; and one or more IPU cores communicably coupled to the IPU memory, the one or more IPU cores to: host a network L7 proxy endpoint for the service mesh, and communicate messages between the network L7 proxy endpoint and an L7 interface device of the one or more microservices by copying data between the shared memory address spaces of the IPU and the host device based on the routing table.

Abstract: A semiconductor package includes a semiconductor die and a redistribution structure. The semiconductor die is laterally surrounded by a molding compound, and the semiconductor die has a conductive pillar and a complex compound sheath sandwiched between the conductive pillar and the molding compound. The redistribution structure is electrically connected with the semiconductor die and comprises a first via portion at a first side of the redistribution structure and a second via portion at a second side of the redistribution structure, and a base angle of the second via portion is greater than a base angle of the first via portion.

Abstract: Wireless communications systems and methods related to use of cyclic prefix (CP) extensions for channel occupancy time (COT) sharing among sidelink user equipment devices (UEs) are provided. A first UE detects a first sidelink transmission in a COT, the COT for sharing with multiple sidelink UEs including the first sidelink UE. The first UE may determine a CP extension length for transmitting a second sidelink transmission after the first sidelink transmission, where a gap duration between the first sidelink transmission and the second sidelink transmission satisfies a listen-before-talk (LBT) gap time threshold. The first UE may apply a CP extension having the CP extension length to the second sidelink transmission and transmit, to a second sidelink UE, the second sidelink transmission with the CP extension.

Abstract: A chemical mechanical planarization system includes a chemical mechanical planarization pad that rotates during a chemical mechanical planarization process. A chemical mechanical planarization head places a semiconductor wafer in contact with the chemical mechanical planarization pad during the process. A slurry supply system supplies a slurry onto the pad during the process. A pad conditioner conditions the pad during the process. An impurity removal system removes debris and impurities from the slurry.

Abstract: A semiconductor structure includes a first pair of source/drain features (S/D), a first stack of channel layers connected to the first pair of S/D, a second pair of S/D, and a second stack of channel layers connected to the second pair of S/D. The first pair of S/D each include a first epitaxial layer having a first dopant, a second epitaxial layer having a second dopant and disposed over the first epitaxial layer and connected to the first stack of channel layers, and a third epitaxial layer having a third dopant and disposed over the second epitaxial layer. The second pair of S/D each include a fourth epitaxial layer having a fourth dopant and connected to the second stack of channel layers, and a fifth epitaxial layer having a fifth dopant and disposed over the fourth epitaxial layer. The first dopant through the fourth dopant are of different species.

Abstract: A non-transitory medium of a device that stores one or more instructions is provided. The instructions, when executed by a processing unit of the device, cause the device to: determine an affine enabled flag corresponding to one or more image frames from the bitstream; determine a maximum index corresponding to the one or more image frames from the bitstream when the affine enabled flag is true; determine that a maximum number of zero or more subblock-based merging motion vector prediction (MVP) candidates is in a number range of 1 to N and generated by subtracting the index value of the maximum index from N when the affine enabled flag is true and K is 1, N being a first integer and K being a second integer less than N; and reconstruct the one or more image frames based on the maximum number of zero or more subblock-based merging MVP candidates.

Abstract: A device includes a diffraction-based overlay (DBO) mark having an upper-layer pattern disposed over a lower-layer pattern, and having smallest dimension greater than about 5 micrometers. The device further includes a calibration mark having an upper-layer pattern disposed over a lower-layer pattern, positioned substantially at a center of the DBO mark, and having smallest dimension less than about ? the size of the smallest dimension of the DBO mark.

Abstract: A device includes a fin protruding from a semiconductor substrate; a gate stack over and along a sidewall of the fin; a gate spacer along a sidewall of the gate stack and along the sidewall of the fin; an epitaxial source/drain region in the fin and adjacent the gate spacer; and a corner spacer between the gate stack and the gate spacer, wherein the corner spacer extends along the sidewall of the fin, wherein a first region between the gate stack and the sidewall of the fin is free of the corner spacer, wherein a second region between the gate stack and the gate spacer is free of the corner spacer.

Abstract: Provided are integrated circuit packages and methods of forming the same. An integrated circuit package includes an integrated circuit structure, a first die stack and a dummy die. The first die stack includes a plurality of first die structures and is bonded to the integrated circuit structure at a first side of the first die stack. The dummy die includes a plurality of through substrate vias, is located aside the first die stack and is electrically connected to the integrated circuit structure at the first side of the first die stack. In some embodiments, the height of the through substrate vias of the dummy die is the same as the height of the first die stack.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a receiver may receive, from two or more transmitters, two or more sidelink control informations (SCIs) that schedule channel occupancy time (COT) resources for the two or more transmitters. The receiver may transmit, to a transmitter of the two or more transmitters, an acknowledgement or negative acknowledgement (A/N) feedback via a mini-slot carrying a physical sidelink feedback channel (PSFCH) or sidelink feedback information (SLFI) with SCI. The A/N feedback may be transmitted before a listen-before-talk (LBT) and physical sidelink shared channel (PSSCH) transmission. The receiver may receive, from the transmitter using a COT resource, the PSSCH transmission based at least in part on the A/N feedback. The LBT and the PSSCH transmission may be adjustable at the transmitter based at least in part on the A/N feedback. Numerous other aspects are described.

Abstract: An offshore wind turbine with anti-accumulation of aquatic organisms, comprising: a base with an interior space, the base being made of conductive material; a tower incorporated above the base; a nacelle, connected to the tower; a plurality of blades, each interconnected with the nacelle; and a power supply system electrically connected to the base and disposed within the interior space, the power supply system being used to provide electrical energy to the base to energize the surface of the base to form an electric field.

Abstract: A control system includes multiple device controllers and a device root. Each of the multiple device controllers corresponds to at least one processing unit, and is arranged to receive a hint from an application processor (AP), and generate a control signal for managing the at least one processing unit according to the hint. The device root is coupled to the multiple device controllers and includes a manager, wherein the manager is arranged to manage multiple processing units corresponding to the multiple device controllers according to multiple control signals corresponding to the multiple device controllers.

Abstract: The invention relates to a peptide comprising an amino acid sequence selected from the group consisting of (i) SEQ ID NO: 1 to SEQ ID NO: 216, and (ii) a variant sequence thereof which maintains capacity to bind to MHC molecule(s) and/or induce T cells cross-reacting with said variant peptide, or a pharmaceutically acceptable salt thereof.