Patents by Inventor Chih (Rex) Hsueh

Chih (Rex) Hsueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250248073
    Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures over a substrate, and a plurality of second nanostructures adjacent to the first nanostructures. The semiconductor structure includes a protective layer over the first nanostructures, and a first gate structure formed on the first nanostructures. The semiconductor structure includes a second gate structure formed on the second nanostructures. The semiconductor structure includes a first dielectric wall between the first gate structure and the second gate structure, and a top surface of the first dielectric wall is higher than a top surface of the protective layer.
    Type: Application
    Filed: April 23, 2024
    Publication date: July 31, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Chien CHENG, Guan-Lin CHEN, Shi-Ning JU, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20250248107
    Abstract: A method of forming a fin field effect transistor (finFET) on a substrate includes forming a fin structure on the substrate and forming a shallow trench isolation (STI) region on the substrate. First and second fin portions of the fin structure extend above a top surface of the STI region. The method further includes oxidizing the first fin portion to convert a first material of the first fin portion to a second material. The second material is different from the first material of the first fin portion and a material of the second fin portion. The method further includes forming an oxide layer on the oxidized first fin portion and the second fin portion and forming first and second polysilicon structures on the oxide layer.
    Type: Application
    Filed: January 17, 2025
    Publication date: July 31, 2025
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Cheng CHIANG, Chih-Hao Wang, Kuan-Lun Cheng, Yen-Ming Chen
  • Publication number: 20250248052
    Abstract: A memory device includes a first electrode, a second electrode and a memory layer disposed between the first electrode and the second electrode. The memory layer includes a composition including X wt % Cu, Y wt % Ge and Z wt % Se. X ranges between 3.33 and 26.66. Y ranges between 28.33 and 86.66. Z ranges between 10 and 45.
    Type: Application
    Filed: May 20, 2024
    Publication date: July 31, 2025
    Inventors: Wei-Chih Chien, Huai-Yu CHENG, Chiao-Wen YEH, Jeffrey Xuan ZHENG
  • Publication number: 20250241414
    Abstract: The present invention relates to a continuous polarization adhesive bonding and transmission apparatus for shoemaking. A polarizing device is provided inside a polarization chamber, and a conveyor belt capable of conveying materials is provided below said polarization chamber. The entrance side and the exit side of said polarization channel is respectively provided with a wave blocking tunnel, and said conveyor belt is installed through said wave blocking tunnel. The conveyor belt is provided with spaced electromagnetic protection plates, and the material to be polarized is provided between the two electro magnetic protection plates. When the material conveyed by the conveyor belt is polarized through the polarization chamber, the spaced electromagnetic protection plates can prevent the leakage of polarized waves.
    Type: Application
    Filed: January 25, 2024
    Publication date: July 31, 2025
    Inventors: Wen-Chih LIN, Li-Yung HSU
  • Publication number: 20250244871
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The data writing method includes the following: calculating a first number according to a ratio of a capacity of at least one first system table to a capacity of a physical block; calculating a second number according to a ratio of a capacity of at least one second system table to the capacity of the physical block; and obtaining at least one physical block from a plurality of physical blocks as a first virtual block and a second virtual block based on the first number and the second number respectively.
    Type: Application
    Filed: July 1, 2024
    Publication date: July 31, 2025
    Applicant: Hefei Core Storage Electronic Limited
    Inventors: Chih-Ling Wang, En Yang Wang, Kuai Cao, Dong Dong Yao, Yun Peng Zhang, Wen Qing Lv
  • Publication number: 20250244883
    Abstract: A memory management method, a memory storage device, and a memory control circuit unit are provided. The memory management method includes: creating a physical block management table for managing physical blocks; selecting at least one physical block to be refreshed based on the physical block management table when power is restored after an abnormal power loss; in response to a number of the at least one physical block to be refreshed being greater than 1, determining at least one current state and at least one category of the at least one physical block to be refreshed; and executing at least one second write operation based on the current state and the category together when executing a first write operation. The first write operation includes writing user data into a cache. The second write operation includes writing data stored in a physical block to be refreshed into a first physical block.
    Type: Application
    Filed: July 1, 2024
    Publication date: July 31, 2025
    Applicant: Hefei Core Storage Electronic Limited
    Inventors: Chih-Ling Wang, Ya Jie Guo, En Yang Wang, Kuai Cao, Dong Dong Yao, Yun Peng Zhang
  • Publication number: 20250244663
    Abstract: An additional non-photoresist layer may be formed on patterned photoresist layers. The additional layer may be preferentially formed on the tops of the photoresist layer versus the sidewalls of the photoresist layer. In addition, the additional layer may be preferential formed on the tops of the photoresist layer versus exposed surfaces of layers underlying the photoresist layer. In this manner, the patterned structures formed by the photoresist layer are less likely to have line opens due to photoresist height variability or the relative thinness of the photoresist height used. Further, the formation of the additional layer may be through a cyclic deposition/trim process. The trim step of the cyclic process may also serve as a descum step that helps reduce line bridging and scumming. In one embodiment, the additional non-photoresist layer may be an organic polymer layer.
    Type: Application
    Filed: March 14, 2025
    Publication date: July 31, 2025
    Inventors: Angélique D. Raley, Eric Chih-Fang Liu, Nihar Mohanty
  • Publication number: 20250245694
    Abstract: Systems and methods including one or more processors and one or more non-transitory storage devices storing computing instructions configured to run on the one or more processors and perform: receiving a search query from a user and user session information; receiving input information corresponding to one or more campaigns to display to the user; determining a first bid for the one or more campaigns based on the search query and the user session information; determining a second bid for the one or more campaigns based on the input information; determining a final bid for the one or more campaigns based on the first bid and the second bid; transmitting the final bid to a ranking system to generate a listing of advertisements, the listing of advertisements including positioning information; and enabling a graphical user interface to be modified to reposition the listing of advertisements based on the positioning information. Other embodiments are disclosed herein.
    Type: Application
    Filed: January 31, 2024
    Publication date: July 31, 2025
    Applicant: Walmart Apollo, LLC
    Inventors: Biyi Fang, Anish Saha, Xinzi Sun, Dong Xu, Kritika Upreti, Mohit Prakash Patel, Jayanth Korlimarla, Jiaxuan Xu, Musen Wen, Ramakanth Putta, Naga Vijay Bhaskar Manchi, Valeriy Valeryevich Pelyushenko, Ranjit Kumar Pedapati, Rajesh Garigipati, Anant Furia, Kuang-chih Lee, Chintan Jagdish Rita, Wei Shen
  • Publication number: 20250245852
    Abstract: A system and a method of coordinate system alignment for multiple head mounted displays are provided. The method includes: capturing a first image of a second head mounted display by a first camera of a first head mounted display; performing a first face detection on the first image to obtain a first bounding box corresponding to a first coordinate system by the first head mounted display; aligning the first coordinate system corresponding to the first head mounted display with a second coordinates system corresponding to the second head mounted display according to a first position of the first bounding box by the first head mounted display, so as to update the first coordinate system; and displaying an output image according to the updated first coordinate system by the first head mounted display.
    Type: Application
    Filed: January 25, 2024
    Publication date: July 31, 2025
    Applicant: HTC Corporation
    Inventors: Ying-Wen Chen, Chih-An Tsao
  • Publication number: 20250247826
    Abstract: Certain aspects of the present disclosure provide a method for wireless communications by a transmitter user equipment (UE). The method may include selecting a first number of resources for an initial transmission based on a second number of transport blocks (TBs) for the initial transmission where the first number is greater than the second number, and transmitting the initial transmission on one or more of the first number of resources.
    Type: Application
    Filed: May 9, 2022
    Publication date: July 31, 2025
    Inventors: Chih-Hao LIU, Yisheng XUE, Jing SUN, Sherif ELAZZOUNI, Siyi CHEN, Giovanni CHISCI, Ozcan OZTURK, Xiaoxia ZHANG
  • Publication number: 20250246816
    Abstract: An electronic device includes a metal back cover, a metal frame, and at least one antenna module. The antenna module includes a separated portion, a first radiator, a second radiator, a third radiator disposed between the first radiator and the second radiator, and a fourth radiator connected to the separated portion. A first section of the first radiator is connected to the separated portion. A second section of the first radiator extends from the first section and has a first ground terminal. A third section of the first radiator extends from the first section and has a second ground terminal. The second radiator extends from the separated portion and has a third ground terminal. The third radiator includes a fourth section and a fifth section extending from the fourth section towards the second radiator. The fourth section is located next to the third section and has a fourth ground terminal.
    Type: Application
    Filed: November 19, 2024
    Publication date: July 31, 2025
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Shao-Chi Wang, Hau Yuen Tan, Chao-Hsu Wu, Chih-Wei Liao, Chih-Hung Cho, Shih-Keng Huang, Hung-Te Liao, Ming-Huang Chen, Chang-Hsun Wu
  • Publication number: 20250246430
    Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.
    Type: Application
    Filed: March 11, 2025
    Publication date: July 31, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jia-Lin WEI, Ming-Hui WENG, Chih-Cheng LIU, Yi-Chen KUO, Yen-Yu CHEN, Yahru CHENG, Jr-Hung LI, Ching-Yu CHANG, Tze-Liang LEE, Chi-Ming YANG
  • Publication number: 20250246503
    Abstract: A package structure is provided. The package structure includes a substrate, a package component bonded to the substrate, a lid disposed over the package component and the substrate, and an interface structure sandwiched between the package component. The package component includes a first die, a second die laterally spaced apart from the first die by an underfill, and a molding compound adjacent the first die and the second die. The interface structure includes an adhesive layer disposed over the underfill and the molding compound, and a thermal interface material (TIM) layer over the adhesive layer, the first die and the second die.
    Type: Application
    Filed: April 25, 2024
    Publication date: July 31, 2025
    Inventors: Chih-Chien Pan, Pu Wang, Li-Hui Cheng
  • Publication number: 20250242013
    Abstract: The disclosure provides an animal cell stably expressing a virus-like particle (VLP). The disclosure also provides a method for manufacturing a virus-like particle, a virus-like particle, a vaccine composition, a method for preventing viral infection, and a method for producing antibodies.
    Type: Application
    Filed: September 14, 2022
    Publication date: July 31, 2025
    Inventors: Pei-Wen HSIAO, Yu-Chih YANG, Yi-Chun YEH
  • Publication number: 20250244085
    Abstract: An immersion liquid cooling heat sink includes a substrate, a fin assembly and a housing. The fin assembly is disposed on the substrate and includes a first fin module and a second fin module, both having multiple passages. Each passage has an inlet and an outlet, the first and second fin modules are spaced from each other to form a first groove which communicate between each inlet of the first fin module and each inlet of the second fin module. The housing is disposed on the substrate and has a first liquid inlet port, and covers the entire fin assembly and exposes each outlet. The first liquid inlet port is arranged corresponding to the first groove and communicates to the first groove, so as to enable a dielectric fluid to flow directly from the mid-section to two ends of the fin assembly.
    Type: Application
    Filed: January 31, 2024
    Publication date: July 31, 2025
    Inventors: Pang-Hung LIAO, Chih-Wei CHEN, Shih-Ming WANG
  • Publication number: 20250244546
    Abstract: An optical system includes a flexible transmission member and a laser emitting module. The flexible transmission member is a single one-piece structure and includes a first light channel, a second light channel, a third light channel, and a light-combining channel. The second light channel is arranged between the first light channel and the third light channel. The shapes and widths of the first light channel, the second light channel, and the third light channel are different from each other, and the light-combining channel is connected to the first light channel, the second light channel, and the third light channel. The laser emitting module can emit a red light beam, a green light beam, and a blue light beam, which respectively travel in the first light channel, the second light channel, and the third light channel for being combined into a white light beam in the light-combining channel.
    Type: Application
    Filed: September 6, 2024
    Publication date: July 31, 2025
    Inventors: CHIH-HAN YEN, HAN-CHIANG WU, TING-QING CHEN, YU-YI CHIEN
  • Publication number: 20250246158
    Abstract: Example Light Emitting Diode (LED) driver circuitry includes: memory; and programmable circuitry configured to: identify a first LED within a first row of a grid of LEDs; identify a second LED within a second row of the grid of LEDs; turn the first LED off at a first time, the first time based on an update from a first image frame to a second image frame; and turn the second LED off at a second time, the second time based on the update from the first image frame to the second image frame, the second time different from the first time.
    Type: Application
    Filed: January 25, 2024
    Publication date: July 31, 2025
    Inventors: Xiaoxiao Xu, Chih Pu Yeh
  • Publication number: 20250246551
    Abstract: An interconnect structure and a method of fabricating the interconnect structure are disclosed. The interconnect structure includes an inter-metal dielectric (IMD) structure disposed on a transistor, first and second conductive lines disposed in the IMD structure, and a third conductive line, disposed in the IMD structure. The first conductive line includes a top surface with a first width and a bottom surface with a second width greater than the first width. The third conductive line includes an upper surface with a third width and a lower surface with a fourth width smaller than the third width. Metals of the first and third conductive lines are different from each other.
    Type: Application
    Filed: October 23, 2024
    Publication date: July 31, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chi LO, Chih-Yi CHANG, Hung-Yi HUANG, Wei-Yip LOH
  • Publication number: 20250248115
    Abstract: A high voltage complementary metal oxide semiconductor (CMOS) device includes: a semiconductor layer, plural insulation regions, a first N-type high voltage well and a second N-type high voltage well, which are formed by one same ion implantation process, a first P-type high voltage well and a second P-type high voltage well, which are formed by one same ion implantation process, a first drift oxide region and a second oxide region, which are formed by one same etching process by etching a drift oxide layer; a first gate and a second gate, which are formed by one same etching process by etching a polysilicon layer, an N-type source and an N-type drain, and a P-type source and a P-type drain.
    Type: Application
    Filed: March 4, 2025
    Publication date: July 31, 2025
    Inventors: Wu-Te Weng, Chih-Wen Hsiung, Ta-Yung Yang
  • Publication number: 20250247427
    Abstract: A radio access network (RAN) can perform a method for managing security protection for multicast and/or broadcast services (MBS). The method includes receiving (802), from a core network (CN) via a DL tunnel, a data packet associated with an MBS session; prior to transmitting the data packet to a plurality of UEs, determining (804) which security protection to apply to the data packet based on an identity of the DL tunnel; and transmitting (806) the data packet to the plurality of UEs using the determined security protection. A UE can receive (902), from a RAN, a configuration for establishing a logical channel with the RAN; receive (904), from the RAN via the logical channel, a data packet associated with an MBS session; determine (906) which security protection to apply to the data packet based on the configuration; and apply (908) the determined security protection to the data packet.
    Type: Application
    Filed: October 20, 2022
    Publication date: July 31, 2025
    Inventor: Chih-Hsiang Wu