Patents by Inventor Chin CHIU

Chin CHIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170271473
    Abstract: Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a channel region of the e-HEMT, and a ternary III/V semiconductor layer arranged over the binary III/V semiconductor layer and made of a second III-nitride material to act as a barrier layer. Source and drain regions are arranged over the ternary III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.
    Type: Application
    Filed: June 5, 2017
    Publication date: September 21, 2017
    Inventors: Han-Chin Chiu, Chi-Ming Chen, Cheng-Yuan Tsai, Fu-Wei Yao
  • Publication number: 20170271492
    Abstract: A semiconductor structure comprises a semiconductive substrate comprising a top surface, a III-V compound layer over the semiconductive substrate, and a first passivation layer over the III-V compound layer. The semiconductor structure also includes an etch stop layer over the first passivation layer. The semiconductor structure further includes a gate stack over the first passivation layer and surrounded by the etch stop layer.
    Type: Application
    Filed: March 17, 2016
    Publication date: September 21, 2017
    Inventors: HAN-CHIN CHIU, SHENG-DE LIU, YU-SYUAN LIN, YAO-CHUNG CHANG, CHENG-YUAN TSAI
  • Publication number: 20170263729
    Abstract: A High Electron Mobility Transistor (HEMT) and a method of forming the same are disclosed. The HEMT includes a first III-V compound layer having a first band gap and a second III-V compound layer having a second band gap over the first III-V compound layer, wherein the second band gap is greater than the first band gap. The HEMT further includes a first oxide layer over the second III-V compound layer; a first interfacial layer over the first oxide layer; and a passivation layer over the first interfacial layer.
    Type: Application
    Filed: May 19, 2017
    Publication date: September 14, 2017
    Inventors: Han-Chin Chiu, Cheng-Yuan Tsai
  • Publication number: 20170209937
    Abstract: A cutter fastening assembly has a tool block, a fastening bolt, a fastening unit, a collet, and a cutter holder. The fastening bolt, the fastening unit, and the collet are mounted inside the tool block. The cutter holder has an assembling seat and a threaded hole. The assembling seat is integrally formed on the cutter holder and has a flange portion. The threaded hole is axially defined inside the flange portion and is screwed with the fastening bolt to keep the cutter holder connecting with the tool block.
    Type: Application
    Filed: January 21, 2016
    Publication date: July 27, 2017
    Inventor: Chin-Chiu CHEN
  • Publication number: 20170189971
    Abstract: A cutter holder has a body, a fastening bolt, and a vibration absorbing structure. The body has a specific weight. The fastening bolt is mounted inside the body. The vibration absorbing structure is mounted inside the body and has a sleeve, an elastic unit, a spacer, and a set nut. The sleeve is mounted around the fastening bolt and has a specific weight. The specific weight of the sleeve is larger than the specific weight of the body. The elastic unit is mounted around the fastening bolt and has two opposite ends. One of the ends of the elastic unit abuts against the sleeve. The spacer is mounted around the fastening bolt and abuts against the other end of the elastic unit. The set nut is screwed with the fastening bolt and abuts against the spacer.
    Type: Application
    Filed: January 6, 2016
    Publication date: July 6, 2017
    Inventor: Chin-Chiu Chen
  • Patent number: 9689553
    Abstract: The disclosure relates to a lens, the lens includes a bottom surface and a light emergent surface relative to the bottom surface, the bottom surface defines a recess configured to receive a light source. The lens further includes a light incident surface opposite to the recess, the light incident surface faces away from the light emergent surface. The light incident surface is formed by a number of ring-shaped curved surfaces connected to each other one by one. The disclosure also relates to a light emitting device using the same.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: June 27, 2017
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Po-Chin Chiu
  • Patent number: 9685525
    Abstract: Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a channel region of the e-HEMT, and a ternary III/V semiconductor layer arranged over the binary III/V semiconductor layer and made of a second III-nitride material to act as a barrier layer. Source and drain regions are arranged over the ternary III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: June 20, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Han-Chin Chiu, Chi-Ming Chen, Cheng-Yuan Tsai, Fu-Wei Yao
  • Patent number: 9666683
    Abstract: A High Electron Mobility Transistor (HEMT) and a method of forming the same are disclosed. The method includes epitaxially growing a first III-V compound layer and epitaxially growing a second III-V compound layer over the first III-V compound layer, wherein a first native oxide layer is formed on the second III-V compound layer. The method further includes in-situ treating the first native oxide layer with a first gas, thereby converting the first native oxide layer into a first crystalline oxide layer. The method further includes forming a first crystalline interfacial layer over the first crystalline oxide layer and forming a dielectric passivation layer over the first crystalline interfacial layer.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: May 30, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Han-Chin Chiu, Cheng-Yuan Tsai
  • Patent number: 9633920
    Abstract: The present disclosure relates to a structure and method of forming a low damage passivation layer for III-V HEMT devices. In some embodiments, the structure has a bulk buffer layer disposed over a substrate and a device layer of III-V material disposed over the bulk buffer layer. A source region, a drain region and a gate region are disposed above the device layer. The gate region comprises a gate electrode overlying a gate separation layer. A bulk passivation layer is arranged over the device layer, and an interfacial layer of III-V material is disposed between the bulk passivation layer and the device layer in such a way that the source region, the drain region and the gate region extend through the bulk passivation layer and the interfacial layer, to abut the device layer.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: April 25, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Han-Chin Chiu, Cheng-Yuan Tsai, Ming-Wei Tsai, Yao-Wen Chang, Wen-Yuan Hsieh
  • Patent number: 9627523
    Abstract: A high electron mobility transistor comprises a substrate, an epitaxial stack arranged above the substrate and having a first region and a second region surrounding the first region, a matrix electrode structure arranged in the first region. The matrix electrode comprises a plurality of first electrodes arranged on the epitaxial stack, a plurality of second electrodes arranged on the epitaxial stack and adjacent to the plurality of first electrodes, a plurality of third electrodes arranged adjacent to the plurality of first electrodes and second electrodes. One of the plurality of first electrodes comprises a first side, a second side, a third side and a fourth side. The first side and the third side are opposite sides, and the second side and the fourth side are opposite sides. Two of the plurality of second electrodes are arranged on the first side and the third side, and two of the plurality of third electrodes are arranged on the second side and the fourth side.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: April 18, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Hsein-chin Chiu, Chien-Kai Tung, Heng-Kuang Lin, Chih-Wei Yang, Hsiang-Chun Wang
  • Publication number: 20170104083
    Abstract: A High Electron Mobility Transistor (HEMT) and a method of forming the same are disclosed. The method includes epitaxially growing a first III-V compound layer and epitaxially growing a second III-V compound layer over the first III-V compound layer, wherein a first native oxide layer is formed on the second III-V compound layer. The method further includes in-situ treating the first native oxide layer with a first gas, thereby converting the first native oxide layer into a first crystalline oxide layer. The method further includes forming a first crystalline interfacial layer over the first crystalline oxide layer and forming a dielectric passivation layer over the first crystalline interfacial layer.
    Type: Application
    Filed: October 9, 2015
    Publication date: April 13, 2017
    Inventors: Han-Chin Chiu, Cheng-Yuan Tsai
  • Publication number: 20170092738
    Abstract: A High Electron Mobility Transistor (HEMT) includes a first III-V compound layer having a first band gap, and a second III-V compound layer having a second band gap over the first III-V compound layer. The second band gap is smaller than the first band gap. The HEMT further includes a third III-V compound layer having a third band gap over the second III-V compound layer, wherein the third band gap is greater than the first band gap. A gate electrode is formed over the third III-V compound layer. A source region and a drain region are over the third III-V compound layer and on opposite sides of the gate electrode.
    Type: Application
    Filed: December 13, 2016
    Publication date: March 30, 2017
    Inventors: Chen-Hao Chiang, Po-Chun Liu, Han-Chin Chiu, Chi-Ming Chen, Chung-Yi Yu
  • Publication number: 20170084802
    Abstract: An optical lens for an LED includes an upper portion defining a light extraction face, a lower portion and an annular flange between the upper and lower portions. The lower portion has a wall section defining a cavity for receiving the LED therein, and a curved lateral side. A lateral light generated by the LED and running against the curved lateral side has at least a part being refracted or reflected thereby to run through the light extraction face of the optical lens.
    Type: Application
    Filed: September 23, 2015
    Publication date: March 23, 2017
    Inventor: Po-Chin Chiu
  • Patent number: 9601608
    Abstract: A high-electron mobility transistor (HEMT) device employing a gate protection layer is provided. A substrate has a channel layer arranged over the substrate and has a barrier layer arranged over the channel layer. The channel and barrier layers define a heterojunction, and a gate structure is arranged over a gate region of the barrier layer. The gate structure includes a gate arranged over a cap, where the cap is disposed on the barrier layer. The gate protection layer is arranged along sidewalls of the cap and arranged below the gate between opposing surfaces of the gate and the cap. Advantageously, the gate protection layer passivates the gate, reduces leakage current along sidewalls of the cap, and improves device reliability and threshold voltage uniformity. A method for manufacturing the HEMT device is also provided.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: March 21, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Wei Tsai, King-Yuen Wong, Han-Chin Chiu, Sheng-de Liu
  • Publication number: 20170059121
    Abstract: The disclosure relates to a lens, the lens includes a bottom surface and a light emergent surface relative to the bottom surface, the bottom surface defines a recess configured to receive a light source. The lens further includes a light incident surface opposite to the recess, the light incident surface faces away from the light emergent surface. The light incident surface is formed by a number of ring-shaped curved surfaces connected to each other one by one. The disclosure also relates to a light emitting device using the same.
    Type: Application
    Filed: October 20, 2015
    Publication date: March 2, 2017
    Inventor: PO-CHIN CHIU
  • Publication number: 20170059122
    Abstract: The present disclosure relates to a lens. The lens includes a bottom surface, a top surface, and a side surface. The top surface is opposite to the bottom surface. The center of the bottom surface is recessed towards the top surface to form a light incident groove. The top surface is recessed towards the bottom surface to form a light-emitting groove. The side surface is connected between the bottom surface and the top surface. The side surface defines a microstructure, and the side surface is fully covered by the microstructure.
    Type: Application
    Filed: October 26, 2015
    Publication date: March 2, 2017
    Inventor: PO-CHIN CHIU
  • Patent number: 9564330
    Abstract: The present disclosure relates to an enhancement mode MISFET device. In some embodiments, the MISFET device has an electron supply layer located on top of a layer of semiconductor material. A multi-dielectric layer, having two or more stacked dielectric materials sharing an interface having negative fixed charges, is disposed above the electron supply layer. A metal gate structure is disposed above the multi-dielectric layer, such that the metal gate structure is separated from the electron supply layer by the multi-dielectric layer. The multi-dielectric layer provides fixed charges at interfaces between the separate dielectric materials, which cause the transistor device to achieve a normally off disposition.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: February 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Han-Chin Chiu, Hsing-Lien Lin, Cheng-Yuan Tsai
  • Publication number: 20170030551
    Abstract: The present disclosure relates to a lens. The lens includes a bottom surface, a top surface, and a side surface. The side surface is connected to the bottom surface and the top surface, and between the top surface and the bottom surface. The center of the bottom surface is recessed towards the top surface, and forms a groove. The top surface is recessed towards the bottom surface, and the top surface is concave. The groove includes a top incident surface and a side incident surface. The side incident surface is connected to the top incident surface and the bottom surface. Some micro-structures are set on the top incident surface and form a rough surface. Some reflective films are set on the side incident surface. The present disclosure also relates to a light-emitting device employing the lens.
    Type: Application
    Filed: October 26, 2015
    Publication date: February 2, 2017
    Inventor: PO-CHIN CHIU
  • Patent number: 9525054
    Abstract: A High Electron Mobility Transistor (HEMT) includes a first III-V compound layer having a first band gap, and a second III-V compound layer having a second band gap over the first III-V compound layer. The second band gap is smaller than the first band gap. The HEMT further includes a third III-V compound layer having a third band gap over the second III-V compound layer, wherein the third band gap is greater than the first band gap. A gate electrode is formed over the third III-V compound layer. A source region and a drain region are over the third III-V compound layer and on opposite sides of the gate electrode.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: December 20, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hao Chiang, Po-Chun Liu, Han-Chin Chiu, Chi-Ming Chen, Chung-Yi Yu
  • Publication number: 20160351684
    Abstract: Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a channel region of the e-HEMT, and a ternary III/V semiconductor layer arranged over the binary III/V semiconductor layer and made of a second III-nitride material to act as a barrier layer. Source and drain regions are arranged over the ternary III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.
    Type: Application
    Filed: August 11, 2016
    Publication date: December 1, 2016
    Inventors: Han-Chin Chiu, Chi-Ming Chen, Cheng-Yuan Tsai, Fu-Wei Yao