Patents by Inventor Chin Li

Chin Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121133
    Abstract: Systems and methods for an Internet of Things (IoT), smart home climate control and communication system are provided. The IoT, smart home climate control and communication system includes a first smart home device that receives signal sources from a wide area network, transmits signals, data and commands to one or more smart home devices in a home or building in an IoT LAN. The first smart home device also receives signals, data and commands from the one or more smart home devices in the home or building on the IoT LAN, and transmits signals, data and/or commands to the wide area network. The IoT LAN is distinct from a residential wireless LAN.
    Type: Application
    Filed: April 11, 2023
    Publication date: April 11, 2024
    Inventor: Max Chin Li
  • Patent number: 11952608
    Abstract: The present invention relates to methods for producing oxygenated terpenoids. Polynucleotides, derivative enzymes, and host cells for use in such methods are also provided.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: April 9, 2024
    Assignee: Manus Bio Inc.
    Inventors: Ajikumar Parayil Kumaran, Chin Giaw Lim, Liwei Li, Souvik Ghosh, Christopher Pirie, Anthony Qualley
  • Publication number: 20240101715
    Abstract: Provided are various embodiments relating to caninized TNF? antibodies and caninized NGF antibodies. Such antibodies can be used in methods to treat canines with inflammatory conditions, such as inflammatory bowel disease and/or in methods to treat canines with pain, such as osteoarthrititic pain, back pain, cancer pain, and/or a neuropathic pain.
    Type: Application
    Filed: December 17, 2021
    Publication date: March 28, 2024
    Inventors: Stephanie A. PIERCE, Leonard PRESTA, Shyr Jiann LI, Lam NGUYEN, Richard CHIN, Hangjun ZHAN
  • Patent number: 11942398
    Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li Yang, Wen-Hsiung Lu, Jhao-Yi Wang, Fu Wei Liu, Chin-Yu Ku
  • Publication number: 20240096628
    Abstract: A photo mask includes a plurality of device features, a first assist feature, and a second assist feature. The device features are in a patterning region of a device region. The first assist feature are in the patterning region and adjacent to the device features. The first assist feature is for correcting an optical proximity effect in a photolithography process. The second assist feature is in a non-patterning region of the device region. The second assist feature is a sub-resolution correction feature, and a first distance between the second assist feature and one of the device features closest to the second assist feature is greater than a second distance between adjacent two of the device features.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bao-Chin LI, Chung-Kai HUANG, Ko-Pin KAO, Ching-Yen HSAIO
  • Publication number: 20240083742
    Abstract: A micro electro mechanical system (MEMS) includes a circuit substrate comprising electronic circuitry, a support substrate having a recess, a bonding layer disposed between the circuit substrate and the support substrate, through holes passing through the circuit substrate to the recess, a first conductive layer disposed on a front side of the circuit substrate, and a second conductive layer disposed on an inner wall of the recess. The first conductive layer extends into the through holes and the second conductive layer extends into the through holes and coupled to the first conductive layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li YANG, Kai-Di WU, Ming-Da CHENG, Wen-Hsiung LU, Cheng Jen LIN, Chin Wei KANG
  • Publication number: 20240067738
    Abstract: Provided are various embodiments relating to anti-IL4R antibodies that bind to canine IL4R. In various embodiments, such anti-IL4R antibodies can be used in methods to treat IL4/IL13-induced conditions, such as atopic dermatitis, allergic dermatitis, pruritus, asthma, psoriasis, scleroderma and eczema, in companion animals, such as canines and felines. Also provided are various embodiments relating to variant IgG Fc polypeptides and variant light chain constant regions of companion animal species for the preparation of antibodies or bispecific antibodies.
    Type: Application
    Filed: March 17, 2021
    Publication date: February 29, 2024
    Inventors: Shyr Jiann LI, Lam NGUYEN, Richard CHIN, Hangjun ZHAN, Qingyi CHU
  • Publication number: 20240063159
    Abstract: A package structure is disclosed. The package structure includes a substrate including a conductive element and a plurality of wires having a surface area through which heat of the conductive element can be dissipated, lowering a bonding temperature of the conductive element. The package structure also includes a conductive layer disposed between the conductive element of the substrate and the plurality of wires. The conductive contact layer attaches the plurality of wires over the conductive element.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: An-Hsuan HSU, Chin-Li KAO
  • Publication number: 20240035971
    Abstract: A fluorescence lifetime imaging microscopy system comprises a microscope comprising an excitation source configured to direct an excitation energy to an imaging target, and a detector configured to measure emissions of energy from the imaging target, and a non-transitory computer-readable medium with instructions stored thereon, which perform steps comprising collecting a quantity of measured emissions of energy from the imaging target as measured data, providing a trained neural network configured to calculate fluorescent decay parameters from the quantity of measured emissions of energy, providing the data to the trained neural network, and calculating at least one fluorescence lifetime parameter with the neural network from the measured data, wherein the measured data comprises an input fluorescence decay histogram, and wherein the neural network was trained by a generative adversarial network. A method of training a neural network and a method of acquiring an image are also described.
    Type: Application
    Filed: September 17, 2021
    Publication date: February 1, 2024
    Inventors: Hsin-Chih Yeh, Yuan-I Chen, Yin-Jui Chang, Shih-Chu Liao, Trung Duc Nguyen, Soonwoo Hong, Yu-An Kuo, Hsin-Chin Li
  • Patent number: 11854808
    Abstract: A photo mask includes a plurality of device features, a first assist feature, and a second assist feature. The device features are in a patterning region of a device region. The first assist feature are in the patterning region and adjacent to the device features. The first assist feature is for correcting an optical proximity effect in a photolithography process. The second assist feature is in a non-patterning region of the device region. The second assist feature is a sub-resolution correction feature, and a first distance between the second assist feature and one of the device features closest to the second assist feature is greater than a second distance between adjacent two of the device features.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bao-Chin Li, Chung-Kai Huang, Ko-Pin Kao, Ching-Yen Hsaio
  • Patent number: 11855034
    Abstract: An electronic device package is provided. The electronic device package includes a redistribution layer (RDL), a first electronic component and an interconnector. The RDL includes a topmost circuit layer, and the topmost circuit layer includes a conductive trace. The first electronic component is disposed over the RDL. The interconnector is disposed between the RDL and the first electronic component. A direction is defined by extending from a center of the first electronic component toward an edge of the first electronic component, and the direction penetrates a first sidewall and a second sidewall of the interconnector, the second sidewall is farther from the center of the first electronic component than the first sidewall is, and the conductive trace is outside a projection region of the second sidewall.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: December 26, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung-Hung Lai, Chin-Li Kao, Chih-Yi Huang, Teck-Chong Lee
  • Publication number: 20230408787
    Abstract: An imaging lens assembly includes a first plastic lens element and a second plastic lens element arranged along an optical axis. The first plastic lens element includes, in order from a paraxial region to a peripheral region, a first optically effective portion, a first size reduction portion and a first peripheral portion. An object-side surface and an image-side surface of the first size reduction portion each has a roughened surface. The first peripheral portion is to be in physical contact and assembled with adjacent components. The second plastic lens element includes, in order from a paraxial region to a peripheral region, a second optically effective portion, a second size reduction portion and a second peripheral portion. An object-side surface and an image-side surface of the second size reduction portion each has a roughened surface. The second peripheral portion is to be in physical contact and assembled with adjacent components.
    Type: Application
    Filed: August 12, 2022
    Publication date: December 21, 2023
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Lin An CHANG, Chin Li HSIEH, Chun-Hua TSAI
  • Publication number: 20230268314
    Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a package component having a first mounting surface and a second mounting surface; and a first electronic component having a first conductive pad signal communicatively mounted on the first mounting surface through a first type connector; wherein the first type connector comprises a first solder composition having a lower melting point layer sandwiched between a pair of higher melting point layers, wherein the lower melting point layer is composed of alloys capable of forming a room temperature eutectic.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shan-Bo WANG, Chin-Li KAO, An-Hsuan HSU
  • Patent number: 11689822
    Abstract: A dual sensor imaging system and a privacy protection imaging method thereof are provided. The system is configured to control at least one color sensor and at least one IR sensor to respectively capture multiple color images and multiple IR images by adopting multiple exposure conditions adapted for an imaging scene, adaptively select a combination of the color image and the IR image that can reveal details of the imaging scene, detect a feature area with features of a target of interest in the color image, and fuse the color image and the IR image to generate a fusion image with the details of the imaging scene, and crop an image of the feature area of the fusion image to be replaced with an image not belonging to the IR image, so as to generate a scene image.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: June 27, 2023
    Assignee: Altek Semiconductor Corp.
    Inventors: Shih-Yuan Peng, Shu-Chun Cheng, Hsu-Lien Huang, Yun-Chin Li, Kuo-Ming Lai
  • Patent number: 11621217
    Abstract: A substrate structure and a semiconductor package structure are provided. The substrate structure includes a first dielectric layer, a pad and a conductive structure. The first dielectric layer has a first surface and a second surface opposite to the first surface. The pad is adjacent to the first surface and at least partially embedded in the first dielectric layer. The first dielectric layer has an opening exposing the pad, and a width of the opening is less than a width of the pad. The conductive structure is disposed on the pad and composed of a first portion outside the opening of the first dielectric layer and a second portion embedded in the opening of the first dielectric layer. The first portion has an aspect ratio exceeding 1.375.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: April 4, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun-Wei Shih, Sheng-Wen Yang, Chung-Hung Lai, Chin-Li Kao
  • Publication number: 20230066993
    Abstract: A photo mask includes a plurality of device features, a first assist feature, and a second assist feature. The device features are in a patterning region of a device region. The first assist feature are in the patterning region and adjacent to the device features. The first assist feature is for correcting an optical proximity effect in a photolithography process. The second assist feature is in a non-patterning region of the device region. The second assist feature is a sub-resolution correction feature, and a first distance between the second assist feature and one of the device features closest to the second assist feature is greater than a second distance between adjacent two of the device features.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bao-Chin LI, Chung-Kai HUANG, Ko-Pin KAO, Ching-Yen HSAIO
  • Patent number: 11577956
    Abstract: A method of producing ceria nanocrystals is provided. The method includes providing a gas that includes ozone to a solution that includes a cerium salt, and obtaining ceria nanocrystals from the solution after the gas is provided to the first solution. A method of producing nanoparticles is provided. The method includes providing a gas that includes ozone to a solution that includes a metal salt that includes at least one of a transition metal or a lanthanide, and producing at least one of metal oxide nanoparticles, metal oxynitrate nanoparticles, or metal oxyhydroxide nanoparticles from the solution after the gas is provided to the solution.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: February 14, 2023
    Assignee: NUtech Ventures
    Inventors: Chin Li Cheung, Christopher Mark Marin, Anuja Bhalkikar, Tamra Fisher
  • Patent number: 11568526
    Abstract: A dual sensor imaging system and an imaging method thereof are provided. The method includes: identifying an imaging scene; controlling a color sensor and an IR sensor to respectively capture color images and IR images by adopting capturing conditions suitable for the imaging scene; calculating a signal-to-noise ratio (SNR) difference between each color image and the IR images, and a luminance mean value of each color image; selecting the color image and IR image captured under capturing conditions of having the SNR difference less than an SNR threshold and the luminance mean value greater than a luminance threshold to execute a feature domain transformation to extract partial details of the imaging scene; and fusing the selected color image and IR image to adjust the partial details of the color image according to a guidance of the partial details of the IR image to obtain a scene image with full details.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: January 31, 2023
    Assignee: Altek Semiconductor Corp.
    Inventors: Shih-Yuan Peng, Shu-Chun Cheng, Hsu-Lien Huang, Yun-Chin Li, Kuo-Ming Lai
  • Publication number: 20230019525
    Abstract: Systems and methods for an Internet of Things (IoT), smart home climate control and communication system are provided. The IoT, smart home climate control and communication system includes a first smart home device that receives signal sources from a wide area network, transmits signals, data and commands to one or more smart home devices in a home or building in an IoT LAN. The first smart home device also receives signals, data and commands from the one or more smart home devices in the home or building on the IoT LAN, and transmits signals, data and/or commands to the wide area network. The IoT LAN is distinct from a residential wireless LAN.
    Type: Application
    Filed: July 25, 2022
    Publication date: January 19, 2023
    Inventor: Max Chin Li
  • Publication number: 20220384381
    Abstract: An electronic device package is provided. The electronic device package includes a redistribution layer (RDL), a first electronic component and an interconnector. The RDL includes a topmost circuit layer, and the topmost circuit layer includes a conductive trace. The first electronic component is disposed over the RDL. The interconnector is disposed between the RDL and the first electronic component. A direction is defined by extending from a center of the first electronic component toward an edge of the first electronic component, and the direction penetrates a first sidewall and a second sidewall of the interconnector, the second sidewall is farther from the center of the first electronic component than the first sidewall is, and the conductive trace is outside a projection region of the second sidewall.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 1, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chung-Hung LAI, Chin-Li KAO, Chih-Yi HUANG, Teck-Chong LEE