Patents by Inventor Chin Wu
Chin Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240139990Abstract: An internal rotor type nail drive device of electric nail gun, comprising a nailing rod and an internal rotor type rotary actuator that can output a specific rotation angle and can drive the nailing rod to move downward for nailing. Specifically, the rotary actuator comprises a stator and a rotor arranged inside the stator, even groups of electromagnetic mutual action components are configured in pairs between the stator and the rotor, to generate a tangential force to drive the rotor to rotate for a specific rotation angle, and to drive the nailing rod to move for a nailing stroke. The nailing stroke can be determined by a specific rotation angle. Thus, through the above configuration of the rotary actuator, the structure of the electric nail gun can be simplified, and the kinetic energy for nailing can be increased.Type: ApplicationFiled: August 22, 2023Publication date: May 2, 2024Inventors: I-TSUNG WU, CHIA-SHENG LIANG, YU-CHE LIN, WEN-CHIN CHEN
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Publication number: 20240146297Abstract: A gate driving device includes an operational amplifier, two impedances, a multiplexer, and an UVLO circuit. The operational amplifier has an output coupled to the gate of the SiC MOSFET, a positive power terminal coupled to a positive power rail, and a negative power terminal coupled to a negative power rail. The impedances are coupled in series and coupled between the output of the amplifier and a low-voltage terminal. The UVLO circuit is coupled to the multiplexer and the positive power rail and coupled to the positive power voltage of the positive power rail, a driving voltage, and an UVLO voltage. The UVLO circuit controls the multiplexer to transmit an off voltage or an on voltage to the positive input of the operational amplifier based on the positive power voltage, the driving voltage, and the UVLO voltage, thereby turning on or off the SiC MOSFET.Type: ApplicationFiled: October 28, 2022Publication date: May 2, 2024Applicant: Taipei ANJET CorporationInventors: Man Hay PONG, Wen-Chin Wu
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Publication number: 20240145898Abstract: An electronic device including a metal casing and at least one antenna module is provided. The metal casing includes at least one window. The at least one antenna module is disposed in the at least one window. The at least one antenna module includes a first radiator and a second radiator. The first radiator includes a feeding end, a first ground end joined to the metal casing, a second ground end, a first portion extending from the feeding end to the first ground end, and a second portion extending from the feeding end to the second ground end. A first coupling gap is between the second radiator and the first portion. A second coupling gap is between at least part of the second radiator and the metal casing, and the second radiator includes a third ground end joined to the metal casing.Type: ApplicationFiled: September 8, 2023Publication date: May 2, 2024Applicant: PEGATRON CORPORATIONInventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chih-Wei Liao, Hau Yuen Tan, Cheng-Hsiung Wu, Shih-Keng Huang
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Publication number: 20240145919Abstract: An antenna module includes a first metal plate and a frame body. The frame body surrounds the first metal plate. The frame body includes a first antenna radiator, a second antenna radiator, a third antenna radiator, a first breakpoint and a second breakpoint. The first antenna radiator includes a first feeding end and excites a first frequency band. The second antenna radiator includes a second feeding end and excites a second frequency band. The third antenna radiator includes a third feeding end and excites a third frequency band. The first breakpoint is located between the first antenna radiator and the second antenna radiator. The second breakpoint is located between the second antenna radiator and the third antenna radiator. An electronic device including the above-mentioned antenna module is also provided.Type: ApplicationFiled: September 6, 2023Publication date: May 2, 2024Applicant: PEGATRON CORPORATIONInventors: Chien-Yi Wu, Shih-Keng Huang, Chao-Hsu Wu, Chih-Wei Liao, Sheng-Chin Hsu, Hao-Hsiang Yang, Tse-Hsuan Wang
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Patent number: 11967446Abstract: An inductor is disclosed, the inductor comprising: a T-shaped magnetic core, being made of a material comprising an annealed soft magnetic metal material and having a base and a pillar integrally formed with the base, wherein ?CĂ—Hsat?1800, where ?C is a permeability of the T-shaped magnetic core, and Hsat (Oe) is a strength of the magnetic field at 80% of ?C0, where ?C0 is the permeability of the T-shaped magnetic core when the strength of the magnetic field is 0.Type: GrantFiled: January 4, 2021Date of Patent: April 23, 2024Assignee: CYNTEC CO., LTD.Inventors: Chun-Tiao Liu, Lan-Chin Hsieh, Tsung-Chan Wu, Chi-Hsun Lee, Chih-Siang Chuang
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Publication number: 20240125004Abstract: A method of growing a single crystal ingot includes growing a single crystal silicon ingot from a silicon melt in a crucible within an inner chamber, adding a volatile dopant into a feed tube, positioning the feed tube within an inner chamber at a first height relative to a surface of the melt, adjusting the feed tube within the inner chamber to a second height at a speed rate, and heating the volatile dopant to form a gaseous dopant as the feed tube is moved from the first height to the second height at the speed rate. Each of the second height and the speed rate are selected to control a vaporization rate of the volatile dopant. The method also includes introducing dopant species into the melt while growing the ingot by contacting the surface of the melt with the gaseous dopant.Type: ApplicationFiled: October 13, 2022Publication date: April 18, 2024Inventors: Chieh HU, Hsien-Ta TSENG, Chun-Sheng WU, William Lynn LUTER, Liang-Chin CHEN, Sumeet BHAGAVAT, Carissima Marie HUDSON, Yu-Chiao Wu
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Publication number: 20240125003Abstract: A method of growing a single crystal ingot includes growing a single crystal silicon ingot from a silicon melt in a crucible within an inner chamber, adding a volatile dopant into a feed tube, positioning the feed tube within an inner chamber at a first height relative to a surface of the melt, adjusting the feed tube within the inner chamber to a second height at a speed rate, and heating the volatile dopant to form a gaseous dopant as the feed tube is moved from the first height to the second height at the speed rate. Each of the second height and the speed rate are selected to control a vaporization rate of the volatile dopant. The method also includes introducing dopant species into the melt while growing the ingot by contacting the surface of the melt with the gaseous dopant.Type: ApplicationFiled: October 13, 2022Publication date: April 18, 2024Inventors: Chieh HU, Hsien-Ta TSENG, Chun-Sheng WU, William Lynn LUTER, Liang-Chin CHEN, Sumeet BHAGAVAT, Carissima Marie HUDSON, Yu-Chiao Wu
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Patent number: 11962292Abstract: A gate driving device includes an operational amplifier, two impedances, a multiplexer, and an UVLO circuit. The operational amplifier has an output coupled to the gate of the SiC MOSFET, a positive power terminal coupled to a positive power rail, and a negative power terminal coupled to a negative power rail. The impedances are coupled in series and coupled between the output of the amplifier and a low-voltage terminal. The UVLO circuit is coupled to the multiplexer and the positive power rail and coupled to the positive power voltage of the positive power rail, a driving voltage, and an UVLO voltage. The UVLO circuit controls the multiplexer to transmit an off voltage or an on voltage to the positive input of the operational amplifier based on the positive power voltage, the driving voltage, and the UVLO voltage, thereby turning on or off the SiC MOSFET.Type: GrantFiled: October 28, 2022Date of Patent: April 16, 2024Assignee: TAIPEI ANJET CORPORATIONInventors: Man Hay Pong, Wen-Chin Wu
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Publication number: 20240113429Abstract: An electronic device including a bracket and an antenna is provided. The bracket includes first, second, third, and fourth surfaces. The antenna includes a radiator. The radiator includes first, second, third, and fourth portions. The first portion is located on the first surface and includes connected first and second sections. The second portion is located on the second surface and includes third, fourth, fifth, and sixth sections. The third section, the fourth section, and the fifth sections are bent and connected to form a U shape. The third portion is located on the third surface and is connected to the second section and the fourth section. The fourth portion is located on the fourth surface and is connected to the fifth section, the sixth section, and the third portion. The radiator is adapted to resonate at a low frequency band and a first high frequency band.Type: ApplicationFiled: August 16, 2023Publication date: April 4, 2024Applicant: PEGATRON CORPORATIONInventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chia-Hung Chen, Chih-Wei Liao, Hau Yuen Tan, Hao-Hsiang Yang, Shih-Keng Huang
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Patent number: 11935957Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.Type: GrantFiled: August 9, 2021Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Chiang Wu, Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
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Publication number: 20240087980Abstract: A semiconductor device includes a substrate, a dielectric layer disposed over the substrate, and an interconnect structure extending through the dielectric layer. The dielectric layer includes a low-k dielectric material which includes silicon carbonitride having a carbon content ranging from about 30 atomic % to about 45 atomic %. The semiconductor device further includes a thermal dissipation feature extending through the dielectric layer and disposed to be spaced apart from the interconnect structure.Type: ApplicationFiled: February 17, 2023Publication date: March 14, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kai-Fang CHENG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Yen-Ju WU, Yen-Pin HSU, Li-Ling SU, Ming-Hsien LIN, Hsiao-Kang CHANG
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Patent number: 11916146Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.Type: GrantFiled: April 11, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
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Publication number: 20240061344Abstract: A method for manufacturing a lithographic mask for an integrated circuit includes performing an optical proximity correction (OPC) process to an integrated circuit mask layout to produce a corrected mask layout. The method further includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout. The method also includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout.Type: ApplicationFiled: November 1, 2023Publication date: February 22, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsu-Ting HUANG, Tung-Chin WU, Shih-Hsiang LO, Chih-Ming LAI, Jue-Chin YU, Ru-Gun LIU, Chin-Hsiang LIN
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Publication number: 20240024357Abstract: A method of preparing an iron hydroxide product is provided. The method includes the steps of: adding a first base solution to a solution of a ferric salt to obtain Mixture A having a pH value of 2.7-2.8, adding a second base solution to Mixture A to prepare a crude iron hydroxide suspension having a pH value of 2.8-3.8, and adding a third base solution to adjust the pH of the crude iron hydroxide suspension to 5-9, followed by purification and concentration, thereby obtaining a purified polynuclear iron hydroxide suspension containing polynuclear iron hydroxide. Also provided are nano iron complexes, e.g., iron hydroxide carbohydrate complex and their preparation methods.Type: ApplicationFiled: September 29, 2021Publication date: January 25, 2024Inventor: Chien-Chin Wu
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Publication number: 20240026442Abstract: The present disclosure provides methods and compositions for tracking nucleic acid fragment origin by target-specific barcode tagging when original nucleic acid targets break into small fragments. Nucleic acid targets are captured in vitro on a solid support with clonally localized nucleic acid barcode templates. Many nucleic acid targets can be processed simultaneously in a massively parallel fashion without partition. These nucleic acid target tracking methods can be used for a variety of applications in both whole genome sequencing and targeted sequencing in order to accurately identify genomic variants, haplotype phasing and assembly, for example.Type: ApplicationFiled: October 3, 2023Publication date: January 25, 2024Applicant: Universal Sequencing Technology CorporationInventors: Zhoutao CHEN, Tsai-Chin WU, Long Kim PHAM, Yong WANG
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Publication number: 20230405973Abstract: A composite material structure, including an outer layer, an inner layer, and a middle layer, is provided. The outer layer includes a metallic material. The inner layer includes a fiber material and a resin material. The outer layer has a first thickness, the inner layer has a second thickness, and the first thickness is different from the second thickness. The middle layer includes an adhesive material and is disposed between the outer layer and the inner layer. Two opposite surfaces of the middle layer are respectively in direct contact with the outer layer and the inner layer. A manufacturing method of the composite material structure is also provided.Type: ApplicationFiled: May 23, 2023Publication date: December 21, 2023Applicant: COMPAL ELECTRONICS, INC.Inventors: Han-Ching Huang, Sheng-Hung Lee, Jung-Chin Wu, Kuo-Nan Ling, Chih-Wen Chiang, Chien-Chu Chen
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Patent number: 11841619Abstract: A method for manufacturing a lithographic mask for an integrated circuit includes performing an optical proximity correction (OPC) process to an integrated circuit mask layout to produce a corrected mask layout. The method further includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout. The method also includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout.Type: GrantFiled: August 16, 2021Date of Patent: December 12, 2023Assignee: TAIWAN SEMINCONDUTOR MANUFACTURING COMPANY, LTD.Inventors: Hsu-Ting Huang, Tung-Chin Wu, Shih-Hsiang Lo, Chih-Ming Lai, Jue-Chin Yu, Ru-Gun Liu, Chin-Hsiang Lin
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Patent number: 11807903Abstract: The present disclosure provides methods and compositions for tracking nucleic acid fragment origin by target-specific barcode tagging when original nucleic acid targets break into small fragments. Nucleic acid targets are captured in vitro on a solid support with clonally localized nucleic acid barcode templates. Many nucleic acid targets canbe processed simultaneously in a massively parallel fashion without partition. These nucleic acid target tracking methods can be used for a variety of applications in both whole genome sequencing and targeted sequencing in order to accurately identify genomic variants, haplotype phasing and assembly, for example.Type: GrantFiled: February 8, 2019Date of Patent: November 7, 2023Assignee: Universal Sequencing Technology CorporationInventors: Zhoutao Chen, Tsai-Chin Wu, Long Kim Pham, Yong Wang
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Publication number: 20230345646Abstract: A display panel adapted to a spherical display device includes a substrate and a plurality of display configuration groups. The display configuration groups are arranged on the substrate along a first direction. Each of the display configuration groups corresponds to a display number and a display pitch. Each of the display configuration groups comprises at least one display row arranged along the first direction. Each of the at least one display row of each of the display configuration groups is arranged along a second direction orthogonal to the first direction according to the corresponding display number and the corresponding display pitch. The display configuration groups include a first configuration group and a second configuration group adjacent to each other, and the display pitch of the first configuration group is different from the display pitch of the second configuration group.Type: ApplicationFiled: December 30, 2022Publication date: October 26, 2023Inventors: Yea-Ching CHEN, Chih-Kai WANG, Yu-Chin WU
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Publication number: 20230341111Abstract: A light box structure includes a bracket and a board. The bracket is in an arc shape and has a first surface and a second surface opposite to each other. The board has a plurality of magnetic positioning posts. The magnetic positioning posts have at least two different heights. The board is attracted and attached on the first surface of the bracket through the magnetic positioning posts.Type: ApplicationFiled: December 30, 2022Publication date: October 26, 2023Inventors: Li-Yuan LIAO, Chien-Hsin LIN, Ming-Chun HSU, Yu-Chin WU