Patents by Inventor Chin Wu

Chin Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210047683
    Abstract: The present disclosure provides methods and compositions for tracking nucleic acid fragment origin by target-specific barcode tagging when original nucleic acid targets break into small fragments. Nucleic acid targets are captured in vitro on a solid support with clonally localized nucleic acid barcode templates. Many nucleic acid targets canbe processed simultaneously in a massively parallel fashion without partition. These nucleic acid target tracking methods can be used for a variety of applications in both whole genome sequencing and targeted sequencing in order to accurately identify genomic variants, haplotype phasing and assembly, for example.
    Type: Application
    Filed: February 8, 2019
    Publication date: February 18, 2021
    Inventors: Zhoutao CHEN, Tsai-Chin WU, Long Kim PHAM, Yong WANG
  • Publication number: 20210043860
    Abstract: Disclosed are a thin film transistor includes a gate electrode, an active layer including a semiconductor material and a first elastomer, a gate insulator between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer, wherein each of the semiconductor material and the first elastomer has a hydrogen bondable moiety, and the semiconductor material and the first elastomer are subjected to a dynamic intermolecular bonding by a hydrogen bond and a thin film transistor array and an electronic device including the same.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Applicants: Samsung Electronics Co., Ltd., THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY
    Inventors: Youngjun YUN, Xuzhou YAN, Jinyoung OH, Zhenan BAO, Hung-Chin WU
  • Publication number: 20210031489
    Abstract: The present disclosure provides a composite material including a first thermoplastic adhesive layer made of a first thermoplastic resin, a second thermoplastic adhesive layer made of a second thermoplastic resin, and a core layer. The core layer has a first surface and a second surface, wherein the first surface is bonded to the first thermoplastic adhesive layer, and the second surface is bonded to the second thermoplastic adhesive layer. The core layer has a plurality of cavities, wherein each of the plurality of cavities has a pore diameter smaller than a thickness of the core layer. The first thermoplastic resin and the second thermoplastic resin are respectively adapted to be filled in a part of the plurality of cavities adjacent to the first surface of the core layer and a part of the plurality of cavities adjacent to the second surface of the core layer by heating.
    Type: Application
    Filed: October 20, 2019
    Publication date: February 4, 2021
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Han-Ching Huang, Jung-Chin Wu, Kuo-Nan Ling, Po-An Lin
  • Publication number: 20210034426
    Abstract: Systems and methods for exporting logical object metadata. In one example, the system includes an electronic processor configured to receive a first input from a user. The first input includes a logical object location and at least one metadata export option. The electronic processor is also configured to create an export job based upon the first input. The electronic processor is also configured to store the export job in a job queue, determine when a computing resource is available to execute the export job, and execute the export job when the computing resource is available. The electronic processor is also configured to store a job manifest in a memory location. In one example, the job manifest includes metadata for each logical object located in the logical object location.
    Type: Application
    Filed: October 9, 2019
    Publication date: February 4, 2021
    Inventors: Wan Chin WU, Hani Gamal LOZA, Joe Keng YAP, Wenyu CAI, David Charles OLIVER, Simon BOURDAGES
  • Patent number: 10884636
    Abstract: Presenting workload performance in a storage system, including: receiving, via a user interface, information describing a potential change to an execution environment of the storage system; and displaying, via the user interface and in dependence upon a load model and predicted characteristics of one or more workloads executing on the storage system, predicted performance load on the storage system that would result from implementing the potential change.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: January 5, 2021
    Assignee: Pure Storage, Inc.
    Inventors: Farhan Abrol, Lei Zhou, Yi-Chin Wu, Apoorva Bansal, Loïc Magnin, Weizhong Hua
  • Publication number: 20200387062
    Abstract: A projection screen for diffusing illumination light into a range of viewing angles is formed by depositing a coating on a substrate. Within the coating are particles having an average particle height. Protrusions at least two microns higher than the average particle height may be substantially uniformly distributed over the screen. In some embodiments, each protrusion may be no closer than 80 microns to another protrusion.
    Type: Application
    Filed: May 19, 2020
    Publication date: December 10, 2020
    Inventor: Ching-Chin Wu
  • Patent number: 10853148
    Abstract: Migrating workloads between a plurality of execution environments, including: identifying, in dependence upon on characteristics of a workload, one or more execution environments that can support the workload; determining, for each execution environment, costs associated with supporting the workload on the execution environment; selecting, in dependence upon the costs associated with supporting the workload on each the execution environments, a target execution environment for supporting the workload; and executing the workload on the target execution environment.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: December 1, 2020
    Assignee: Pure Storage, Inc.
    Inventors: Chadd Kenney, Farhan Abrol, Lei Zhou, Yi-Chin Wu, Apoorva Bansal
  • Publication number: 20200341560
    Abstract: A method for switching a direction setting of direction keys is provided. The method is applied to a device and includes: receiving a signal, wherein the device is defined as having a first axis and a second axis, and the signal indicates a first-axis rotation angle of the device around the first axis and a second-axis rotation angle of the device around the second axis; and switching the direction setting of the direction keys in a key area of the device according to the first-axis rotation angle and the second-axis rotation angle to perform directional control on a current display image displayed by the device.
    Type: Application
    Filed: October 9, 2019
    Publication date: October 29, 2020
    Inventor: Tung-Chin WU
  • Publication number: 20200334644
    Abstract: A cloud information service integration system is provided. A client side uses a computer or a handheld smart communication device to install and prosecute a corresponding application software and then link to a network system of a cloud server for operation of a client side setting step, a service side setting step, a matching step, a search condition adjustment step, a selection step, and a payment step. In the matching step, a matching list is provided to the client side through active matching and manual matching. In the payment step, the client side pays an amount of money to a bank account of the service side or a third party payment account via the network system of the cloud server.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 22, 2020
    Inventors: Tsu-Chin WU, Chih-Ling CHIEN, Yen-Liang CHEN
  • Patent number: 10790289
    Abstract: A fabricating method of a stop layer includes providing a substrate. The substrate is divided into a memory region and a peripheral circuit region. Two conductive lines are disposed within the peripheral circuit region. Then, an atomic layer deposition is performed to form a silicon nitride layer to cover the conductive lines. Later, after forming the silicon nitride layer, a silicon carbon nitride layer is formed to cover the silicon nitride layer. The silicon carbon nitride layer serves as a stop layer.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: September 29, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chih-Chien Liu, Tzu-Chin Wu, Po-Chun Chen, Chia-Lung Chang
  • Patent number: 10770464
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a bit line structure on a substrate; forming a first spacer, a second spacer, and a third spacer around the bit line structure; forming an interlayer dielectric (ILD) layer on the bit line structure; planarizing part of the ILD layer; removing the ILD layer and the second spacer to form a recess between the first spacer and the third spacer; and forming a liner in the recess.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: September 8, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chih-Chien Liu, Chia-Lung Chang, Tzu-Chin Wu, Wei-Lun Hsu
  • Patent number: 10766031
    Abstract: The present disclosure relates to a microfluidic-based analyzer, including a drive module and a microfluidic disc. On the microfluidic disk, a capillary is connected between a mixing chamber and a waste chamber. More particularly, the capillary is connected to the mixing chamber through a first access on the first radius of the microfluidic disc, and the capillary is connected to the waste chamber through a second access on the second radius of the microfluidic disk. Specifically, a turn of the capillary is disposed between the first access and the second access, in which a folding is configured on a third radius of the microfluidic disc. Overall, the aforementioned microfluidic-based analyzer is able to be operated in different rotational speeds and is capable of evacuating the mixing chamber and enhancing the washing efficiency.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: September 8, 2020
    Assignee: FENG CHIA UNIVERSITY
    Inventors: Chih-Hsin Shih, Ho-Chin Wu, Yen-Hao Chen
  • Publication number: 20200230595
    Abstract: An immunodetection method is provided, including: providing a disk; providing a capture antibody on a substrate adding a sample to a reservoir; applying a first rotational speed to transfer the sample containing an antigen from the reservoir to a reaction chamber applying a second rotational speed to precipitate the sample on the substrate so as to combine the antigen in the sample with the capture antibody to obtain a first complex; using capillary force to make the sample flow out of the reaction chamber and to fill the flow channel; applying a third rotational speed to transfer the sample from the flow channel to the waste chamber; providing a detection antibody on the substrate to combine the detection antibody with the first complex to obtain a second complex; and detecting a spectral signal from the localized surface plasma resonance of the second complex.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 23, 2020
    Inventors: Chih-Hsin Shih, Ho-Chin Wu, Cheng-Liang Lee, Chuen-Yuan Hsu
  • Patent number: 10694159
    Abstract: The backlight module includes a bracket, a light emission module, a reflective film, and first glue structures. The bracket has a first plate and a second plate opposite to each other, and a third plate connecting the first plate to the second plate. The light emission module is disposed between the first plate and the second plate and includes light emission elements. The reflective film is disposed between the light emission elements and the first plate. The reflective film is mounted on the first plate of the bracket through the first adhesive structures. The first adhesive structures vertically project on the first plate at a plurality of first areas respectively, the light emission elements vertically project on the first plate at a plurality of second areas respectively, and the first areas do not overlap with the second areas.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: June 23, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Keng-Yi Lee, Yu-Chin Wu
  • Publication number: 20200174380
    Abstract: A method for manufacturing a lithographic mask for an integrated circuit includes performing an optical proximity correction (OPC) process to an integrated circuit mask layout to produce a corrected mask layout. The method further includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout. The method also includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout.
    Type: Application
    Filed: November 27, 2019
    Publication date: June 4, 2020
    Inventors: Hsu-Ting HUANG, Tung-Chin WU, Shih-Hsiang LO, Chih-Ming LAI, Jue-Chin YU, Ru-Gun LIU, Chin-Hsiang LIN
  • Patent number: 10672864
    Abstract: A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: June 2, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Tzu-Chin Wu, Wei-Hsin Liu, Yi-Wei Chen, Chia-Lung Chang, Jui-Min Lee, Po-Chun Chen, Li-Wei Feng, Ying-Chiao Wang, Wen-Chieh Lu, Chien-Ting Ho, Tsung-Ying Tsai, Kai-Ping Chen
  • Patent number: 10655137
    Abstract: Provided is an influenza mucosal vaccine composition and preparation and application thereof. This composition contains an antigen fusion protein which includes an influenza virus antigen and a Type IIb heat-labile enterotoxin A subunit from Escherichia coli. Immunization with this antigen fusion protein induces cellular and humoral immune responses, including systemic and mucosal immune responses, against a specific influenza virus in a subject, and therefore protects the subject from viral infection.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: May 19, 2020
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Suh-Chin Wu, Shi-Wei Lin, Neos Tang, Ting-Hsung Chen
  • Publication number: 20200130243
    Abstract: A composite plate structure includes a composite plate and a resin component. The composite plate includes a first fiber layer, a second fiber layer and a core layer. The second fiber layer has a first region, wherein an area of the second fiber layer is smaller than an area of the first fiber layer. The core layer is disposed between the first fiber layer and the second fiber layer, wherein the core layer is exposed at the first region. The resin component is connected to the composite plate, wherein the resin component is combined with the core layer at the first region. In addition, a manufacturing method of the composite plate is also provided.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Jung-Chin Wu, Po-An Lin, Sheng-Hung Lee, Han-Ching Huang, Kuo-Nan Ling
  • Publication number: 20200020693
    Abstract: A fabricating method of a stop layer includes providing a substrate. The substrate is divided into a memory region and a peripheral circuit region. Two conductive lines are disposed within the peripheral circuit region. Then, an atomic layer deposition is performed to form a silicon nitride layer to cover the conductive lines. Later, after forming the silicon nitride layer, a silicon carbon nitride layer is formed to cover the silicon nitride layer. The silicon carbon nitride layer serves as a stop layer.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 16, 2020
    Inventors: Chih-Chien Liu, Tzu-Chin Wu, Po-Chun Chen, Chia-Lung Chang
  • Publication number: 20190379867
    Abstract: The backlight module includes a bracket, a light emission module, a reflective film, and first glue structures. The bracket has a first plate and a second plate opposite to each other, and a third plate connecting the first plate to the second plate. The light emission module is disposed between the first plate and the second plate and includes light emission elements. The reflective film is disposed between the light emission elements and the first plate. The reflective film is mounted on the first plate of the bracket through the first adhesive structures. The first adhesive structures vertically project on the first plate at a plurality of first areas respectively, the light emission elements vertically project on the first plate at a plurality of second areas respectively, and the first areas do not overlap with the second areas.
    Type: Application
    Filed: May 31, 2019
    Publication date: December 12, 2019
    Inventors: Keng-Yi LEE, Yu-Chin WU