Abstract: A deflecting plate includes a silicon-on-insulator (SOI) substrate. The SOI substrate includes: an insulator layer having a top surface and a bottom surface; a device layer coupled to the insulator layer at the top surface, wherein multiple deflecting apertures are disposed in the device layer, each of which extending from a top open end to a bottom open end through the device layer, and wherein the bottom open end is coplanar with the top surface of the insulator layer; and a handle substrate coupled to the insulator layer at the bottom surface, wherein a cavity is disposed in the handle substrate and extends from a cavity open end to a cavity bottom wall, and wherein the bottom wall is coplanar with the top surface of the insulator layer, such that the bottom open end of each deflecting aperture is exposed to the cavity.

Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.

Abstract: A method including forming a III-V compound layer on a substrate and implanting a main dopant in the III-V compound layer to form source and drain regions. The method further includes implanting a group V species into the source and drain regions. A semiconductor device including a substrate and a III-V compound layer over the substrate. The semiconductor device further includes source and drain regions in the III-V layer, wherein the source and drain regions comprises a first dopants and a second dopant, and the second dopant comprises a group V material.

Abstract: A fabric feature predicting method includes following operations: measuring multiple first fabrics to generate multiple first fabric actual feature value groups; storing the first fabric actual feature value groups and multiple first fabric information groups of the first fabrics; selecting multiple third fabrics from the first fabrics according to a second fabric information group of a second fabric; generating at least one equation according to multiple third fabric actual feature value groups of the third fabrics and multiple third fabric information groups of the third fabrics; generating a second fabric predicted feature value group of the second fabric according to the at least one equation and the second fabric information group. The first fabric actual feature value groups include the third fabric actual feature value groups. The first fabric information groups include the third fabric information groups.

Abstract: Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output.

Abstract: A photoresist developer includes a solvent having Hansen solubility parameters of 15<?d<25, 10<?p<25, and 6<?p<30; an acid having an acid dissociation constant, pKa, of ?15<pKa<4, or a base having a pKa of 40>pKa>9.5; and a chelate.

Abstract: A photoresist composition includes a conjugated resist additive, a photoactive compound, and a polymer resin. The conjugated resist additive is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline. The polyacetylene, polythiophene, polyphenylenevinylene, polyfluorene, polypryrrole, the polyphenylene, and polyaniline includes a substituent selected from the group consisting of an alkyl group, an ether group, an ester group, an alkene group, an aromatic group, an anthracene group, an alcohol group, an amine group, a carboxylic acid group, and an amide group. Another photoresist composition includes a polymer resin having a conjugated moiety and a photoactive compound. The conjugated moiety is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline.

Abstract: A method for flattening a three-dimensional shoe upper template is provided. The method includes providing a three-dimensional last model, obtaining a three-dimensional grid model, obtaining a three-dimensional thickened grid model, obtaining a two-dimensional initial-value grid model, and obtaining a two-dimensional grid model with the smallest energy value. A system and a non-transitory computer-readable medium for performing the method are also provided. The method makes it possible to precisely flatten a three-dimensional last model with a non-developable surface and thereby convert the three-dimensional last model into a two-dimensional grid model.

Abstract: The present disclosure discloses a memory access interface device. A clock generation circuit generates reference signals. A transmitter transmits an output command and address signal to a memory device according to the reference signals. A signal training circuit executes a training process in a training mode that includes steps outlined below. A training signal is generated such that the training signal is transmitted as the output command and address signal. The training signal and the data signal generated by the memory device are compared to generate a comparison result indicating whether the data signal matches the training signal. The comparison result is stored. The clock generation circuit is controlled to modify a phase of at least one of the reference signals to be one of a plurality of under-test phases to execute a new loop of the training process until all the under-test phases are trained.

Abstract: The present disclosure discloses a memory access interface device. A clock generation circuit generates reference clock signals. Each of access signal transmission circuits each includes a duty cycle adjusting circuit, a duty cycle detection circuit, a frequency division circuit and an asynchronous first-in-first-out circuit. The duty cycle adjusting circuit performs duty cycle adjustment on one of the reference clock signals according to a duty cycle detection signal to generate an output clock signal having a duty cycle. The duty cycle detection circuit detects a variation of the duty cycle to generate the duty cycle detection signal. The frequency division circuit divides a frequency of the output clock signal to generate a read clock signal. The asynchronous first-in-first-out circuit receives an access signal from a memory access controller and outputs an output access signal according to the read clock signal to access the memory device accordingly.

Abstract: A photoresist composition includes a photoactive compound and a polymer. The polymer has a polymer backbone including one or more groups selected from: The polymer backbone includes at least one group selected from B, C-1, or C-2, wherein ALG is an acid labile group, and X is a linking group.

Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer including a photoresist composition over a substrate. The photoresist layer is selectively exposed to actinic radiation, the selectively exposed photoresist layer is developed to form a pattern in the photoresist layer. The photoresist composition includes a polymer including monomer units with photocleaving promoters, wherein the photocleaving promoters are one or more selected from the group consisting of living free radical polymerization chain transfer agents, electron withdrawing groups, bulky two dimensional (2-D) or three dimensional (3-D) organic groups, N-(acyloxy)phthalimides, and electron stimulated radical generators.

Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.

Abstract: A method of manufacturing a semiconductor device includes forming a first layer having an organic material over a substrate. A second layer is formed over the first layer, wherein the second layer includes a silicon-containing polymer having pendant acid groups or pendant photoacid generator groups. The forming a second layer includes: forming a layer of a composition including a silicon-based polymer and a material containing an acid group or photoacid generator group over the first layer, floating the material containing an acid group or photoacid generator group over the silicon-based polymer, and reacting the material containing an acid group or photoacid generator group with the silicon-based polymer to form an upper second layer including a silicon-based polymer having pendant acid groups or pendant photoacid generator groups overlying a lower second layer comprising the silicon-based polymer. A photosensitive layer is formed over the second layer, and the photosensitive layer is patterned.

Abstract: An animation generation method for tracking a facial expression and a neural network training method thereof are provided. The animation generation method for tracking a facial expression includes: driving a first role model according to an expression parameter set to obtain a virtual expression image corresponding to the expression parameter set; applying a plurality of real facial images to the virtual expression image corresponding to the facial expression respectively to generate a plurality of real expression images; training a tracking neural network according to the expression parameter set and the real expression images; inputting a target facial image to the trained tracking neural network to obtain a predicted expression parameter set; and using the predicted expression parameter set to control a second role model.

Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.

Abstract: The invention provides a method for improving sarcopenia of a subject in need thereof by using Phellinus linteus, in which the method includes administering an effective dose of composition to the subject, and the composition includes Phellinus linteus (NITE BP-03321 and BCRC 930210) as an effective substance. By using the aforementioned composition including an extract of a fermented product of the Phellinus linteus and/or its derivative, diameters of myotubes, amounts of muscles and muscle muscular endurance can be maintained, thereby improving sarcopenia.

Abstract: A method of forming a patterned photoresist layer includes the following operations: (i) forming a patterned photoresist on a substrate; (ii) forming a molding layer covering the patterned photoresist; (iii) reflowing the patterned photoresist in the molding layer; and (iv) removing the molding layer from the reflowed patterned photoresist. In some embodiments, the molding layer has a glass transition temperature that is greater than or equal to the glass transition temperature of the patterned photoresist. In yet some embodiments, the molding layer has a glass transition temperature that is 3° C.-30° C. less than the glass transition temperature of the patterned photoresist.

Abstract: A flexible tube includes a first connecting portion and a second connecting section. The second connecting section and the first connecting section are integrally connected to each other. The first connecting section has a first end surface, and the second connecting section has a second end surface, wherein there is an acute angle between the first end surface and the second end surface.