Patents by Inventor Ching Hsu

Ching Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126973
    Abstract: A method includes: identifying a first design rule check (DRC) violation in a cluster box on an integrated circuit layout; locating a first target cell at a first original location in the cluster box, the first target cell being connected to the first DRC violation; detecting a first plurality of candidate locations for the first target cell in the cluster box; calculating resource costs associated with the first plurality of candidate locations; determining a first relocation location, among the first plurality of candidate locations, associated with a minimum resource cost for the first target cell; and relocating the first target cell from the first original location to the first relocation location.
    Type: Application
    Filed: August 10, 2023
    Publication date: April 18, 2024
    Inventors: Ching Hsu, Heng-Yi Lin, Yi-Lin Chuang
  • Patent number: 11963385
    Abstract: The disclosure provides a local stretch packaging structure, including a substrate, a flexible electronic element, a plurality of light-emitting display elements, and a packaging layer. The flexible electronic element is disposed on the substrate. These light-emitting display elements are disposed on the flexible electronic element. The packaging layer includes a packaging area and a non-packaging area. The packaging area covers the upper surface and sidewalls of these light-emitting display elements. The non-packaging area is directly covered the flexible electronic element that is not disposed with these light-emitting display elements.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: April 16, 2024
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Wen-You Lai, Ping-Hsiang Kao, Po-Lun Chen, Chun-Ta Chen, Po-Ching Lin, Ya-Chu Hsu
  • Publication number: 20240117172
    Abstract: A composition and a manufacturing method of a highly flame-retardant and low-smoke injection-molded polyvinyl chloride pipe are provided. The composition includes a polyvinyl chloride resin material, a chlorinated polyvinyl chloride resin material, a flame retardant additive and a carbon forming additive. A first number-average degree of polymerization (DPn) of the polyvinyl chloride resin material is between 600 and 1,000. A second number-average degree of polymerization of the chlorinated polyvinyl chloride resin material is between 600 and 800. A difference between the first number-average degree of polymerization and the second number-average degree of polymerization is within 400. The flame retardant additive is a phosphorus-containing flame retardant modified by a modifier. A total added amount of the flame retardant additive and the carbon forming additive in the composition is not greater than 3 PHR.
    Type: Application
    Filed: November 29, 2022
    Publication date: April 11, 2024
    Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHUN-LAI CHEN, WEN-YI WU
  • Publication number: 20240117174
    Abstract: A PVC resin composition and a method for manufacturing a pipe having high heat resistance and transparency are provided. The PVC resin composition includes 100 phr of a PVC resin, 0.5 phr to 5 phr of a modifier, and 1 phr to 10 phr of a heat resistance improving agent. A degree of polymerization of the PVC resin is from 800 to 1,350. The modifier is a polymer containing a first monomer and a second monomer. The first monomer is ethylene or a derivative of the ethylene, and the second monomer is a polyester.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 11, 2024
    Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHUN-LAI CHEN, WEN-YI WU
  • Publication number: 20240120277
    Abstract: A chip structure is provided. The chip structure includes a substrate, a redistribution layer over the substrate, a bonding pad over the redistribution layer, a shielding pad over the redistribution layer and surrounding the bonding pad, an insulating layer over the redistribution layer and the shielding pad, and a bump over the bonding pad and the insulating layer. The insulating layer includes a first part and a second part surrounded by the first part, the first part has first thickness, the second part has a second thickness, and the first thickness and the second thickness are different.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Hong-Seng SHUE, Sheng-Han TSAI, Kuo-Chin CHANG, Mirng-Ji LII, Kuo-Ching HSU
  • Publication number: 20240117155
    Abstract: A manufacturing method of a heat-resistant tableware and a molded article of the heat-resistant tableware are provided. The manufacturing method of the heat-resistant tableware includes: providing a polyester composite material that includes 50 wt % to 85 wt % of polyethylene terephthalate, 0 wt % to 5 wt % of an organic nucleating agent, and 10 wt % to 30 wt % of an inorganic nucleating agent; and injecting the polyester composite material into a mold in an injection molding process, in which a mold temperature of the mold is controlled to be not less than 110° C., and a crystallinity of the polyester composite material in the mold is controlled to be between 20% and 30%, so that the polyester composite material is formed into the molded article of the heat-resistant tableware in the mold, and the molded article has a heat distortion temperature of not less than 150° C.
    Type: Application
    Filed: November 29, 2022
    Publication date: April 11, 2024
    Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHUN-LAI CHEN
  • Publication number: 20240117173
    Abstract: A composition and a manufacturing method of a highly flame-retardant and low-smoke extruded polyvinyl chloride pipe are provided. The composition includes a polyvinyl chloride resin material, a flame retardant additive and a carbon forming additive. The polyvinyl chloride resin material is in an amount between 10 PHR (parts per hundred resin) and 90 PHR. The flame retardant additive is in an amount between 0.5 PHR and 2.0 PHR, and is a phosphorus-containing flame retardant modified by a modifier. The carbon forming additive is in an amount between 0.2 PHR and 1.0 PHR. The carbon forming additive is at least one material selected from a group consisting of zinc chloride, zinc stearate, calcium stearate, zinc hydroxystannate, anhydrous zinc stannate, zinc phosphate and zirconium phosphate. A total added amount of the flame retardant additive and the carbon forming additive in the composition is not greater than 3 PHR.
    Type: Application
    Filed: November 29, 2022
    Publication date: April 11, 2024
    Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHUN-LAI CHEN, WEN-YI WU
  • Publication number: 20240117176
    Abstract: A chlorinated polyvinyl chloride resin composition, an extruded sheet and a method for manufacturing the same are provided. The chlorinated polyvinyl chloride resin composition includes a chlorinated polyvinyl chloride resin and a plasticizing processing aid. The chlorinated polyvinyl chloride resin has an amount of 80 parts by weight to 120 parts by weight, a degree of polymerization of from 500 to 1,100, and a chlorine content of from 60% to 75%. The plasticizing processing aid includes a vinyl chloride graft copolymer and an acrylic compound. A grafted functional group of the vinyl chloride graft copolymer is at least one of polyol ester and ethylene vinyl acetate.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 11, 2024
    Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHUN-LAI CHEN, WEN-YI WU
  • Patent number: 11955707
    Abstract: An antenna module includes first to third radiators and a ground radiator. The first radiator includes first and second sections and excites at a first frequency band. An extension direction of the first section, including a feeding end, is not parallel to an extension direction of the second section. The second radiator includes third and fourth sections. The third section extends from an intersection of the first and second sections. The third section excites at a second frequency band. The third radiator is disposed beside the first radiator and away from the second radiator. The ground radiator is disposed on one side of the first, second, and third radiators, and includes a ground end. The fourth section of the second radiator is connected to the third section and the ground radiator. The third radiator is connected to the ground end.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chao-Hsu Wu, Hau Yuen Tan, Chien-Yi Wu, Shih-Keng Huang, Cheng-Hsiung Wu, Ching-Hsiang Ko
  • Patent number: 11956966
    Abstract: A silicon-oxide-nitride-oxide-silicon (SONOS) memory cell includes a memory gate, a dielectric layer, two charge trapping layers and two selective gates. The memory gate is disposed on a substrate. The two charge trapping layers are at two ends of the dielectric layer, and the charge trapping layers and the dielectric layer are sandwiched by the substrate and the memory gate. The two selective gates are disposed at two opposite sides of the memory gate, thereby constituting a two bit memory cell. The present invention also provides a method of forming said silicon-oxide-nitride-oxide-silicon (SONOS) memory cell.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Chia-Ching Hsu
  • Publication number: 20240113112
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
  • Patent number: 11949337
    Abstract: A flyback power converter includes a controller, a high-end driving circuit, an active clamp switch, a main switch and a zero current detection circuit. The high-end driving circuit is coupled to the controller. The active clamp switch is coupled to the high-end driving circuit for driving the active clamp switch. The main switch is coupled to the controller. The zero current detection circuit is coupled to the controller. The main switch and the active clamp switch are arranged on the primary side of a transformer. The switching period of a gate of the active clamp switch and the switching period of a gate of the main switch are controlled in reverse phase to achieve zero voltage or zero current conversion.
    Type: Grant
    Filed: January 9, 2022
    Date of Patent: April 2, 2024
    Assignee: PHIHONG TECHNOLOGY CO., LTD.
    Inventor: Ta-Ching Hsu
  • Publication number: 20240101801
    Abstract: A fiber composite material is provided. The fiber composite material includes 40 phr to 65 phr of a polypropylene resin, 30 phr to 60 phr of a long glass fiber, 0.5 phr to 5 phr of a black masterbatch, and 0.5 phr to 10 phr of a compatibilizer. The black masterbatch contains carbon black having a basic active group on a surface of the carbon black. The compatibilizer is grafted with maleic anhydride.
    Type: Application
    Filed: November 29, 2022
    Publication date: March 28, 2024
    Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHUN-LAI CHEN
  • Patent number: 11943889
    Abstract: A server case includes a case, a drawer body, and a adjustable device. The drawer body is received in the case. The adjustable device includes a first end, a second end, and a adjustable structure. The second end is connected to the drawer body, the adjustable structure is connected to the first end and the second end, and a distance between the first end and the second end is changeable. The drawer body received in the case is moved until at least a part of the drawer body is located outside the case, to change the distance between the first end and the second end.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: March 26, 2024
    Assignee: WIWYNN CORPORATION
    Inventor: Shu-Ching Hsu
  • Publication number: 20240096778
    Abstract: A semiconductor die package is provided. The semiconductor die package includes a semiconductor die and a package substrate supporting and electrically connected to the semiconductor die. The semiconductor die has a corner. The package substrate includes several conductive lines, and one of the conductive lines under the corner of the semiconductor die includes a first line segment and a second line segment connected to the first line segment. The first line segment is linear and extends in a first direction. The second line segment is non-linear and has a varying extension direction.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 21, 2024
    Inventors: Ya-Huei LEE, Shu-Shen YEH, Kuo-Ching HSU, Shyue-Ter LEU, Po-Yao LIN, Shin-Puu JENG
  • Patent number: 11929730
    Abstract: An acoustic wave element includes: a substrate; a bonding structure on the substrate; a support layer on the bonding structure; a first electrode including a lower surface on the support layer; a cavity positioned between the support layer and the first electrode and exposing a lower surface of the first electrode; a piezoelectric layer on the first electrode; and a second electrode on the piezoelectric layer, wherein at least one of the first electrode and the second electrode includes a first layer and a second layer that the first layer has a first acoustic impedance and a first electrical impedance, the second layer has a second acoustic impedance and a second electrical impedance, wherein the first acoustic impedance is higher than the second acoustic impedance, and the second electrical impedance is lower than the first electrical impedance.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: March 12, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Ta-Cheng Hsu, Wei-Shou Chen, Chun-Yi Lin, Chung-Jen Chung, Wei-Tsuen Ye, Wei-Ching Guo
  • Patent number: 11928415
    Abstract: A method includes: training a machine learning model with a plurality of electronic circuit placement layouts; predicting, by the machine learning model, fix rates of design rule check (DRC) violations of a new electronic circuit placement layout; identifying hard-to-fix (HTF) DRC violations among the DRC violations based on the fix rates of the DRC violations of the new electronic circuit placement layout; and fixing, by an engineering change order (ECO) tool, the DRC violations.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching Hsu, Shih-Yao Lin, Yi-Lin Chuang
  • Publication number: 20240080180
    Abstract: The federated learning system includes a moderator and client devices. Each client device performs a method for verifying model update as follows: receiving a hash function and a general model; training a client model according to the general model and raw data; calculating a difference as an update parameter between the general model and the client model, sending the update parameter to the moderator; inputting the update parameter to the hash function to generate a hash value; sending the hash value to other client devices, and receiving other hash values; summing all the hash values to generate a trust value; receiving an aggregation parameter calculated according to the update parameters; inputting the aggregation parameter to the hash function to generate a to-be-verified value; and updating the client model according to the aggregation parameter when the to-be-verified value equals the trust value.
    Type: Application
    Filed: December 20, 2022
    Publication date: March 7, 2024
    Inventors: Chih-Fan HSU, Wei-Chao CHEN, Jing-Lun Huang, Ming-Ching Chang, Feng-Hao Liu
  • Patent number: D1018907
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: March 19, 2024
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Yun-Chien Lee, Yi-Ching Hsu, Pei-Yi Lin, Yu-Hung Su, Sheng-Yuan Huang, Chun-Fu Lin
  • Patent number: D1019337
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: March 26, 2024
    Assignee: Wiwynn Corporation
    Inventors: Shu-Ching Hsu, Ming-Chih Kao