Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a first movable portion, a fixed portion, a first driving assembly, and a plurality of second guiding members. The first movable portion is configured to connect an optical member. The optical member is used for adjusting a direction of a light from an incident direction to an outgoing direction. The first movable portion can move relative to the fixed portion. The first driving assembly is configured to drive the first movable portion to move relative to the fixed portion. The second guiding members include a first ball, a second ball, and a third ball. The first ball, the second ball, and the third ball are disposed in a plane that is perpendicular to the incident direction.

Abstract: A thermoplastic polyurethane resin suitable for a laminating process and a method for producing the same are provided. The thermoplastic polyurethane resin is formed of an isocyanate component, a polyol component, a chain extender component, and a chain terminator component that is a monohydric alcohol via a polymerization reaction. The polyol component includes a first polyol having a number average molecular weight between 600 and 2,000 g/mol and a second polyol having a number average molecular weight between 1,500 and 3,000 g/mol. The chain extender component includes a first chain extender and a second chain extender. The first chain extender is a dihydric alcohol having a carbon chain length of C2-6, and a molecular structure thereof is linear and symmetrical. The second chain extender is a dihydric alcohol having a carbon chain length of C3-10, and a molecular structure thereof has a side chain and/or an ether group.

Abstract: A high-speed connector includes an insulating housing, a first terminal assembly received in the insulating housing, a second terminal assembly received in the insulating housing, a third terminal assembly received in the insulating housing, and a fourth terminal assembly received in the insulating housing. The second terminal assembly is opposite to the first terminal assembly along an up-down direction. The third terminal assembly is disposed between the first terminal assembly and the second terminal assembly. The fourth terminal assembly is corresponding to the third terminal assembly. The fourth terminal assembly is disposed between the second terminal assembly and the third terminal assembly.

Abstract: A polyurethane hot melt adhesive is provided. The polyurethane hot melt adhesive is formed by reacting an isocyanate component, a polyol component, and a chain extender component. The polyol component includes a first polyol and a second polyol, a number-average molecular weight of the first polyol is within a range from 650 to 1,500, and a number-average molecular weight of the second polyol is within a range from 1,500 to 3,000. The chain extender component includes a first chain extender and a second chain extender, and the second chain extender is a diyol having an ether group or a hydrocarbyl. A ratio between a weight percentage of the first chain extender and a weight percentage of the second chain extender is within a range from 9:1 to 4:1. A forming temperature of the polyurethane hot melt adhesive is within a range from 100° C. to 150° C.

Abstract: A thermoplastic polyurethane resin suitable for melt spinning is formed from a reaction mixture via a polymerization reaction. The reaction mixture includes an isocyanate component and a polyol component. The polyol component includes a first polyol that has a first number average molecular weight and a second polyol that has a second number average molecular weight. The first number average molecular weight is between 1,000 g/mol and 1,500 g/mol, and the second number average molecular weight is between 2,500 g/mol and 3,000 g/mol. One resin component formed by the first polyol via the polymerization reaction is defined as a low melting point segment and correspondingly has a first melting point between 170° C. and 185° C. Another resin component formed by the second polyol via the polymerization reaction is defined as a high melting point segment and correspondingly has a second melting point between 195° C. and 210° C.

Abstract: An apparatus for countercurrent exchange, including: a conduit, including: a side wall; an inner space; an air outlet disposed on a first end of the conduit; a liquid miniaturization device disposed in the inner space of the conduit near the air outlet, wherein the liquid miniaturization device is used to spray a liquid in a liquid direction; an air intake disposed on the side wall near a second end of the conduit; and a reservoir portion disposed in the inner space near the second end of the conduit for storing the liquid; a pneumatic conveyor connected with the air intake for introducing air into the conduit along an air flow direction; and a pumping device connected with the reservoir portion by a first tube, wherein the liquid direction is opposite to the air flow direction in the conduit.

Abstract: A silicon-oxide-nitride-oxide-silicon (SONOS) memory cell includes a memory gate, a dielectric layer, two charge trapping layers and two selective gates. The memory gate is disposed on a substrate. The two charge trapping layers are at two ends of the dielectric layer, and the charge trapping layers and the dielectric layer are sandwiched by the substrate and the memory gate. The two selective gates are disposed at two opposite sides of the memory gate, thereby constituting a two bit memory cell. The present invention also provides a method of forming said silicon-oxide-nitride-oxide-silicon (SONOS) memory cell.

Abstract: A flyback power converter includes a controller, a high-end driving circuit, an active clamp switch, a main switch and a zero current detection circuit. The high-end driving circuit is coupled to the controller. The active clamp switch is coupled to the high-end driving circuit for driving the active clamp switch. The main switch is coupled to the controller. The zero current detection circuit is coupled to the controller. The main switch and the active clamp switch are arranged on the primary side of a transformer. The switching period of a gate of the active clamp switch and the switching period of a gate of the main switch are controlled in reverse phase to achieve zero voltage or zero current conversion.

Abstract: High resolution displays, such as OLED displays, utilize complex driving circuits that can suffer from crosstalk. The crosstalk can affect the brightness of pixels in a row the display, which can be observed by a viewer as a crosstalk artifact. The severity of a crosstalk artifact may correspond to a contrast ratio of a high-contrast transition in which vertically adjacent pixels are sequentially driven by different driving signals during a scan. When a contrast ratio is above a maximum-perceptible contrast ratio, reducing the contrast ratio to the maximum-perceptible contrast ratio and can reduce, or eliminate, crosstalk artifacts. Disclosed herein are methods and devices that adjust pixels to reduce a crosstalk artifact without having a noticeable effect on contrast.

Abstract: Embodiments provide a package substrate. The package substrate includes a substrate having a cavity hole therein, and a semiconductor device in the cavity hole. The semiconductor device has first terminal side and a second terminal side opposite to the first terminal side. The package substrate further includes a first redistribution structure on the first terminal side of the cavity substrate to electrically couple to a first pad and a second pad on the first terminal side of the semiconductor device; and a second redistribution structure on the second side of the cavity substrate to electrically couple to a third pad and fourth pad on the second terminal side of the semiconductor device.

Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a movable portion and a fixed portion. The movable portion includes a holder for holding an optical member with an optical axis. The movable portion is movable relative to the fixed portion. The fixed portion has a housing and a base. The housing is disposed on the base, and includes a top surface and a side surface. The top surface extends in a direction that is parallel to the optical axis. The side surface extends from an edge of the top surface in a direction that is not parallel to the optical axis. The side surface has a rectangular opening.

Abstract: Provided is a method of SiC wafer processing, and the method includes the following steps. A SiC wafer is provided, and the SiC wafer has a first surface and an opposing second surface. A fine grinding process is performed on the first surface and the second surface of the SiC wafer. A dry etching process is performed on the first surface and the second surface of the SiC wafer to make the roughness of the first surface and the second surface 2.5 nm or less. After the dry etching process, a polishing process is performed on the first surface and the second surface of the SiC wafer.

Abstract: A high-speed connector includes an insulating housing, and a first terminal assembly mounted in the insulating housing. The first terminal assembly includes a plurality of first terminals including a plurality of first grounding terminals, a first base body, and a first shielding plate disposed under the first base body. The plurality of the first terminals are fastened to the first base body. The first shielding plate has a first base plate, a first metal layer and a plurality of first ribs. Several portions of a top surface of the first base plate extend upward to form the plurality of the first ribs. The first metal layer is a pattern with a plurality of pores. Several of the first grounding terminals contact with the first metal layer which is attached to top surfaces of the plurality of the first ribs to form a grounding structure.

Abstract: A method includes: training a machine learning model with a plurality of electronic circuit placement layouts; predicting, by the machine learning model, fix rates of design rule check (DRC) violations of a new electronic circuit placement layout; identifying hard-to-fix (HTF) DRC violations among the DRC violations based on the fix rates of the DRC violations of the new electronic circuit placement layout; and fixing, by an engineering change order (ECO) tool, the DRC violations.

Abstract: A semiconductor die package is provided. The semiconductor die package includes a semiconductor die and a package substrate disposed below the semiconductor die. The semiconductor die has a corner. The package substrate includes several conductive lines, and one of the conductive lines under the corner of the semiconductor die includes a first line segment and a second line segment. The first and second line segments are connected together, and the second line segment has a smaller line width than the first line segment. The first line segment is linear and extends in a first direction. The second line segment is non-linear and has a varying extension direction.

Abstract: An epitaxy substrate and a method of manufacturing the same are provided. The epitaxy substrate includes a silicon substrate and a silicon carbide layer. The silicon substrate has a first surface and a second surface opposite to each other, and the first surface is an epitaxy surface. The silicon carbide layer is located in the silicon substrate, and a distance between the silicon carbide layer and the first surface is between 100 angstroms (?) and 500 angstroms.

Abstract: A method of forming a semiconductor structure is provided. A layout of a substrate is provided. The layout includes a surface having an inner region and an outer region surrounding the inner region. An under bump metallurgy (UBM) pad region within the outer region is defined. The UBM pad region is partitioned into a first zone and a second zone, wherein the first zone faces towards a center of the substrate, and the second zone faces away from the center of the substrate. The substrate is provided according to the layout, wherein the providing of the substrate includes forming a conductive via in the substrate. The conductive via is disposed outside the second zone and at least partially overlaps the first zone from a top view perspective. A UBM pad is formed over the conductive via and within the UBM pad region.

Abstract: A method includes forming a reconstructed package substrate, which includes placing a plurality of substrate blocks over a carrier, encapsulating the plurality of substrate blocks in an encapsulant, planarizing the encapsulant and the plurality of substrate blocks to reveal redistribution lines in the plurality of substrate blocks, and forming a redistribution structure overlapping both of the plurality of substrate blocks and encapsulant. A package component is bonded over the reconstructed package substrate.

Abstract: An electrical connector for mounting on an external circuit board includes: an insulating body; a terminal module assembled on the insulating body and including a plurality of mating terminals, an insulating carrier with an accommodating cavity, plural intermediate terminals fixed on one side of the insulating carrier and electrically connected to the mating terminals, plural pin terminals fixed on the other side of the insulating carrier, and a magnetic module accommodated in the accommodating cavity and electrically connected to the intermediate terminals and the pin terminals, wherein the insulating carrier is a two-piece housing, the intermediate terminals are held in one housing piece, and the pin terminals are held in the other housing piece.

Abstract: A data access system includes a flash memory, a first inversion circuit, a block buffer memory, an error checking and correcting circuit, a second inversion circuit, and an application circuit. The first inversion circuit inverts a plurality of pieces of data stored in a block of the flash memory to generate a plurality of pieces of inverted data. The block buffer memory stores the plurality of pieces of inverted data. When the ECC circuit determines that the plurality of pieces of inverted data are correctable, the ECC circuit corrects at least one piece of inverted data stored in the block buffer memory. The second inversion circuit inverts the plurality of pieces of inverted data stored in the block buffer memory to generate a plurality of pieces of recovered data. The application circuit receives the plurality of pieces of recovered data and performs a corresponding operation accordingly.