Abstract: Systems and techniques are provided for voice calling with a connected device that does not include a SIM card or telephone port. Outgoing audio data may be received at an embedded browser running on a connected device, may be sent using Web Real Time Communications (WebRTC) from the embedded browser to an integration layer panning within the embedded browser, and may be sent from the integration layer to a border controller for a voice call carrier over a Session Initiation Protocol (SIP) connection according to Secure Real Time Transport Protocol (SRTP). Incoming audio data may be received at the integration layer from the border controller for the voice call carrier over the SIP connection according to SRTP, may be sent using WebRTC from the integration layer to the embedded browser, and may be sent from the embedded browser to an audio output of the connected device which may output audio.

Abstract: A display device includes a first substrate, a first active element layer, first to third light-emitting elements, a first pixel defining layer, and fourth to sixth light-emitting elements. The first active element layer is disposed on the first substrate. The first, second and third light-emitting elements are electrically connected with the first active element layer. The first, second and third light-emitting elements have first, second and third light-emitting layers respectively. The first pixel defining layer is disposed on the first active element layer and has first, second and third openings. The first, second and third light-emitting layers are disposed in the first, second and third openings respectively. The fourth, fifth and sixth light-emitting elements are disposed on the first pixel defining layer. A vertical distance between the first light-emitting element and the fourth light-emitting element is greater than 0 micrometers and less than or equal to 5 micrometers.

Abstract: A semiconductor package has a plurality of pillars or portions of a plurality of lead strips, a plurality of semiconductor devices, one or two molding encapsulations and a plurality of electrical interconnections. The semiconductor package excludes a wire. The semiconductor package excludes a clip. A method is applied to fabricate semiconductor packages. The method includes providing a removable carrier; forming a plurality of pillars or a plurality of lead strips; attaching a plurality of semiconductor devices; forming one or two molding encapsulations; forming a plurality of electrical interconnections and removing the removable carrier. The method may further include a singulation process.

Abstract: A method of manufacturing a semiconductor structure is provided. The method includes providing a first substrate including a plurality of conductive bumps disposed over the first substrate; providing a second substrate; disposing a patterned adhesive over the first substrate, wherein at least a portion of the plurality of conductive bumps is exposed through the patterned adhesive; bonding the first substrate with the second substrate; and singulating a chip from the first substrate.

Abstract: A method of training an object recognition model includes obtaining a sample set. The sample set is divided into a training set and a verification set. The object recognition model is obtained by training a neural network using the training set, and the object recognition model is verified using the verification set.

Abstract: An interconnected base plate comprises a metal layer, a plurality of metal pads, and a molding encapsulation. The mold compound layer encloses a majority portion of the plurality of metal pads 240. A respective top surface of each of the plurality of metal pads is exposed from a top surface of the molding encapsulation. The respective top surface of said each of the first plurality of metal pads and the top surface of the mold compound layer are co-planar. A power module comprises the interconnected base plate, a plurality of chips, a plurality of bonding wires, a plurality of terminals, a plastic case, and a module-level molding encapsulation. A method, for fabricating an interconnected base plate, comprises the steps of forming a plurality of metal pads; loading a metal layer; forming a molding encapsulation; and applying a singulation process.

Abstract: A human-computer interaction method applied to a vehicle-mounted device is provided. The method includes obtaining video data of a scene inside a vehicle which is captured by a camera in real time. An action of a passenger in each of a plurality of seating positions in the vehicle is detected from the video data. Once a specified action is detected, a corresponding control operation is executed based on the specified action and the seating position of the passenger who performs the specified action.

Abstract: A training data generation method for human facial recognition and a data generation apparatus are provided. A large amount of virtual synthesized models are generated based on a face deformation model, where changes are made to face shapes, expressions, and/or angles to increase diversity of the training data. Experimental results show that the aforementioned training data may improve the accuracy of human face recognition.

Abstract: A driving warning method applied to a vehicle-mounted device is provided. The method includes detecting a moving object and a moving direction of the moving object by using at least one external sensor when a vehicle is moving. A driving behavior of a driver of the vehicle is monitored by using at least one internal sensor when the moving object and the moving direction of the moving object are detected. Once the moving direction of the moving object is not parallel to a moving direction of the vehicle and a sight direction of the driver does not cross the moving direction of the moving object, a first warning is transmitted.

Abstract: Provided herein are method of prediction of potential health risk, and particularly to a method for training artificial neural networks using biological analysis data. The method of present disclosure is characterized in the combined use of biological analysis and deep learning; in which the specific clinical data relating to the characteristic gene expression is used to train the artificial neural network to improve the accuracy of the prediction power of the artificial neural network.

Abstract: A device and a method for generating a machine translation model and a machine translation device are disclosed. The device inputs a source training sentence of a source language and a dictionary data to a generator network so that the generator network outputs a target training sentence of a target language according to the source training sentence and the dictionary data. Then, the device inputs the target training sentence and a correct translation of the source training sentence to a discriminator network so as to calculate an error between the target training sentence and the correct translation according to the output of the discriminator network, and trains the generator network and the discriminator network respectively. The trained generator network is the machine translation model.

Abstract: The present disclosure provides a display device. The display device includes a substrate, a pixel array, a circuit bridge structure, a first trace region, a second trace region, and a display film layer. The pixel array is located on the substrate. The circuit bridge structure is located at one side of the pixel array. The first trace region is located between the pixel array and a first side of the circuit bridge structure. The second trace region is located at a second side opposite to the first side. The display film layer is located on the pixel array, and an orthogonal projection of the display film layer on the substrate is spaced apart from an orthogonal projection of the circuit bridge structure on the substrate.

Abstract: A source separation method, an apparatus, and a non-transitory computer-readable medium are provided. Atrous Spatial Pyramid Pooling (ASPP) is used to reduce the number of parameters of a model and speed up computation. Conventional upsampling is replaced with a conversion between time and depth, and a receptive field preserving decoder is provided. In addition, temporal attention with dynamic convolution kernel is added, to further achieve lightweight and improve the effect of separation.

Abstract: A semiconductor package comprises a semiconductor substrate, a first metal layer, an adhesive layer, a second metal layer, a rigid supporting layer, and a plurality of contact pads. A thickness of the semiconductor substrate is equal to or less than 50 microns. A thickness of the rigid supporting layer is larger than the thickness of the semiconductor substrate. A thickness of the second metal layer is larger than a thickness of the first metal layer. A method comprises the steps of providing a device wafer; providing a supporting wafer; attaching the supporting wafer to the device wafer via an adhesive layer; and applying a singulation process so as to form a plurality of semiconductor packages.

Abstract: A semiconductor package comprises a land grid array substrate, a first VDMOSFET, a second VDMOSFET, and a molding encapsulation. The land grid array substrate comprises a first metal layer, a second metal layer, a third metal layer, a plurality of vias, and a resin. A series of drain pads at a bottom surface of the semiconductor package follow a “drain 1, drain 2, drain 1, and drain 2” pattern. A method for fabricating a semiconductor package. The method comprises the steps of providing a land grid array substrate; mounting a first VDMOSFET and a second VDMOSFET on the land grid array substrate; applying a wire bonding process; forming a molding encapsulation; and applying a singulation process.

Abstract: A semiconductor wafer is singulated to form a plurality of semiconductor packages. The semiconductor wafer has a semiconductor substrate, a metal layer, an adhesive layer, a rigid supporting layer, a passivation layer and a plurality of contact pads. A semiconductor package has a semiconductor substrate, a metal layer, an adhesive layer, a rigid supporting layer, a passivation layer and a plurality of contact pads. A thickness of the rigid supporting layer is larger than a thickness of the semiconductor substrate. A thickness of the metal layer is thinner than the thickness of the semiconductor substrate. An entirety of the rigid supporting layer may be made of a single crystal silicon material or a poly-crystal silicon material. The single crystal silicon material or the poly-crystal silicon material may be fabricated from a reclaimed silicon wafer. An advantage of using a reclaimed silicon wafer is for a cost reduction.

Abstract: Provided is a method of inhibiting tumor progression in a subject suffering from gastric cancer, including administering to said subject a pharmaceutical composition including an inhibitor of targeting PHF8-c-Jun-PKC?-Src-PTEN axis, or a pharmaceutically acceptable salt thereof. A method of determining a tumor progression state in a subject suffering from gastric cancer is also provided, which comprises providing a sample from the subject; detecting PHF8 expression level in the sample from the subject; and determining the tumor progression state of gastric cancer by the PHF8 expression level, wherein the PHF8 expression level is positively detected from moderate to strong expression indicating the subject suffering a late stage of gastric cancer.

Abstract: Provided is a protective structure including an auxiliary layer and a hard coating layer. The auxiliary layer has a first surface and a second surface opposite to the first surface. The hard coating layer is located on the second surface of the auxiliary layer. The Young's modulus of the auxiliary layer is gradually increased from the second surface to the first surface. An electronic device with the same is also provided.

Abstract: A power semiconductor package includes a lead frame, a low side field-effect transistor (FET), a high side FET, a first metal clip, a second metal clip, an inductor assembly, and a molding encapsulation. The low side FET is flipped and is attached to a first die paddle of the lead frame. A method for fabricating a power semiconductor package. The method comprises the steps of providing a lead frame; attaching a low side FET and a high side FET to the lead frame; mounting a first metal clip and a second metal clip; mounting an inductor; forming a molding encapsulation; and applying a singulation process.

Abstract: A semiconductor package comprises a land grid array substrate, a first VDMOSFET, a second VDMOSFET, and a molding encapsulation. The land grid array substrate comprises a first metal layer, a second metal layer, a third metal layer, a plurality of vias, and a resin. A series of drain pads at a bottom surface of the semiconductor package follow a “drain 1, drain 2, drain 1, and drain 2” pattern. A method for fabricating a semiconductor package. The method comprises the steps of providing a land grid array substrate; mounting a first VDMOSFET and a second VDMOSFET on the land grid array substrate; applying a wire bonding process; forming a molding encapsulation; and applying a singulation process.