Patents by Inventor Ching Wang

Ching Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11626400
    Abstract: A semiconductor device structure includes a dielectric layer, a first source/drain feature in contact with the dielectric layer, wherein the first source/drain feature comprises a first sidewall, and a second source/drain feature in contact with the dielectric layer and adjacent to the first source/drain feature, wherein the second source/drain feature comprises a second sidewall. The structure also includes an insulating layer disposed over the dielectric layer and between the first sidewall and the second sidewall, wherein the insulating layer comprises a first surface facing the first sidewall, a second surface facing the second sidewall, a third surface connecting the first surface and the second surface, and a fourth surface opposite the third surface. The structure includes a sealing material disposed between the first sidewall and the first surface, wherein the sealing material, the first sidewall, the first surface, and the dielectric layer are exposed to an air gap.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Ching Wang, Wen-Yuan Chen, Chun Chung Su, Jon-Hsu Ho, Wen-Hsing Hsieh, Kuan-Lun Cheng, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 11627171
    Abstract: Systems and techniques are provided for voice calling with a connected device that does not include a SIM card or telephone port. Outgoing audio data may be received at an embedded browser running on a connected device, may be sent using Web Real Time Communications (WebRTC) from the embedded browser to an integration layer running within the embedded browser, and may be sent from the integration layer to a border controller for a voice call carrier over a Session Initiation Protocol (SIP) connection according to Secure Real Time Transport Protocol (SRTP). Incoming audio data may be received at the integration layer from the border controller for the voice call carrier over the SIP connection according to SRTP, may be sent using WebRTC from the integration layer to the embedded browser, and may be sent from the embedded browser to an audio output of the connected device which may output audio.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: April 11, 2023
    Assignee: Google LLC
    Inventors: Jeffrey Ching Wang, Chien-Jung Kung, Madhusudhan R. Adupala
  • Patent number: 11616151
    Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary device includes a channel layer, a first source/drain feature, a second source/drain feature, and a metal gate. The channel layer has a first horizontal segment, a second horizontal segment, and a vertical segment connects the first horizontal segment and the second horizontal segment. The first horizontal segment and the second horizontal segment extend along a first direction, and the vertical segment extends along a second direction. The vertical segment has a width along the first direction and a thickness along the second direction, and the thickness is greater than the width. The channel layer extends between the first source/drain feature and the second source/drain feature along a third direction. The metal gate wraps channel layer. In some embodiments, the first horizontal segment and the second horizontal segment are nanosheets.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: March 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chih-Ching Wang, Jon-Hsu Ho, Wen-Hsing Hsieh, Kuan-Lun Cheng, Zhiqiang Wu
  • Patent number: 11615725
    Abstract: A display panel including horizontal signal lines, vertical signal lines intersecting the horizontal signal lines, first transmission lines and second transmission lines is provided. The horizontal signal lines are divided into a first horizontal signal line group and an adjacent second horizontal signal line group. Each of the first and second horizontal signal line groups includes N horizontal lines, wherein N is a positive integer. The first transmission lines are positioned at a first side of the vertical signal lines and respectively connected to the N horizontal signal lines in the first horizontal signal line group in a first tendency. The second transmission lines are positioned at a second, opposite side of the vertical signal lines and respectively connected to the N horizontal signal lines in the second horizontal signal line group in a second tendency. The first tendency is opposite to the second tendency.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: March 28, 2023
    Assignee: E Ink Holdings Inc.
    Inventors: Chia-Chi Chang, Chih-Chun Chen, Chi-Ming Wu, Yi-Ching Wang, Jia-Hung Chen, Wei-Yueh Ku
  • Patent number: 11605210
    Abstract: A method for recognition of characters by optical means in an unclear or non-optimal image of an object document, the image carrying shadows or other impediments inputs the document into a shadow prediction model to obtain a shadow mask. A determination is made as to whether the shadow mask of the document affect an optical character recognition (OCR) performance. The method further inputs the document into a shadow removing model for removal of shadows to obtain an intermediate document if the shadow mask are deemed to affect the OCR performance, then OCR can then be performed on the final object document.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: March 14, 2023
    Assignee: Mobile Drive Netherlands B.V.
    Inventors: Yun-Hsuan Lin, Yung-Yu Chuang, Tzu-Kuei Huang, Ting-Hao Chung, Nai-Sheng Syu, Yu-Ching Wang, Chun-Hsiang Huang
  • Patent number: 11600699
    Abstract: A semiconductor device structure, along with methods of forming such, are described. In one embodiment, a semiconductor device structure is provided. The semiconductor device structure a first source/drain region, a second source/drain region, and a gate stack disposed between the first source/drain region and the second source/drain region. The semiconductor device structure also includes a conductive feature disposed below the first source/drain region. The semiconductor device structure also includes a power rail disposed below and in contact with the conductive feature. semiconductor device structure also includes a dielectric layer enclosing the conductive feature, wherein an air gap is formed between the dielectric layer and the conductive feature.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Ching Wang, Kuan-Lun Cheng, Wen-Hsing Hsieh
  • Patent number: 11581195
    Abstract: A semiconductor package comprises a lead frame, a chip, and a molding encapsulation. The lead frame comprises one or more die paddles, a first plurality of leads, and a second plurality of leads. A respective end surface of each lead of the first plurality of leads and the second plurality of leads is plated with a metal. A first respective window on a first side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A second respective window on a second side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A method for fabricating a semiconductor package comprises the steps of providing a lead frame array, mounting a chip, forming a molding encapsulation, and applying a cutting process or a punching process.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: February 14, 2023
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Yan Xun Xue, Long-Ching Wang, Lei Fukuda, Adrian Chee Heong Koh, Peter Wilson, Feng Ye
  • Patent number: 11577369
    Abstract: The present invention relates to a suction device, including a body. A cavity is disposed in the body. The cavity has a closed end face and an open end face. The open end face forms an end face to suck a workpiece. A tangential nozzle is disposed on a sidewall surface of the cavity. An external fluid enters the cavity through the tangential nozzle along a tangential direction of the cavity. A suction hole is disposed on the closed end face. The suction hole is connected to a suction unit. The suction unit sucks the fluid in the cavity through the suction hole. The suction device can suck a workpiece by using both a rotational flow negative pressure and a negative suction pressure of a fluid in the cavity, and therefore can suppress impact of a workpiece surface on a suction force and generate a larger suction force.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: February 14, 2023
    Assignees: ZHEJIANG UNIVERSITY, HANGZHOU FUYA SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Ching Wang, Xin Li, Ningning Chen
  • Publication number: 20230039526
    Abstract: A liquid cooling structure for a server with low-force quickseal joints to carry the coolant includes a first support, a first joint, a second support, a second joint, a first magnet, and a second magnet. The first support is set on the cabinet body. The second support is set on the server body. The first joint is set on the first support. The second joint is arranged on the second support and can be coupled with the first joint. The first magnet is set on first support. The second magnet is set on second support. The first magnet and second magnet with opposite magnetism attract each other to reduce the amount of force required for coupling the first joint and the second joint, and is labor-saving.
    Type: Application
    Filed: June 29, 2022
    Publication date: February 9, 2023
    Inventors: PAO-CHING WANG, CHIEH-HSIANG LIN
  • Patent number: 11570354
    Abstract: A display assistant device comprises a display, a camera, a speaker, microphones, a processor and memory. The memory stores programs comprising instructions that, when executed by the processor, enable a plurality of modes of the display assistant device. The modes include a monitoring mode and an assistant mode. In the monitoring mode, the device is configured to perform a remote monitoring function in which first video captured by the camera is streamed to a remote server system for monitoring uses. The monitoring uses include transmission of the first video to remote client devices authorized to access the first video. In the assistant mode, the device is configured to perform a second plurality of functions that excludes the monitoring function and includes a video communication function in which second video captured by the camera is transmitted to second devices participating in a video communication with a first user of the device.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: January 31, 2023
    Assignee: Google LLC
    Inventors: Michael Yang Liu, Jeffrey Ching Wang, Mohamed Mohy-Eldeen Abdelgany, John Jordan Nold, George Alban Heitz, III, Siddarth Raghunathan, Shayan Sayadi, Scott Mullins
  • Publication number: 20230021687
    Abstract: A semiconductor package comprises a semiconductor substrate, a first metal layer, an adhesive layer, a second metal layer, a rigid supporting layer, and a plurality of contact pads. A thickness of the semiconductor substrate is equal to or less than 50 microns. A thickness of the rigid supporting layer is larger than the thickness of the semiconductor substrate. A thickness of the second metal layer is larger than a thickness of the first metal layer. A method comprises the steps of providing a device wafer; providing a supporting wafer; attaching the supporting wafer to the device wafer via an adhesive layer; and applying a singulaton process so as to form a plurality of semiconductor packages.
    Type: Application
    Filed: October 5, 2022
    Publication date: January 26, 2023
    Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventors: Jun Lu, Long-Ching Wang, Madhur Bobde, Bo Chen, Shuhua Zhou
  • Publication number: 20230020933
    Abstract: A semiconductor device structure includes a dielectric layer, a first source/drain feature in contact with the dielectric layer, wherein the first source/drain feature comprises a first sidewall, and a second source/drain feature in contact with the dielectric layer and adjacent to the first source/drain feature, wherein the second source/drain feature comprises a second sidewall. The structure also includes an insulating layer disposed over the dielectric layer and between the first sidewall and the second sidewall, wherein the insulating layer comprises a first surface facing the first sidewall, a second surface facing the second sidewall, a third surface connecting the first surface and the second surface, and a fourth surface opposite the third surface. The structure includes a sealing material disposed between the first sidewall and the first surface, wherein the sealing material, the first sidewall, the first surface, and the dielectric layer are exposed to an air gap.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Inventors: Chih-Ching WANG, Wen-Yuan CHEN, Chun-Chung SU, Jon-Hsu HO, Wen-Hsing HSIEH, Kuan-Lun CHENG, Chung-Wei WU, Zhiqiang WU
  • Patent number: 11557659
    Abstract: Embodiments of the present disclosure includes a method of forming a semiconductor device. The method includes providing a substrate having a plurality of first semiconductor layers and a plurality of second semiconductor layers disposed over the substrate. The method also includes patterning the first semiconductor layers and the second semiconductor layers to form a first fin and a second fin, removing the first semiconductor layers from the first and second fins such that a first portion of the patterned second semiconductor layers becomes first suspended nanostructures in the first fin and that a second portion of the patterned second semiconductor layers becomes second suspended nanostructures in the second fin, and doping a threshold modifying impurity into the first suspended nanostructures in the first fin.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: January 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Ching Wang, Chia-Ying Su, Wen-Hsing Hsieh, Kuan-Lun Cheng, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 11551597
    Abstract: An electronic device including a substrate, a plurality of first signal lines, and a plurality of second signal lines is provided. The first signal lines are disposed on the substrate. Each of the first signal lines includes a first intersecting section and a first extending section. The first intersecting section each has a constant extending direction. The first intersecting section is connected to the first extending section, while the first intersecting section and the first extending section have different extending directions. The second signal lines are disposed on the substrate. Each of the second signal lines includes a second intersecting section. The second intersecting section each has a constant extending direction. The second signal lines intersect with the first signal lines to form a plurality of intersections on each of the first signal lines, and the intersections are located on the first intersecting sections.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: January 10, 2023
    Assignee: E Ink Holdings Inc.
    Inventors: Chia-Chi Chang, Chih-Chun Chen, Chi-Ming Wu, Yi-Ching Wang, Jia-Hung Chen, Shu-Fen Tsai
  • Publication number: 20220412959
    Abstract: The present disclosure provides a method and a platform for enhancing detection activity of an interaction between a spike protein receptor binding domain of coronavirus from a specimen and a human angiotensin-converting enzyme II. The method and the platform of the present disclosure use a cleavable luciferase as a report test for the combination of the spike protein receptor binding domain of coronavirus (such as novel coronavirus) and angiotensin-converting enzyme II. Screening is carried out at the cellular level. The strength of the drug's influence on the interaction between the two molecules can be judged by the strength of the luminescence signal. The detection time can be completed within 20 minutes.
    Type: Application
    Filed: October 19, 2021
    Publication date: December 29, 2022
    Inventors: Hui-Ching Wang, Tian-Neng Li
  • Patent number: 11520997
    Abstract: A device and a method for generating a machine translation model and a machine translation device are disclosed. The device inputs a source training sentence of a source language and a dictionary data to a generator network so that the generator network outputs a target training sentence of a target language according to the source training sentence and the dictionary data. Then, the device inputs the target training sentence and a correct translation of the source training sentence to a discriminator network so as to calculate an error between the target training sentence and the correct translation according to the output of the discriminator network, and trains the generator network and the discriminator network respectively. The trained generator network is the machine translation model.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: December 6, 2022
    Assignee: National Central University
    Inventors: Jia-Ching Wang, Yi-Xing Lin
  • Patent number: 11508807
    Abstract: Embodiments relate to a semiconductor device structure including a first channel layer having a first surface and a second surface, a second channel layer having a first surface and a second surface, and the first and second channel layers are formed of a first material. The structure also includes a first dopant suppression layer in contact with the second surface of the first channel layer, and a second dopant suppression layer parallel to the first dopant suppression layer. The second dopant suppression layer is in contact with the first surface of the second channel layer, and the first and second dopant suppression layers each comprises carbon or fluorine. The structure further includes a gate dielectric layer in contact with the first and second dopant suppression layers and the first surface of the first channel layer, and a gate electrode layer disposed on the gate dielectric layer.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Ching Wang, Wen-Hsing Hsieh, Jon-Hsu Ho, Wen-Yuan Chen, Chia-Ying Su, Chung-Wei Wu, Zhiqiang Wu
  • Publication number: 20220367612
    Abstract: Embodiments relate to a semiconductor device structure including a first channel layer having a first surface and a second surface, a second channel layer having a first surface and a second surface, and the first and second channel layers are formed of a first material. The structure also includes a first dopant suppression layer in contact with the second surface of the first channel layer, and a second dopant suppression layer parallel to the first dopant suppression layer. The second dopant suppression layer is in contact with the first surface of the second channel layer, and the first and second dopant suppression layers each comprises carbon or fluorine. The structure further includes a gate dielectric layer in contact with the first and second dopant suppression layers and the first surface of the first channel layer, and a gate electrode layer disposed on the gate dielectric layer.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Chih-Ching Wang, Wen-Hsing Hsieh, Jon-Hsu Ho, Wen-Yuan Chen, Chia-Ying Su, Chung-Wei Wu, Zhiqiang Wu
  • Publication number: 20220369501
    Abstract: An air-cooled carrier of heat-generating electronic components includes a frame, a plate, and baffles. The plate coupled to the frame divides airflow in the frame into two channels. Opposite sides of each channel along a first direction carry inlet and outlet. A pair of baffles is coupled to each channel, each baffle comprises a mounting part, an arc-shaped elastic part, and a blocking part. The mounting part is fixed to the frame and the arc-shaped elastic part. The blocking part is fixed to the arc-shaped elastic part and extends to middle of the airflow cavity in a second direction perpendicular to the first direction. In the absence of a mounted storage component, the elastic part bringing the blocking part to a first position and so blocking air flow from that outlet to that inlet.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 17, 2022
    Inventors: PAO-CHING WANG, KE-CHENG LIN
  • Publication number: 20220359657
    Abstract: A semiconductor device structure, along with methods of forming such, are described. In one embodiment, a semiconductor device structure is provided. The semiconductor device structure a first source/drain region, a second source/drain region, and a gate stack disposed between the first source/drain region and the second source/drain region. The semiconductor device structure also includes a conductive feature disposed below the first source/drain region. The semiconductor device structure also includes a power rail disposed below and in contact with the conductive feature. semiconductor device structure also includes a dielectric layer enclosing the conductive feature, wherein an air gap is formed between the dielectric layer and the conductive feature.
    Type: Application
    Filed: May 5, 2021
    Publication date: November 10, 2022
    Inventors: Chih-Ching WANG, Kuan-Lun CHENG, Wen-Hsing HSIEH