Abstract: A semiconductor structure and method of forming the same are provided. The method includes: forming a plurality of mandrel patterns over a dielectric layer; forming a first spacer and a second spacer on sidewalls of the plurality of mandrel patterns, wherein a first width of the first spacer is larger than a second width of the second spacer; removing the plurality of mandrel patterns; patterning the dielectric layer using the first spacer and the second spacer as a patterning mask; and forming conductive lines laterally aside the dielectric layer.

Abstract: A method includes forming a material layer over a substrate, forming a first hard mask (HM) layer over the material layer, forming a first trench, along a first direction, in the first HM layer. The method also includes forming first spacers along sidewalls of the first trench, forming a second trench in the first HM layer parallel to the first trench, by using the first spacers to guard the first trench. The method also includes etching the material layer through the first trench and the second trench, removing the first HM layer and the first spacers, forming a second HM layer over the material layer, forming a third trench in the second HM layer. The third trench extends along a second direction that is perpendicular to the first direction and overlaps with the first trench. The method also includes etching the material layer through the third trench.

Abstract: The present invention provides a control method of an electronic device, wherein the control method includes the steps of: using a first beacon setting to transmit beacons; if a wireless communication state of the electronic device satisfies a condition, using a second beacon setting to transmit beacons; wherein the first beacon setting and the second beacon setting have different beacon periods or different payload sizes.

Abstract: Some embodiments of this disclosure include systems, apparatuses, methods, and computer-readable media for use in a wireless network for facilitating Unmanned Aerial System (UAS) services over evolved packet systems. Some embodiments are directed to a method, the method including receiving a registration request from each of an unmanned aerial vehicle (UAV) and a UAV controller to establish an Unmanned Aerial System (UAS). Additionally, the method includes initiating a UAS Operation Service Request Procedure via a network exposure function (NEF) and associating the UAV and the UAV controller to operate as the UAS in response to obtaining the results of the UAS operation service authorization from each of the UAV and the UAV controller. Moreover, the method also includes transmitting a UAS operation status update procedure to the UAV and the UAV controller, the update procedure including UAS association information, a UAS policy update, and initiation of a UAS operation.

Abstract: A semiconductor device includes a plurality of gate electrodes over a substrate, and a source/drain epitaxial layer. The source/drain epitaxial layer is disposed in the substrate and between two adjacent gate electrodes, wherein a bottom surface of the source/drain epitaxial layer is buried in the substrate to a depth less than or equal to two-thirds of a spacing between the two adjacent gate electrodes.

Abstract: Systems and methods are provided to control traffic accessing a public land mobile network service (PLMN) at a non-public network to perform local breakout for selected traffic.

Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, exposing the photoresist layer to an EUV radiation, and developing the exposed photoresist layer. The photoresist layer has a composition including a metal complex including a metallic core and at least one ligand bonded to the metallic core. The at least one ligand includes an alkenyl group, an alkynyl group, or a combination thereof.

Abstract: An embodiment is a method including forming a first interconnect structure over a first substrate, the first interconnect structure including dielectric layers and metallization patterns therein, the metallization patterns including a top metal layer including top metal structures, forming a passivation layer over the top metal structures of the first interconnect structure, forming a first opening through the passivation layer, forming a probe pad in the first opening and over the passivation layer, the probe pad being electrically connected to the first top metal structure, performing a circuit probe test on the probe pad, removing the probe pad, and forming a bond pad and a bond via in dielectric layers over the passivation layer, the bond pad and bond via being electrically coupled to a second top metal structure of the top metal structures and a third top metal structure of the top metal structures.

Abstract: A device includes a substrate; a first layer over the substrate, the first layer containing a plurality of fin features and a trench between two adjacent fin features. The device also includes a porous material layer having a first portion and a second portion. The first portion is disposed in the trench. The second portion is disposed on a top surface of the first layer. The first and the second portions contain substantially same percentage of Si, substantially same percentage of O, and substantially same percentage of C.

Abstract: A container for containing food or liquid is provided. The container includes a body portion, a lid and an attachment. The lid is detachably disposed on the body portion. The attachment is configured to be disposed on the lid or the body portion and includes a magnetic attraction member and a connecting structure. The magnetic attraction member is adapted to be magnetically connected to a mobile electronic device. The connecting structure is disposed between the magnetic attraction member and the container for selectively fixing the magnetic attraction member at a first position or a second position. The connecting structure includes a fastening member, and the fastening member is adapted to be detachably fastened to the body portion or the lid.

Abstract: A mobile device attachment adapted for a mobile device and a container for food or liquid is provided. The mobile device attachment includes a magnetic connecting member and a connecting member. The magnetic connecting member is selectively magnetically connected to the mobile device and adapted to extend in an escaping direction. The connecting member is disposed between the container and the magnetic connecting member. The mobile device has an image capturing range. When the magnetic connecting member extends in the escaping direction, the container, the magnetic connecting member and the connecting member are located outside the image capturing range. Besides, a container including the mobile device attachment is also provided.

Abstract: Various embodiments herein provide techniques related to sixth generation (6G) system architecture and functions. For example, embodiments may relate to one or more of: Design principle and system architecture; Orchestration frontend service; Dynamic device-network computing scaling; RDMA over radio; Cloud workload offloading to network; Computing-embedded air interface; Service chain aware transport; and/or Enabling Al capabilities. Other embodiments may be described and/or claimed.

Abstract: A container for containing food or liquid is provided. The container includes a body portion, a lid and an attachment. The lid is detachably disposed on the body portion. The attachment includes a magnetic attraction member and a connecting structure. The magnetic attraction member is independent from the lid and adapted to be magnetically connected to a mobile electronic device. The connecting structure is disposed between the magnetic attraction member and the container for selectively fixing the magnetic attraction member at a first position or a second position. At least a portion of the connecting structure is fixed to the container.

Abstract: Relay service is enabled between a residential gateway and a remote user. For example, a 5G residential gateway (5G-RG) may include a relay user equipment (UE) to enable relay service for a 5G core (5GC)-capable UE behind the 5G-RG to connect to the 5GC. The relay UE of the 5G-RG may provide a trusted/untrusted non-3GPP access network for L2 or L3 transport connection to the 5GC-capable UE.

Abstract: The present disclosure provides method to generate a dummy pad pattern. A method according to embodiment of the present disclosure includes receiving a design layout that includes a device region disposed in a scribe line region, identifying a center portion of the scribe line region surrounding the device region and an edge portion surrounding the center portion, dividing the edge portion into a plurality of rectangular areas, super-positioning a dummy pattern on each of the plurality of rectangular areas to obtain edge dummy patterns, super-positioning the dummy pattern on the center portion to obtain center dummy patterns, carving out a portion of the dummy pattern corresponding to the device region from the center dummy patterns to obtain net center dummy patterns, generating a scribe line dummy pattern based on the edge dummy patterns and the net center dummy patterns, and fabricating a first photomask including the scribe line dummy pattern.

Abstract: An integrated circuit includes a first inverter, a first transmission gate, and a second inverter constructed with wide type-one transistors and wide type-two transistors. The integrated circuit also includes a first clocked inverter and a second clocked inverter constructed with narrow type-one transistors and narrow type-two transistors. A master latch is formed with the first inverter and the first clocked inverter. A slave latch is formed with the second inverter and the second clocked inverter. The first transmission gate is coupled between the master latch and the slave latch. The wide type-one transistors are formed in a wide type-one active-region structure and the narrow type-one transistors are formed in a narrow type-one active-region structure. The wide type-two transistors are formed in a wide type-two active-region structure and the narrow type-two transistors are formed in in a narrow type-two active-region structure.

Abstract: A manufacturing process is described to evaluate and select raw semiconductor wafers in preparation for epitaxial layer formation. The manufacturing process first produces a single crystal ingot during which a seed pulling velocity and temperature gradient are closely controlled. The resulting ingot is vacancy-rich with relatively few self-interstitial defects. Selected wafers can advance to a high-temperature nitridation annealing operation that further reduces the number of interstitials while increasing the vacancies. Substrates characterized by a high vacancy density can then be used to optimize an epitaxial layer deposition process.

Abstract: A photoresist composition includes a conjugated resist additive, a photoactive compound, and a polymer resin. The conjugated resist additive is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline. The polyacetylene, polythiophene, polyphenylenevinylene, polyfluorene, polypryrrole, the polyphenylene, and polyaniline includes a substituent selected from the group consisting of an alkyl group, an ether group, an ester group, an alkene group, an aromatic group, an anthracene group, an alcohol group, an amine group, a carboxylic acid group, and an amide group. Another photoresist composition includes a polymer resin having a conjugated moiety and a photoactive compound. The conjugated moiety is one or more selected from the group consisting of a polyacetylene, a polythiophene, a polyphenylenevinylene, a polyfluorene, a polypryrrole, a polyphenylene, and a polyaniline.

Abstract: A photoresist developer includes a solvent having Hansen solubility parameters of 15<?d<25, 10<?p<25, and 6<?p<30; an acid having an acid dissociation constant, pKa, of ?15<pKa<4, or a base having a pKa of 40>pKa>9.5; and a chelate.

Abstract: In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups, and per memory bank load caching capabilities. In addition, decoupled accelerators may be used to offload VPU processing tasks to increase throughput and performance, and a hardware sequencer may be included in a DMA system to reduce programming complexity of the VPU and the DMA system. The DMA and VPU may execute a VPU configuration mode that allows the VPU and DMA to operate without a processing controller for performing dynamic region based data movement operations.