Patents by Inventor Ching Yu

Ching Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240249941
    Abstract: Method of manufacturing semiconductor device, includes forming protective layer over substrate having plurality of protrusions and recesses. The protective layer includes polymer composition including polymer having repeating units of one or more of: Wherein a, b, c, d, e, f, g, h, and i are each independently H, —OH, —ROH, —R(OH)2, —NH2, —NHR, —NR2, —SH, —RSH, or —R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeating unit is not H. R, R1, and R2 are each independently a C1-C10 alkyl group, a C3-C10 cycloalkyl group, a C1-C10 hydroxyalkyl group, a C2-C10 alkoxy group, a C2-C10 alkoxy alkyl group, a C2-C10 acetyl group, a C3-C10 acetylalkyl group, a C1-C10 carboxyl group, a C2-C10 alkyl carboxyl group, or a C4-C10 cycloalkyl carboxyl group, and n is 2-1000. A resist layer is formed over protective layer, and resist layer is patterned.
    Type: Application
    Filed: March 6, 2024
    Publication date: July 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jing Hong HUANG, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20240251331
    Abstract: Various embodiments herein may relate to system information blocks (SIBs) for augmented computing in cellular networks. In particular, some embodiments may be directed to system information associated with computing service support in cellular networks. Other embodiments may be disclosed or claimed.
    Type: Application
    Filed: August 10, 2022
    Publication date: July 25, 2024
    Inventors: Zongrui DING, Qian LI, Sangeetha L. BANGOLAE, Sudeep PALAT, Xiaopeng TONG, Alexandre Saso STOJANOVSKI, Ching-Yu LIAO
  • Publication number: 20240249942
    Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.
    Type: Application
    Filed: March 5, 2024
    Publication date: July 25, 2024
    Inventors: Ching-Yu Chang, Jung-Hau Shiu, Jen Hung Wang, Tze-Liang Lee
  • Publication number: 20240236836
    Abstract: Various embodiments herein are directed to radio access network (RAN) computing service support with distributed units (DUs). In particular, some embodiments are directed to to the architecture and corresponding control plane functions and protocols for RAN-based computation offloading using compute resource at a next-generation NodeB (gNB) DU. Other embodiments be disclosed or claimed.
    Type: Application
    Filed: August 10, 2022
    Publication date: July 11, 2024
    Inventors: Sangeetha L. BANGOLAE, Zongrui DING, Alexandre Saso STOJANOVSKI, Qian LI, Sudeep PALAT, Thomas LUETZENKIRCHEN, Youn Hyoung HEO, Ching-Yu LIAO, Abhijeet KOLEKAR
  • Publication number: 20240236183
    Abstract: Various embodiments herein are directed to remote direct memory access (RDMA) support in cellular networks. In particular, some embodiments may relate to enhancements to RDMA over cellular network (RoCN) protocols.
    Type: Application
    Filed: August 10, 2022
    Publication date: July 11, 2024
    Inventors: Sangeetha L. BANGOLAE, Zongrui DING, Qian LI, Sudeep PALAT, Youn Hyoung HEO, Alexandre Saso STOJANOVSKI, Thomas LUETZENKIRCHEN, Ching-Yu LIAO, Abhijeet KOLEKAR
  • Publication number: 20240234404
    Abstract: An integrated circuit is provided, including a first cell. The first cell includes a first pair of active regions, at least one first gate, two first conductive segments, and a first interconnect structure. The first pair of active regions extends in a first direction and stacked on each other. The at least one first gate extends in a second direction different from the first direction, and is arranged across the first pair of active regions, to form at least one first pair of devices that are stacked on each other. The first conductive segments are coupled to the first pair of active regions respectively. The first interconnect structure is coupled to at least one of a first via or one of the two first conductive segments.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Cheng TZENG, Shih-Wei PENG, Ching-Yu HUANG, Chun-Yen LIN, Wei-Cheng LIN, Jiann-Tyng TZENG, Szuya LIAO, Jui-Chien HUANG, Cheng-Yin WANG, Ting-Yun WU
  • Patent number: 12025920
    Abstract: A lithography method is described. The method includes forming a resist layer over a substrate, performing a treatment on the resist layer to form an upper portion of the resist layer having a first molecular weight and a lower portion of the resist layer having a second molecular weight less than the first molecular weight, performing an exposure process on the resist layer, and performing a developing process on the resist layer to form a patterned resist layer.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: July 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hui Weng, Ching-Yu Chang
  • Publication number: 20240210822
    Abstract: A method for forming a semiconductor device is provided. The method includes forming a coating layer over a substrate, the coating layer comprising a switchable polymer comprising a polymer backbone and pendant groups attached to the polymer backbone and an acid generator. The pendant groups include acid labile groups and crosslinking groups. A baking process is then performed to cause crosslinking of the crosslinking groups to form a crosslinked coating layer. Next, a photoresist layer is deposited over the crosslinked coating layer. After selectively exposing the photoresist layer and the crosslinked coating layer to a patterning radiation, the selectively exposed photoresist layer and the crosslinked coating layer are developed to form a pattern of openings in the photoresist layer and the crosslinked coating layer.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 27, 2024
    Inventors: An-Ren Zi, Ching-Yu Chang
  • Publication number: 20240214282
    Abstract: An apparatus and system for traffic Steering for Service Function Chaining (SFC) are described. Different protocol stacks may be used to enable SFC for the user plane. The protocol stacks include: separate SFC service layer and transport protocols in which transport uses identifiers of different enhanced user plane functions (eUPFs) and communication (Comm) Service Functions (SFs), transport protocols that are integrated with SFC-related information in which a General Packet Radio Service Tunneling Protocol-user (GTP-U) header or a Segment Routing Header (SRH) has type-length-value (TLV) fields contains the SFC-related information, or an SFC inherent Segment Routing (SR) protocol stack in which first SFC-related information is carried as a locator: function field in Segment Routing Header (SRH) and second SFC-related information is contained in a type-length-value (TLV) field of the SRH, the first SFC-related information comprising a Comm SF and identification of SFs reachable from the Comm SF.
    Type: Application
    Filed: September 1, 2022
    Publication date: June 27, 2024
    Inventors: Zongrui Ding, Qian Li, Sangeetha L. Bangolae, Youn Hyoung Heo, Abhijeet Ashok Kolekar, Ching-YU Liao, Thomas Luetzenkirchen, Sudeep K. Palat, Alexandre Saso Stojanovski, Xiaopeng Tong
  • Patent number: 12019375
    Abstract: Materials directed to a photosensitive material and a method of performing a lithography process using the photosensitive material are described. A semiconductor substrate is provided. A first layer including a floating additive is formed over the semiconductor substrate. A second layer including an additive component having a metal cation is formed over the first layer. One or more bonds are formed to bond the metal cation and one or more anions. Each of the one or more anions is one of a protecting group and a polymer chain bonding component. The polymer chain bonding component is bonded to a polymer chain of the layer. The second layer is exposed to a radiation beam.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang, Chien-Wei Wang
  • Publication number: 20240198160
    Abstract: An exercise apparatus includes a main frame, two operating members, a linking assembly and an eddy-current resistance assembly. The operating members are pivotally connected to two sides of the main frame. The linking assembly is disposed on the main frame and connected to the two operating members, wherein the two operating members are linked up with and reversely reciprocated to each other via the linking assembly. The eddy-current resistance assembly is linked with one of the two operating members for generating a resistance.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Inventor: Ching-Yu YEH
  • Publication number: 20240201587
    Abstract: Methods and materials for reducing the radiation dosage needed for development of a metallic photoresist are disclosed. During development, the metallic photoresist is exposed to an additive that comprises (i) one aromatic group with one or more substituents having at least one saturated endgroup; or (ii) a plurality of aromatic groups linked together through a linking moiety. Improved line resolution is also obtained.
    Type: Application
    Filed: January 5, 2023
    Publication date: June 20, 2024
    Inventors: An-Ren Zi, Hui-Chun Lee, Peng-Ting Lee, Ching-Yu Chang
  • Publication number: 20240192601
    Abstract: A patterning stack is provided. The patterning stack includes a bottom anti-reflective coating (BARC) layer over a substrate, a photoresist layer having a first etching resistance over the BARC layer, and a top coating layer having a second etching resistance greater than the first etching resistance over the photoresist layer. The top coating layer includes a polymer having a polymer backbone including at least one functional unit of high etching resistance and one or more acid labile groups attacked to the polymer backbone or a silicon cage compound.
    Type: Application
    Filed: August 10, 2023
    Publication date: June 13, 2024
    Inventors: Tzu-Yang LIN, Ching-Yu CHANG, Chin-Hsiang LIN
  • Patent number: 12009516
    Abstract: A fast charging lithium-ion battery includes a positive electrode plate, a negative electrode plate, a separator, and an electrolyte. The positive electrode plate includes a positive current collector and a positive active material layers. The negative electrode plate includes a negative current collector and negative active material layers. The negative active material layers include titanium niobium oxide, lithium titanate, or a combination thereof. The separator is disposed between the positive electrode plate and the negative electrode plate. The electrolyte contacts the positive electrode plate and the negative electrode plate. The negative active material layers have an effective area corresponding to the positive electrode plate. The negative active material layers have a thickness on one surface of the negative current collector. A ratio of the effective area to the thickness is greater than 2×105 mm.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: June 11, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Deng-Tswen Shieh, Sheng-Fa Yeh, Shih-Chieh Liao, Ching-Yu Chen, Hao-Tzu Huang
  • Patent number: 12009210
    Abstract: A method of manufacturing a semiconductor device includes forming a first protective layer over an edge portion of a first main surface of a semiconductor substrate. A metal-containing photoresist layer is formed over the first main surface of the semiconductor substrate. The first protective layer is removed, and the metal-containing photoresist layer is selectively exposed to actinic radiation. A second protective layer is formed over the edge portion of the first main surface of the semiconductor substrate. The selectively exposed photoresist layer is developed to form a patterned photoresist layer, and the second protective layer is removed.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20240187340
    Abstract: This disclosure describes systems, methods, and devices related to service function chaining classification in wireless networks. A communications network system may include a first cellular network device configured to: receive service data adaptation protocol (SDAP) data from a user equipment (UE) device, the SDAP data comprising a SDAP header; identify a service chaining function (SFC) service identifier of the SDAP header; determine that the SFC service identifier is indicative of a SFC service profile, the SFC service profile indicative of quality of service (QOS) traffic characteristics; identify a SFC traffic flow associated with the SFC service identifier; and transmit the SDAP data to a second cellular network device; and wherein the second cellular network device is configured to: receive the SDAP data from the first cellular network device; and transmit the SDAP data to a service function of the system.
    Type: Application
    Filed: May 26, 2022
    Publication date: June 6, 2024
    Inventors: Zongrui DING, Qian LI, Alexandre Saso STOJANOVSKI, Sudeep PALAT, Thomas LUETZENKIRCHEN, Abhijeet KOLEKAR, Ching-Yu LIAO, Sangeetha BANGOLAE, Youn Hyoung HEO, Xiaopeng TONG
  • Publication number: 20240186148
    Abstract: A method of manufacturing a semiconductor device includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.
    Type: Application
    Filed: February 9, 2024
    Publication date: June 6, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Hao CHEN, Wei-Han LAI, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20240187331
    Abstract: This disclosure describes systems, methods, and devices related to service function chaining in wireless networks. A communications system may include a communication control function to select one or multiple communication service functions associated with establishing service function chaining (SFC) services for telecommunications; a service orchestration and chaining function (SOCF) to establish the SFC services; and a service orchestration exposure function (SOEF) to expose the SFC services to an application function (AF) of the system.
    Type: Application
    Filed: May 3, 2022
    Publication date: June 6, 2024
    Inventors: Zongrui DING, Qian LI, Ching-Yu LIAO, Alexandre Saso STOJANOVSKI, Sudeep PALAT, Thomas LUETZENKIRCHEN, Abhijeet KOLEKAR, Sangeetha BANGOLAE, Youn Hyoung HEO, Xiaopeng TONG
  • Patent number: 12003242
    Abstract: An integrated circuit includes a first inverter, a first transmission gate, and a second inverter constructed with wide type-one transistors and wide type-two transistors. The integrated circuit also includes a first clocked inverter and a second clocked inverter constructed with narrow type-one transistors and narrow type-two transistors. A master latch is formed with the first inverter and the first clocked inverter. A slave latch is formed with the second inverter and the second clocked inverter. The first transmission gate is coupled between the master latch and the slave latch. The wide type-one transistors are formed in a wide type-one active-region structure and the narrow type-one transistors are formed in a narrow type-one active-region structure. The wide type-two transistors are formed in a wide type-two active-region structure and the narrow type-two transistors are formed in in a narrow type-two active-region structure.
    Type: Grant
    Filed: January 27, 2023
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Yu Huang, Jiann-Tyng Tzeng, Wei-Cheng Lin
  • Patent number: 12001621
    Abstract: A touch module includes a flexible base, a moisture blocking film and a touch structure. The moisture blocking film has a first surface and a second surface opposite to the first surface, and the first surface directly contacts the flexible base. The touch structure is disposed on the second surface of the moisture blocking film and includes a first conductive layer disposed on the second surface, a first insulating layer disposed on the first conductive layer, a second conductive layer disposed on the first insulating layer and a second insulating layer disposed on the second conductive layer. An area of the moisture blocking film is greater than or equal to the sum of the areas of the touch electrode region and the peripheral circuit region of the touch structure. The water vapor transmission rate of the moisture blocking film is less than 5.0*10?4 g/(m2*day).
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: June 4, 2024
    Assignee: HENGHAO TECHNOLOGY CO., LTD.
    Inventors: Shih-Chung Lu, Ming-Hung Yang, Ching-Yu Tsai, Kuan-Jen Chen