Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11943122
    Abstract: Disclosed embodiments are related to Management Data Analytics (MDA) relation with Self-Organizing Network (SON) functions and coverage issues analysis use case. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: March 26, 2024
    Assignee: Intel Corporation
    Inventors: Yizhi Yao, Joey Chou
  • Patent number: 11942150
    Abstract: A resistive random-access memory (RRAM) circuit includes an RRAM device configured to output a cell current responsive to a bit line voltage, and a current limiter including an input terminal coupled to the RRAM device, first and second parallel current paths configured to conduct the cell current between the input terminal and a reference voltage node, and an amplifier configured to generate a first signal responsive to a voltage level at the input terminal and a reference voltage level. Each of the first and second current paths includes a switching device configured to selectively conduct a portion of the cell current responsive to the first signal.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Cheng Chou, Zheng-Jun Lin, Pei-Ling Tseng
  • Patent number: 11938105
    Abstract: In one aspect, the disclosure relates to methods and compositions for treatment of cancer cachexia. In a further aspect, the composition is a pharmaceutical composition comprising a class I/IIB HDAC inhibitor and an androgen. In a still further aspect, the method of treatment comprises administering a class I/IIB HDAC inhibitor and an androgen to a subject or patient who has been diagnosed as having cancer cachexia. In some aspects, the class I/IIB HDAC inhibitor is a compound known as AR-42.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: March 26, 2024
    Assignee: Ohio State Innovation Foundation
    Inventors: Ching-Shih Chen, Christopher C. Coss, Samuel Kulp, Yu-Chou Tseng, Tanios Bekaii-Saab
  • Patent number: 11943913
    Abstract: A semiconductor structure includes a substrate and a buried gate structure in the substrate. The buried gate structure includes a gate dielectric layer formed on the sidewall and the bottom surface of a trench in the substrate, a barrier layer formed in the trench and on the sidewall and the bottom surface of the gate dielectric layer, a first work function layer formed in the trench and including a main portion and a protruding portion, a second work function layer formed at opposite sides of the protruding portion, and an insulating layer formed in the trench and on the protruding portion of the first work function layer and the second work function layer. The barrier layer surrounds the main portion of the first work function layer. The area of the top surface of the protruding portion is less than the area of the bottom surface of the protruding portion.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: March 26, 2024
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Te-Hsuan Peng, Kai Jen, Mei-Yuan Chou
  • Patent number: 11939268
    Abstract: A method of forming low-k material is provided. The method includes providing a plurality of core-shell particles. The core of the core-shell particles has a first ceramic with a low melting point. The shell of the core-shell particles has a second ceramic with a low melting point and a low dielectric constant. The core-shell particles are sintered and molded to form a low-k material. The shell of the core-shell particles is connected to form a network structure of a microcrystal phase.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Chuang Chiu, Tzu-Yu Liu, Tien-Heng Huang, Tzu-Chi Chou, Cheng-Ting Lin
  • Patent number: 11940854
    Abstract: A replacement device includes a replacement module and a slider. The replacement module includes a sliding portion. The sliding portion is provided with a limiting column, which is formed with a fixing hole. The slider includes a slider body. The slider body is provided with a first latch, a limiting hole and a fixing element, wherein the first latch is arranged on a first side edge of the slider body. The slider is correspondingly arranged on the sliding portion of the replacement module, and the limiting column of the sliding portion passes through the limiting hole. The fixing element has a top portion, and is fixed in the fixing hole. The size of the top portion is greater than the size of the limiting hole, so that the slider moves relative to the replacement module within a limit range of the limiting hole.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 26, 2024
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventors: Hsin-Chih Chou, Wan-Lin Hsu, Juei-Chi Chang
  • Patent number: 11942543
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Patent number: 11941298
    Abstract: A host system initiates an abort of a command that has been placed into a submission queue (SQ) of the host system. The host system identifies at least one of a first outcome and a second outcome. When the first outcome indicates that the command is not completed and the second outcome indicates that the SQ entry has been fetched from the SQ, the host system sends an abort request to a storage device, and issues a cleanup request to direct the host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry based on at least one of the first outcome and the second outcome.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: March 26, 2024
    Assignee: MediaTek Inc.
    Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
  • Patent number: 11943785
    Abstract: A method for PDCCH monitoring performed by a UE is provided. The method includes performing the PDCCH monitoring in a first group associated with at least one first PDCCH monitoring configuration; receiving, from a base station, DCI comprising an indicator; performing the PDCCH monitoring in a second group associated with at least one second PDCCH monitoring configuration; and stopping the PDCCH monitoring in the first group after receiving the indicator.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: March 26, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Wan-Chen Lin, Chie-Ming Chou, Tsung-Hua Tsai, Yu-Hsin Cheng
  • Publication number: 20240096262
    Abstract: A device may include a display that display an image frame that is divided into adjustable regions having respective resolutions based on compensated image data. The device may also include image processing circuitry to generate the compensated image data by applying gains that compensate for burn-in related aging of pixels of the display. The gains are based on an aggregation of history updates indicative of estimated amounts of aging associated with pixel utilization. The circuitry may generate a history update by obtaining boundary data indicative of the boundaries between the adjustable regions, determining an estimated amount of aging, and dynamically resampling the estimated amount of aging by resampling a portion of the estimated amount of aging corresponding to an adjustable region by a factor and resampling of a different portion of the estimated amount of aging corresponding to another adjustable region by a different factor based on the boundary data.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Inventors: Jim C Chou, Shereef Shehata, Yung-Chin Chen
  • Publication number: 20240097216
    Abstract: The present invention discloses a detection device and a probe module thereof, wherein an electrical connection path between a battery detection frame and a battery under test is provided via the probe module. The probe module includes a base, a first polarity plate, a second polarity plate, a first upper connection group, a second upper connection group, a first lower connection member and a second lower connection member. Via the first polarity plate, the first upper connection group is correspondingly coupled to the battery detection frame, and the first lower connection member is correspondingly coupled to the battery under test. Via the second polarity plate, the second upper connection group is correspondingly coupled to the battery detection frame, and the second lower connection member is correspondingly coupled to the battery under test. Thus, it is not necessary to process a cable having been fixed on the battery detection frame when the probe module is replaced.
    Type: Application
    Filed: June 8, 2023
    Publication date: March 21, 2024
    Inventors: CHUAN-TSE LIN, CHEN-CHOU WEN, SHIH-CHIN TAN, WEN-CHUAN CHANG, YING-CHENG CHEN
  • Publication number: 20240090796
    Abstract: A foot sensor and analysis device, which includes a pressure sensing layer arranged inside the insole and a sensing module installed inside the insole. The sensing module is electrically coupled with the pressure sensing layer for receiving and processing detected electronic signals, where sensing module includes an inductance coil to perform wireless charging to the battery. The pressure sensing layer and the sensing module are integrally formed inside the insole.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Yao-Sheng Chou, Hsiao-Yi Lin, Wei-Sheng Su, Hsing-Yu Chi
  • Publication number: 20240095871
    Abstract: A device may include a display for displaying an image frame based on warped image data and image processing circuitry to generate the warped image data by warping input image data to account for one or more distortions associated with displaying the image. The image processing circuitry may include a two-stage cache architecture having an first cache and an second cache and warp the input image data by generating mapping data indicative of a warp between the input image space and the output image space and fetching the input image data to populate the first cache. Warping may also include populating the second cache with a grouping of pixel values from the first cache that are selected according to a sliding window that traverses the first cache based on the mapping data and interpolating between pixel values of the grouping to generate pixel values of the warped image data.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 21, 2024
    Inventors: Ido Y Soffair, Uri Nix, Yung-Chin Chen, Jim C Chou, Jian Zhou, Assaf Menachem, Sorin C Cismas
  • Publication number: 20240096431
    Abstract: A memory circuit includes a non-volatile memory cell, a comparator and a detection circuit. The comparator is coupled to the non-volatile memory cell, and configured to generate a first output signal. The comparator including a first input terminal and a first output terminal. The first input terminal is coupled to the non-volatile memory cell by a first node, and configured to receive a first voltage. The first output terminal is configured to output the first output signal. The detection circuit is coupled to the comparator and the non-volatile memory cell. The detection circuit is configured to latch the first output signal and disrupt a current path between at least the non-volatile memory cell and the comparator. The detection circuit includes a first inverter coupled to the first output terminal of the comparator and configured to generate an inverted first output signal.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Chun-Hao CHANG, Gu-Huan LI, Shao-Yu CHOU
  • Publication number: 20240095884
    Abstract: Systems and methods are provided for adding digital film grain to images and videos displayed by a display of an electronic device. An image processing circuitry of the electronic device may include hardware, such as display pipeline hardware, memory-to-memory scaler and rotator (MSR) hardware, and/or other possible hardware, that enables generation of film grain templates based on characteristics of a target film grain, pseudo-randomly samples the programmable template to fetch film grain values, scales the film grain values, and combines the scaled film grain values with values of pixels in an image frame.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 21, 2024
    Inventors: Shereef Shehata, Stephan Lachowsky, Jim C Chou
  • Publication number: 20240094484
    Abstract: A system and method for alignment. In some embodiments, the method includes measuring a first offset, the first offset being an offset along a first direction between a first alignment mark and a second alignment mark, the first alignment mark being an alignment mark on a first edge of a source die, the second alignment mark being an alignment mark on a target wafer, and the first direction being substantially parallel to the first edge of the source die.
    Type: Application
    Filed: December 17, 2021
    Publication date: March 21, 2024
    Inventors: Chia-Te CHOU, Albert BENZONI, Michael LEE, Cristian STAGARESCU, William VIS, Melissa ZIEBELL
  • Publication number: 20240095774
    Abstract: A search engine coupled to a database of product information is provided a search query having a datapoint and the search engine uses at least the datapoint to generate a search result. A vendor system associated with the search engine subsequently uses one or more interactions with the generated search result to update a conversion value that is linked within a datastore of the vendor system to the datapoint. When it is determined by the vendor system that the updated conversion value that is linked within the datastore to the datapoint was caused to exceed a predetermined threshold value, the vendor system causes a notification to be sent to one or more consumers that previously provided the datapoint for use in a search by the search engine.
    Type: Application
    Filed: August 25, 2023
    Publication date: March 21, 2024
    Inventors: Jean-Marc Francois Reynaud, Geoffry A. Westphal, Thomas Allen Mathis, Immanuel Savio Donbosco, Yen-Chen Chou
  • Publication number: 20240096567
    Abstract: A backlight module for illuminating a keycap includes a shielding sheet, a light guide panel, a lighting board disposed under the light guide panel, and a first protrusion structure. The shielding sheet includes a light permeable area. The light guide panel is disposed under the shielding sheet and has a light guide hole for accommodating a light source of the lighting board. The first protrusion structure is formed on the shielding sheet and protrudes toward the light source. The first protrusion structure is at least partially not overlapped with the light source in a vertical direction, for reflecting and scattering at least partial light of the light source to enter the light guide panel for lateral transmission.
    Type: Application
    Filed: September 18, 2023
    Publication date: March 21, 2024
    Applicant: DARFON ELECTRONICS CORP.
    Inventors: Chao-Yu Chen, Po-Yueh Chou
  • Publication number: 20240094052
    Abstract: An optical module is disclosed. The optical module includes a carrier, an optical emitter disposed over the carrier, and a monitor disposed over the carrier and configured to adjust a property of a first light emitted from the optical emitter.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kuo Sin HUANG, Tien-Chia LIU, Ko-Fan TSAI, Cheng-Te CHOU, Yan-Te CHOU
  • Publication number: 20240095438
    Abstract: A device includes a first cell active area asymmetrically positioned in a first device column between a first barrier line and a second barrier line, a second cell active area asymmetrically positioned in a second device column between the first barrier line and a third barrier line, where the first cell has a first cell length in a first direction perpendicular to the first barrier line which is three times a second cell length in the first direction. The first cell active area and the second cell active area are a first distance from the first barrier line, and the first cell active area is a second distance from the second barrier line, and the second cell active area is the second distance away from the third barrier line.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Tao YANG, Wen-Shen CHOU, Yung-Chow PENG