Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929407
    Abstract: A method of fabricating a HEMT includes the following steps. A substrate having a group III-V channel layer, a group III-V barrier layer, a group III-V gate layer, and a gate etch stop layer disposed thereon is provided. A passivation layer is formed to cover the group III-V barrier layer and the gate etch stop layer. A gate contact hole and at least one source/drain contact hole are formed in the passivation layer, where the gate contact hole exposes the gate etch stop layer, and the at least one source/drain contact hole exposes the group III-V channel layer. In addition, a conductive layer is conformally disposed on a top surface of the passivation layer and in the gate contact hole and the at least one source/drain contact hole.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: March 12, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Ting-En Hsieh, Yu-Chieh Chou, Yung-Fong Lin
  • Patent number: 11927793
    Abstract: A double-sided display device includes a first panel, a second panel, a light guide plate and a light source. The second panel is arranged opposite to the first panel. The light guide plate is arranged between the first panel and the second panel, and includes a main body portion including a first surface and a second surface, a first pattern arranged on the first surface, and a second pattern arranged on the second surface. The light source is arranged adjacent to the light guide plate. The first pattern is different from the second pattern.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: March 12, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Yi-Hui Lee, Kuan-Chou Chen, Yung-Chih Cheng
  • Patent number: 11926266
    Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: March 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Shih-Wei Yeh, Chien-Chih Lin, Yi-Ming Chou, Chun-Chieh Chang
  • Patent number: 11929021
    Abstract: Systems and methods are provided for using an optical crosstalk compensation (OXTC) block to compensate for optical crosstalk resulted from a combination of viewing angle change across field of view (FoV), color filter (CF) crosstalk, and the OLED various angle color shift (VACS) of a foveated electronic display. One or more two-dimensional (2D) OXTC factor maps are used to determine OXTC factors for input image data of the OXTC block, and the OXTC factors are updated on a per frame basis. Offset values are determined using a parallel architecture and used to determine the OXTC factors. Compensation weights are used to determine weighted OXTC factors to improve processing efficiency. Output image data are obtained by applying the weighted OXTC factors to the input image data.
    Type: Grant
    Filed: June 2, 2023
    Date of Patent: March 12, 2024
    Assignee: Apple Inc.
    Inventors: Shereef Shehata, Jim C Chou, Sheng Zhang, Shengchang Cai
  • Publication number: 20240078370
    Abstract: Various techniques are disclosed for automatically generating sub-cells for a non-final layout of an analog integrated circuit. Device specifications and partition information for the analog integrated circuit is received. Based on the device specifications and the partition information, first cut locations for a first set of cuts to be made along a first direction of a non-final layout of the analog integrated circuit and second cut locations for a second set of cuts to be made along a second direction in the non-final layout are determined. The first set of cuts are made in the non-final layout at the cut locations to produce a temporary layout. The second set of cuts are made in the temporary layout at the cut locations to produce a plurality of sub-cells.
    Type: Application
    Filed: August 10, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Chang, Wen-Shen Chou, Yung-Chow Peng, Yung-Hsu Chuang, Yu-Tao Yang, Bindu Madhavi Kasina
  • Publication number: 20240077688
    Abstract: An optical assembly (100) for use in a wearable device is provided, the assembly (100) comprising: a prism (104), a photonic integrated chip, PIC (108), a substrate layer (106), and a lid (102); wherein the PIC (108) is mounted onto the substrate layer (106); the prism (104) comprising: (i) a first input/output surface (112) optically coupled to the PIC (108), and (ii) a second input/output surface (114) optically coupled to the lid (102), the second input/output surface (114) orientated perpendicularly to the first input/output surface (112), and wherein the prism (104) provides an optical path and reflects a percentage of light from the first input/output surface (112) to the second input/output surface (114). Methods of manufacturing such an optical assembly are also provided.
    Type: Application
    Filed: January 6, 2022
    Publication date: March 7, 2024
    Inventors: Chia-Te Chou, William Vis, Alexander Gondarenko, Shuhe Li, David McCann, Haydn Frederick Jones, Alexander Fast
  • Publication number: 20240079884
    Abstract: A battery balancing system includes a voltage sensing unit, a characteristic voltage selector and a control unit. The voltage sensing unit senses a battery voltage of each of the batteries connected in series in a battery group and generates corresponding battery voltage sensing signals. The characteristic voltage selector generates a characteristic voltage according to the battery voltage sensing signals. The control unit compares the characteristic voltage with a threshold voltage in a balance operation mode, to adaptively adjust the threshold voltage, and compares the battery voltage sensing signal with the adjusted threshold voltage to generate a battery balancing command, thereby executing a charge removal balancing command or a charge supplying balancing command on the corresponding battery, or thereby cease executing the charge removal balancing command or cease executing the charge supplying balancing command on the corresponding battery.
    Type: Application
    Filed: July 23, 2023
    Publication date: March 7, 2024
    Inventors: Chung-Jen Chou, Chien-Chin Huang, Shih-Hsin Tseng
  • Publication number: 20240077085
    Abstract: A fan waterproof structure includes a frame body and a stator assembly to configure as two individual components. The frame body has a base seat and a circumferential wall. Multiple first support members horizontally extend from the base seat to connect with the circumferential wall. The stator assembly is disposed on the base seat and has an electrical wire. A waterproof plastic layer is disposed on the stator assembly to enclose the stator assembly. A second support member horizontally extends from the waterproof plastic layer to connect with the circumferential wall. The electrical wire is disposed in the second support member to achieve good waterproof effect.
    Type: Application
    Filed: April 26, 2023
    Publication date: March 7, 2024
    Inventors: Chiu-Hsien Chou, Sung-Wei Sun
  • Publication number: 20240074513
    Abstract: There is provided an aerosol provision device including at least one inlet through which air can enter the device; an outlet through which aerosol within the device can pass; at least one aerosol generating region arranged to generate an aerosol; at least one flow channel arranged to provide fluid communication between at least one inlet, the outlet and at least one aerosol generating region; a moveable component arranged to move between a number of predetermined positions including at least a first and a second position, wherein in the first position the moveable component at least partially blocks at least one flow channel and wherein in the second position the moveable component does not block airflow through at least one flow channel.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Inventors: Jared Aller, Matthew Hodgson, Ping Chou Chen
  • Publication number: 20240077656
    Abstract: An imaging lens assembly includes a first optical element and a low-reflection layer. The first optical element has a central opening, and includes a first surface, a second surface and a first outer diameter surface. The first outer diameter surface is connected to the first surface and the second surface. The low-reflection layer is located on at least one of the first surface and the second surface, and includes a carbon black layer, a nano-microstructure and a coating layer. The nano-microstructure is directly contacted with and connected to the carbon black layer, and the nano-microstructure is farther from the first optical element than the carbon black layer from the first optical element. The coating layer is directly contacted with and connected to the nano-microstructure, and the coating layer is farther from the first optical element than the nano-microstructure from the first optical element.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Inventors: Wen-Yu TSAI, Heng-Yi SU, Ming-Ta CHOU, Chien-Pang CHANG, Kuo-Chiang CHU
  • Publication number: 20240079485
    Abstract: A high electron mobility transistor device including a channel layer, a first barrier layer, and a P-type gallium nitride layer is provided. The first barrier layer is disposed on the channel layer. The P-type gallium nitride layer is disposed on the first barrier layer. The first thickness of the first barrier layer located directly under the P-type gallium nitride layer is greater than the second thickness of the first barrier layer located on two sides of the P-type gallium nitride layer.
    Type: Application
    Filed: October 27, 2022
    Publication date: March 7, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Jih-Wen Chou, Chih-Hung Lu, Bo-An Tsai, Zheng-Chang Mu, Po-Hsien Yeh, Robin Christine Hwang
  • Publication number: 20240076797
    Abstract: A susceptor assembly for supporting a crucible during a crystal growth process includes a susceptor base, a tubular sidewall connected to the susceptor base, and a removable sacrifice ring interposed between the susceptor base and the sidewall. Each of the susceptor base and the sidewall is formed of a carbon-containing material. The susceptor base has an annular wall and a shoulder extending radially outward from an outer surface of the annular wall. The sidewall has a first end that receives the annular wall to connect the sidewall to the susceptor base. The sacrifice ring has a first surface that faces the outer surface of the annular wall, a second surface that faces an interior surface of the sidewall, and a ledge extending outward from the second surface that engages the first end of the sidewall.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Inventors: Hong-Huei Huang, Benjamin Michael Meyer, Chun-Sheng Wu, Wei-Chen Chou, Chen-Yi Lin, Feng-Chien Tsai
  • Publication number: 20240079268
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
  • Publication number: 20240080452
    Abstract: A video encoder with quality estimation is shown. The video encoder has a video compressor, a video reconstructor, a quality estimator, and an encoder top controller. The video compressor receives the source data of a video to generate compressed data. The video reconstructor is coupled to the video compressor for generation of playback-level data that is buffered for inter prediction by the video compressor, wherein the video reconstructor generates intermediate data and, based on the intermediate data, the video reconstructor generates playback-level data. The quality estimator is coupled to the video reconstructor to receive the intermediate data. Quality estimation is performed based on the intermediate data rather than the playback-level data. Based on the quality estimation result, the encoder top controller adjusts at least one video compression factor in real time.
    Type: Application
    Filed: July 12, 2023
    Publication date: March 7, 2024
    Inventors: Tung-Hsing WU, Chih-Hao CHANG, Yi-Fan CHANG, Han-Liang CHOU
  • Publication number: 20240077657
    Abstract: An imaging lens assembly includes a first optical element and a low-reflection layer. The first optical element has a central opening, and includes a first surface, a second surface and a first outer diameter surface. The first outer diameter surface is connected to the first surface and the second surface. The low-reflection layer is located on at least one of the first surface and the second surface, and includes a carbon black layer, a nano-microstructure and a coating layer. The nano-microstructure is directly contacted with and connected to the carbon black layer, and the nano-microstructure is farther from the first optical element than the carbon black layer from the first optical element. The coating layer is directly contacted with and connected to the nano-microstructure, and the coating layer is farther from the first optical element than the nano-microstructure from the first optical element.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Inventors: Wen-Yu TSAI, Heng-Yi SU, Ming-Ta CHOU, Chien-Pang CHANG, Kuo-Chiang CHU
  • Publication number: 20240080498
    Abstract: The present disclosure is directed towards image processing circuitry that applies temporal filtering to video image data along motion trajectories in the video image data. The temporal filtering may be applied along motion trajectories in the image data, by filtering source pixels by reference pixel values and the refined motion vectors. The temporal filtering circuitry may fetch source and reference pixel values based on received motion vectors from an encoding pipeline. Additionally, the temporal filtering circuitry may include a motion vector refinement block along with a temporal filtering block, such that the video image data may be filtered based on refined motion vectors and source and reference pixel values.
    Type: Application
    Filed: January 25, 2023
    Publication date: March 7, 2024
    Inventors: Jae Young Park, Jaehong Chon, Jim C Chou, Athanasios Leontaris
  • Publication number: 20240075514
    Abstract: A rotary cable arranging tool is disclosed. The rotary cable arranging tool is used for untwisting a first and a second cable. The rotary cable arranging tool includes a first annular structure, a first and a second assembly member, and a first and a second hole. The first and the second holes are assembled by the cooperation of the first and the second assemblies so as to be pressed to change a width of an inner diameter. When the first and second cables are in a twisted state, the first and second assemblies are counter-rotated together, so that the first and the second cables are untwisted and enter the first and second holes respectively. Then the first and second holes are tightly combined with the first and second cables, and the first and the second cable are pulled out to be straightened.
    Type: Application
    Filed: February 3, 2023
    Publication date: March 7, 2024
    Inventors: Chien-Chou Liao, Mei-Fang Lin
  • Patent number: 11923294
    Abstract: An interconnect structure includes an etching stop layer, a dielectric layer and an insert layer and a conductive line. The insert layer is located between the etching stop layer and the dielectric layer. The conductive line extends through the dielectric layer, the insert layer, and the etching stop layer. A material of the insert layer is different from the dielectric layer and the etching stop layer.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chung-Chi Ko, Tze-Liang Lee
  • Patent number: D1017596
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: March 12, 2024
    Assignee: Acer Incorporated
    Inventors: Yun-Ju Chou, Pao-Ching Huang, Hsueh-Wei Chung
  • Patent number: D1017690
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: March 12, 2024
    Inventors: Tser Wen Chou, Mason Chou