Abstract: The present application discloses a semiconductor packaging structure and a manufacturing method of the same that could be commonly used for lead frame products and substrate products. The semiconductor packaging structure includes: a base layer (lead frame or organic substrate); a die, disposed on the base layer; a molding compound, filled over the base layer and surrounding the die; a shielding layer, covering the top surface and a side surface of the molding compound; and a bonding wire, having a first terminal and a second terminal, wherein the bonding wire extends the side surface of the molding compound, thus allowing the first terminal of the bonding wire to contact an inner side of the shielding layer.

Abstract: Signal transmission cables and serial interfaces with built-in signal boosting are provided. In some implementations, a signal transmission cable or interface for boosting signals comprises boosting circuitry. The boosting circuitry may comprise at least one boosting capacitor configured to be operatively coupled to a voltage supply during a charging phase and configured to be operatively coupled to the at least one line of a signal transmission cable or interface during a discharging phase, wherein, during the discharging phase, the at least one boosting capacitor boosts a voltage of the one or more signals transmitted on the at least one line. The boosting circuitry may comprise switching circuitry configured to switch the at least one boosting capacitor between from being operatively coupled to the voltage supply to being operatively coupled to the at least one line of the signal transmission cable or interface.

Abstract: The present technology is directed to determining an accuracy of an infrared (IR) camera, and more particularly, validating a distortion accuracy of an IR camera. The present technology can receive one or more images of a calibration harp captured by the IR camera, wherein the one or more images include a plurality of lines corresponding to a plurality of strings of the calibration harp. The present technology can further determine a degree of distortion of the plurality of lines based on a distortion error coefficient, wherein the distortion error coefficient is computed based on edge points of the plurality of lines on the one or more images.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.

Abstract: The disclosure is directed to a timing controller having a mechanism for frame synchronization, a display panel having the timing controller thereof, and a display system having the timing controller thereof. According to an aspect of the disclosure, the disclosure provides an integrated circuit which includes a timing controller to transmit a first TE signal to an application processor and receive a first image frame from the application processor after the application processor receives the first TE signal, and a control circuit to generate a first sync signal when the timing controller receives the first image frame, wherein when the application processor receives a second TE signal and the application processor is not ready to transmit a second image frame to the timing controller, the control circuit delays a first waiting period to generate a second sync signal.

Abstract: A method includes forming an interposer, which includes forming a rigid dielectric layer, and removing portions of the rigid dielectric layer. The method further includes bonding a package component to an interconnect structure, and bonding the interposer to the interconnect structure. A spacer in the interposer has a bottom surface contacting a top surface of the package component, and the spacer includes a feature selected from the group consisting of a metal feature, the rigid dielectric layer, and combinations thereof. A die-saw is performed on the interconnect structure.

Abstract: Briefly, in accordance with one or more embodiments, virtualized network function resources may be managed in a network. Performance measurements may be received for at least one mobility management entity (MME) in an MME pool, or for other network elements. If at least one of the performance measurements exceeds at least one predetermined threshold, instantiation of a new mobility management entity virtual network function (MME VNF) may be requested, and the MME VNF may be instantiated in response to the request. One or more user equipment (UE) devices managed by the MME pool may be connected to the added MME VNF.

Abstract: A driving method, for a controller in a display apparatus, is disclosed. The display apparatus includes LED strings, scan transistors, current regulators and a power converter. The driving method includes following steps. LED cathode voltages are detected on nodes between the LED strings and the current regulators. When a first LED cathode voltage corresponding to a first scanning channel is equal to a minimal operable voltage of the current regulators and a second LED cathode voltage corresponding to a second scanning channel exceeds the minimal operable voltage of the current regulators, a voltage drop over one corresponding scan transistor is increased on the second scanning channel.

Abstract: A method for detecting defects in a semiconductor device including singulating a die having a substrate including a circuit region and an outer border, a plurality of detecting devices disposed over the substrate and located between the circuit region and the outer border, a first probe pad and a second probe pad electrically connected to two ends of each detecting device, and a seal ring located between the outer border of the die and the detecting devices. The method further includes probing the first probe pad and the second probe pad to determine a connection status of the detecting device, and recognizing a defect when the connection status of the detecting device indicates an open circuit.

Abstract: A projection device, a projection system and a method for calibrating projected image are provided. The projection device and an external projection device the same image source and respectively project an image and another image corresponding to the image source. The same portion of the image source where the two images overlap each other forms an overlapping area. The projection device includes a lens, a light shielding member and a processor. The light shielding member is disposed on the lens. The processor controls the light shielding member to selectively shade a partial area of the lens according to the brightness of the image source, wherein the partial area corresponds to the overlapping area.

Abstract: A plastic lens element includes an optical effective portion and a peripheral portion. The peripheral portion surrounds the optical effective portion and includes a peripheral surface and an optical inspecting structure. The optical inspecting structure is disposed between the optical effective portion and the peripheral surface and includes a first optical inspecting surface and a second optical inspecting surface. The first optical inspecting surface and the second optical inspecting surface are disposed on two sides of the peripheral portion respectively and correspond to each other.

Abstract: An optical keyswitch includes a keycap, a support mechanism, and a switch module. The support mechanism is disposed below the keycap and configured to support the keycap moving upward and downward, the support mechanism comprising a first frame and a second frame, the first frame having a sliding end. The switch module includes a circuit board, an emitter, and a receiver, the emitter and the receiver are electrically connected to the circuit board, and the emitter emitting an optical signal to the receiver. When the keycap is pressed, the first frame is driven by the keycap to slide substantially parallel to the circuit board and block the optical signal with the sliding end, so the switch module is triggered to generate a triggering signal.

Abstract: A semiconductor tester and a method for calibrating a probe card and a device under testing (DUT) are disclosed. The semiconductor tester includes: a support platform, including a support surface and configured to be able to move along a direction parallel to the support surface and rotate around a rotating shaft perpendicular to the support surface; a probe card including a plurality of probes stretching towards the support platform; and an alignment assembly, including: at least two first laser emitting apparatuses emitting a plurality of first laser beams; and a second laser emitting apparatus emitting a plurality of second laser beams. The first laser beams and the second laser beams are perpendicular to each other and are each arranged sequentially along a direction perpendicular to the support surface. The semiconductor tester aligns a probe card to a DUT with improved accuracy, thereby preventing the damage to the probe card.

Abstract: A sensor switch includes abase unit having bottom, top and intermediate layer assemblies cooperatively defining a receiving space. One of the bottom, top and intermediate layer assemblies has a mounting surface. A sensor unit is disposed in the receiving space and includes a light emitter, a light receiver, and a rolling member for changing the amount of light received by the light receiver. A conducting unit includes a power supply section, a power supply conducting element disposed on the mounting surface, and a signal conducting element disposed on the mounting surface and spaced apart from the power supply conducting element.

Abstract: A light-emitting device is applicable to a backlight module. The light-emitting device includes a substrate, a light-emitting diode (LED) and an encapsulation body. The encapsulation body is on the substrate and covers the LED. The encapsulation body includes a base and a lens. The base has a base surface. The lens has a lens surface. The lens surface conforms to a cubic Bezier curve. The cubic Bezier curve has a start point and an end point. The start point of the cubic Bezier curve is at the base surface. The end point of the cubic Bezier curve corresponds to the center of the LED. The lens surface is provided with a concave portion at the end point. The lens increases the light-emitting angle of the LED, so that the spacing between light-emitting devices can be increased, thereby reducing the number of light-emitting devices to be used and the costs.

Abstract: An optical system is provided and includes a fixed assembly, an optical module, a first movable assembly and a first driving assembly. The optical module has an optical axis. The first movable assembly is configured to be connected to the optical module. The first driving assembly is configured to drive the first movable assembly to move relative to the fixed assembly, and a gap is formed between the first movable assembly and the fixed assembly.

Abstract: A method for making a middle-of-line interconnect structure in a semiconductor device includes forming, near a surface of a first interconnect structure comprised of a first metal, a region of varied composition including the first metal and a second element. The method further includes forming a recess within the region of varied composition. The recess laterally extends a first distance along the surface and vertically extends a second distance below the first surface. The method further includes filling the recess with a second metal to form a second interconnect structure that contacts the first interconnect structure.

Abstract: The present disclosure provides GLP-1R agonists, and compositions, methods, and kits thereof. Such compounds are generally useful for treating a GLP-1R mediated disease or condition in a human.

Abstract: A method for manufacturing an ultra-thin glass substrate includes: providing a glass base material preset with n substrate areas and a skeleton area surrounding the substrate areas; at least forming an etching protection layer on an upper surface and a lower surface of each substrate area of the glass base material, respectively; at least etching the skeleton area of the glass base material to separate the substrate areas from the glass base material, and form a stress dissipation edge along an edge of each substrate area; and removing the etching protection layer to get independent glass substrates. A method for manufacturing a display panel is also disclosed. An aim is to prevent quality of the ultra-thin glass substrate from damage caused by scribing wheel cutting or laser cutting, therefore the quality of the ultra-thin glass substrate is improved.