Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11856635
    Abstract: A method for Radio Access Network (RAN) Notification Area (RNA) management for a user equipment (UE) is provided. The method receives a first Radio Resource Control (RRC) message having a first Radio Access Network (RAN) Notification Area (RNA) configuration. The method then stores the first RNA configuration, when the UE is in one of an RRC Connected state, an RRC Inactive state, or transitioning between the RRC Inactive state and the RRC Connected state. The method applies an RNA update procedure based on the first RNA configuration when the UE is in the RRC Inactive state.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: December 26, 2023
    Assignee: FG Innovation Company Limited
    Inventors: Yung-Lan Tseng, Chie-Ming Chou, Hung-Chen Chen
  • Patent number: 11855159
    Abstract: Various embodiments of the present application are directed to a method for forming a thin semiconductor-on-insulator (SOI) substrate without implantation radiation and/or plasma damage. In some embodiments, a device layer is epitaxially formed on a sacrificial substrate and an insulator layer is formed on the device layer. The insulator layer may, for example, be formed with a net charge that is negative or neutral. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates. The sacrificial substrate is removed, and the device layer is cyclically thinned until the device layer has a target thickness. Each thinning cycle comprises oxidizing a portion of the device layer and removing oxide resulting from the oxidizing.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ta Wu, Chia-Shiung Tsai, Jiech-Fun Lu, Kuo-Hwa Tzeng, Shih-Pei Chou, Yu-Hung Cheng, Yeur-Luen Tu
  • Patent number: 11852848
    Abstract: An imaging lens assembly includes a first optical element and a low-reflection layer. The first optical element has a central opening, and includes a first surface, a second surface and a first outer diameter surface. The first outer diameter surface is connected to the first surface and the second surface. The low-reflection layer is located on at least one of the first surface and the second surface, and includes a carbon black layer, a nano-microstructure and a coating layer. The nano-microstructure is directly contacted with and connected to the carbon black layer, and the nano-microstructure is farther from the first optical element than the carbon black layer from the first optical element. The coating layer is directly contacted with and connected to the nano-microstructure, and the coating layer is farther from the first optical element than the nano-microstructure from the first optical element.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: December 26, 2023
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Wen-Yu Tsai, Heng-Yi Su, Ming-Ta Chou, Chien-Pang Chang, Kuo-Chiang Chu
  • Patent number: 11856669
    Abstract: A driving method, for a controller in a display apparatus, is disclosed. The display apparatus includes LED strings, scan transistors, current regulators and a power converter. The driving method includes following steps. LED cathode voltages are detected on nodes between the LED strings and the current regulators. When a first LED cathode voltage is equal to a minimal operable voltage of the current regulators and a second LED cathode voltage exceeds the minimal operable voltage of the current regulators, a driving current flowing through the second data channel is adjusted by increasing a pulse current level of the driving current and reducing a duty cycle ratio of the driving current flowing through the second data channel.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: December 26, 2023
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Jhih-Siou Cheng, Chih-Hsien Chou, Ren-Chieh Yang
  • Patent number: 11855178
    Abstract: A semiconductor device is provided. The semiconductor device includes a fin protruding from a semiconductor substrate and a gate structure formed across the fin. The semiconductor device also includes a gate spacer formed over a sidewall of the gate structure. The gate spacer includes a sidewall spacer and a sealing spacer formed above the sidewall spacer. In addition, an air gap is vertically sandwiched between the sidewall spacer and the sealing spacer. The semiconductor device further includes a hard mask formed over the gate structure and covering a sidewall of the sealing spacer.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hsiung Lin, Pei-Hsun Wang, Chih-Chao Chou, Chia-Hao Chang, Chih-Hao Wang
  • Patent number: 11855091
    Abstract: The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed over the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Kong-Beng Thei, Ming Chyi Liu, Shih-Chung Hsiao, Jhih-Bin Chen
  • Patent number: 11850823
    Abstract: An electronic device is provided. The electronic device includes a display, a substrate, and an anti-explosion layer. The substrate is disposed on the display. The anti-explosion layer is disposed between the substrate and the display, and the anti-explosion layer has a tensile strength in a range from 10 MPa to 30 MPa.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: December 26, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Chao-Li Chuang, Hsin-Wei Huang, Ming-Chi Guo, Chih-Yen Lu, Kuan-Chou Chen
  • Patent number: 11855059
    Abstract: Structures and methods of forming fan-out packages are provided. The packages described herein may include a cavity substrate, one or more semiconductor devices located in a cavity of the cavity substrate, and one or more redistribution structures. Embodiments include a cavity preformed in a cavity substrate. Various devices, such as integrated circuit dies, packages, or the like, may be placed in the cavity. Redistribution structures may also be formed.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hao Tsai, Techi Wong, Po-Yao Chuang, Shin-Puu Jeng, Meng-Wei Chou, Meng-Liang Lin
  • Patent number: 11854819
    Abstract: The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hao Fu, Hung-Ju Chou, Che-Lun Chang, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Nung-Che Cheng, Chunyao Wang
  • Patent number: 11856870
    Abstract: A magnetoresistive random access memory (MRAM) structure includes a magnetic tunnel junction (MTJ), and a top electrode which contacts an end of the MTJ. The top electrode includes a top electrode upper portion and a top electrode lower portion. The width of the top electrode upper portion is larger than the width of the top electrode lower portion. A bottom electrode contacts another end of the MTJ. The top electrode, the MTJ and the bottom electrode form an MRAM.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: December 26, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Yi-Syun Chou, Ko-Wei Lin, Pei-Hsun Kao, Wei Chen, Chia-Fu Cheng, Chun-Yao Yang, Chia-Chang Hsu
  • Patent number: 11852892
    Abstract: A lens assembly module includes a base, a cover, a lens unit, an elastic element, at least two conductive elements, at least one AF coil element and at least two first magnetic elements. The cover is coupled to the base. The lens unit is movably disposed in the cover. The elastic element is coupled to the lens unit. The conductive elements are coupled to the lens unit. The AF coil element is disposed on the lens unit, and two ends of the AF coil element are electrically connected to the conductive elements, respectively. The first magnetic elements are disposed in the cover. A part of each of the inner portions is overlapped along a direction parallel to an optical axis and electrically connected to each conductive element. The AF coil element and the conductive elements are electrically connected by a welding method.
    Type: Grant
    Filed: September 6, 2022
    Date of Patent: December 26, 2023
    Assignee: LARGAN DIGITAL CO., LTD.
    Inventors: Te-Sheng Tseng, Wen-Hung Hsu, Ming-Ta Chou, Hao-Jan Chen
  • Patent number: 11852887
    Abstract: A camera module includes a metal yoke, a holding base, a plastic barrel, a plurality of plastic lens elements, a leaf spring pair and a coil element. The holding base is connected to the metal yoke and defines an inner space. The holding base has a through hole which is corresponding to an opening of the metal yoke. The plastic barrel is movably disposed in the inner space. The plastic lens elements are disposed in the plastic barrel. The leaf spring pair includes two leaf springs which are located on a same plane and connected to the plastic barrel. The coil element surrounds an outer surface of the plastic barrel and electrically connected to the leaf spring pair, wherein two ends of the coil element is connected to the leaf springs by a thermal pressing method.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: December 26, 2023
    Assignee: LARGAN DIGITAL CO., LTD.
    Inventors: Te-Sheng Tseng, Ming-Ta Chou, Wen-Hung Hsu
  • Patent number: 11853130
    Abstract: A linked hinge mechanism includes a first member, a second member, a hinge unit and a passive unit. The hinge unit is connected to the first member and the second member, wherein the first member is adapted to be rotated relative to the second member via the hinge unit. The passive unit is adapted to be moved by the movement of the hinge unit, wherein the passive unit is adapted to be rotated by the movement of the hinge unit in only a portion of the whole rotation range of the hinge unit.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: December 26, 2023
    Assignee: WISTRON CORP.
    Inventors: Kuan-Te Yu, Chia-Lian Yen, Po-Han Huang, Kevin Jang, Chih-Sheng Chou
  • Publication number: 20230406744
    Abstract: A method for treating a waste liquid comprises: step (A), adding a precursory oxidant to a waste liquid having a temperature of 25-70° C.; wherein, the precursory oxidant is hydrogen peroxide or sodium percarbonate, and in mg/L, a ratio of the precursory oxidant/the total amount of sulfide is 2.20 to 6.37; step (B), mixing an advanced oxidant and the waste liquid after step (A); wherein, the advanced oxidant is sodium persulfate or potassium persulfate, and in mg/L, a ratio of the advanced oxidant/COD after step (A) is 7.63 to 33.27; step (C), using UV illumination method to illuminate the oxidant dissolved in the waste liquid after step (B), and aerated with oxygen-containing gas. By the above-described method, it can achieve the purpose of sulfide conversion and degradation and removal of organic pollution composition under the condition free of the generation of H2S.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 21, 2023
    Inventors: YI-FONG HUANG, SHIH-YUEN CHANG, PO-JEN CHIANG, I-CHENG CHOU, MAO-YUAN TU, YIH-PING WANG
  • Publication number: 20230411566
    Abstract: A light emitting device is provided. The device includes a red light emitting unit, a blue light emitting unit, a green light emitting unit, and a white light emitting unit. The red light emitting unit includes a first blue light emitting chip and a red fluorescent material, and a dominant wavelength of a light emitted by the red light emitting unit is in a range of 615 nanometers (nm) to 635 nm. By designing the light emitting device into a structure including the red light emitting unit, the blue light emitting unit, the green light emitting unit and the white light emitting unit, and designing the structure of the red light emitting unit, the light emitting device can realize the adjustment of ambient light and color temperature by the four light emitting units, thereby reducing cost.
    Type: Application
    Filed: April 13, 2023
    Publication date: December 21, 2023
    Inventors: JINGQIONG ZHANG, YEHYIN CHOU
  • Publication number: 20230412201
    Abstract: A transmitter includes an analog transmission circuit, a power amplifier, a voltage detector, a comparator, and a control circuit. The analog transmission circuit is configured to provide a first gain to a first analog signal, so as to generate a second analog signal. The power amplifier is configured to provide a second gain to the second analog signal, so as to generate an output signal to an antenna. The voltage detector is configured to detect a voltage level of the second analog signal. The comparator is configured to generate an indication signal according to the voltage level and a reference level. The control circuit is configured to adjust the first gain of the analog transmission circuit according to the indication signal.
    Type: Application
    Filed: May 16, 2023
    Publication date: December 21, 2023
    Inventor: CHIEN-I CHOU
  • Publication number: 20230408762
    Abstract: A photonic system includes a waveguide. The photonic system further includes a micro ring modulator (MRM) spaced from the waveguide. The photonic system further includes a heater configured to increase a temperature of the MRM in response to the heater receiving a first voltage. The photonic system further includes a cooling element configured to decrease a temperature of the MRM in response to the cooling element receiving a second voltage.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 21, 2023
    Inventors: Lan-Chou CHO, Stefan RUSU
  • Publication number: 20230408578
    Abstract: A benchmark device and a method for evaluating a semiconductor wafer are provided. The benchmark device includes a first grating coupler, a second grating coupler and a waveguide. The waveguide has a least one bending section and is arranged in communication with the first grating coupler and the second grating coupler. The bending section comprises a first region having a first width and a first height, and a second region having a second width and a second height, wherein the first region is surrounded by the second region, and the second width decreases gradually from a first end of the bending section to a second end of the bending section.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 21, 2023
    Inventors: LAN-CHOU CHO, CHEWN-PU JOU, STEFAN RUSU
  • Publication number: 20230410705
    Abstract: An electronic device includes: a substrate, a signal line, a detection line and a detection unit. The substrate has a peripheral area and a substrate edge. The signal line is disposed on the substrate, and the signal line is located in the peripheral area. The detection line is disposed on the substrate, and is adjacent to the signal line. The detection unit is electrically connected to the detection line. Wherein, the detection line is disposed between the signal line and the substrate edge, and the detection line and the signal line are electrically insulated.
    Type: Application
    Filed: April 19, 2023
    Publication date: December 21, 2023
    Inventors: Chia-Min YEH, Hsieh-Li CHOU, Cheng-Tso CHEN
  • Patent number: D1008715
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: December 26, 2023
    Assignee: Botrista Technology, Inc.
    Inventors: Yu-Min Lee, Carl Johan Uno Hagerling, Wu-Chou Kuo