Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6327056
    Abstract: An image scanner with an image correction function generates a primary image and an auxiliary image of a document. The image scanner includes an image sensing module, a lens module, a scanning platform, a primary light source and an auxiliary light source. The primary light source illuminates the document from a first optical angle and the auxiliary light source illuminates the document from a second optical angle. During alternate illumination by the primary and auxiliary light sources, the scanner respectively generates two images for each document, one of which is a primary image and the other of which is an auxiliary image. The auxiliary image, which includes information concerning damage to the document, is used to correct the primary image, either transmitting the images to a host for further processing, or by processing the images within the scanner.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: December 4, 2001
    Assignee: Microtek International Inc.
    Inventors: Chi-pin Tsai, Hung-chou Chiu
  • Patent number: 6327533
    Abstract: A method and apparatus for continuously locating moveable objects is presented. In one or more embodiments of the present invention, moving objects can be tracked in real-time anywhere in the world, including inside tunnels. A smart mobile unit in the object receives and uses GPS satellite positioning data when available and relies on its built-in autonomous navigation capability when GPS is invalid to continuously determine its current position in map-ready units. The smart mobile unit transmits the position output, using an automatically selected wireless mode of communication, to a central processing station for map generation and display processing. Authorized clients may log onto the central processing station to view the object or multiple objects from anywhere in the world; all that is required is a computer equipment with a display device and a web browser.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: December 4, 2001
    Assignee: Geospatial Technologies, Inc.
    Inventor: Yue-Hong Chou
  • Patent number: 6325400
    Abstract: A treadle-type vehicle body forward drive structure comprised of a base plate, a transmission assembly and a treadle structure installed onto the base plate, a gear assembly enmeshing the transmission assembly to the treadle structure, and a position limiting plate that maintains the position of the drive structure on the base plate, with the extending ends of the transmission assembly follower shaft installed to the wheel hubs of the vehicle body rear wheels. When the treadle rod is tamped slightly downwards, a slant-cut fan gear of the treadle structure causes a slant-cut gear and a straight-cut gear of the gear assembly to synchronously rotate, at which time since the straight-cut gear of the gear assembly is enmeshed with a straight-cut gear of the transmission assembly, they in combination cause the rotation of the follower shaft and, furthermore, the synchronous rotation of the rear wheels. As such, the user is provided riding pleasure and options.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: December 4, 2001
    Inventor: Chin-Chou Lai
  • Publication number: 20010047245
    Abstract: Structural and stratigraphic discontinuities are identified in a 3-D volume of seismic data samples, by first selecting a plurality of directions containing a primary direction and at least one secondary direction. Next, one-dimensional, two-trace first discontinuity values are calculated along the primary direction for each seismic data sample in the 3-D data volume. Next, a series of sequentially less restrictive thresholds is defined, such that a significant portion, preferably at least approximately 10%, of the first discontinuity values satisfy the first threshold. This significant portion of first discontinuity values is then stored in an output discontinuity volume at the corresponding sample locations. The following steps are repeated for each remaining data sample until that sample has a value stored at the corresponding sample location in the output discontinuity volume.
    Type: Application
    Filed: April 6, 2001
    Publication date: November 29, 2001
    Inventors: Yao-Chou Cheng, Brian P. West, Alan E. Schwartzbard, John A. Farre
  • Publication number: 20010045608
    Abstract: A method for forming a high-speed device in an integrated circuit is disclosed. The approaches include reduction of gate-size and cutback on device capacitance and resistance. In the present invention, poly-trench etching followed by silicone selective growth and dielectric spacer formation are used to define gate length. A reduced gate size is therefore obtained. As with a dielectric buffer layer positioned below the source and drain regions, the proposed device possesses a largely decreased junction capacitance area. The design of air-gap spacer is to cut down on the overlap capacitance between gate and source/drain. Finally, with the application of raised polysilicon source and drain layers to behave as silicide consumption layer and the utilization of the buffer layer to provide diffusion protection, the silicide layer can be thickly formed to reduce sheet resistance without any increment on the junction leakage current.
    Type: Application
    Filed: December 29, 1999
    Publication date: November 29, 2001
    Inventors: HUA-CHOU TSENG, TONY LIN
  • Publication number: 20010047492
    Abstract: An uninterruptible power supply (UPS) is electrically coupled to a main board, a hard disk and a power supply of the computer. The UPS comprises a power detection circuit for detecting a power supplying state of the power supply when the computer is halting, a power management circuit for receiving a blackout signal sent from the power detection circuit when a blackout in the power supply is detected, and a power switch circuit is commanded by the power management circuit to switch power of the main board and the hard disk from the power supply to the rechargeable battery for maintaining a normal operation. At the same time, the power management circuit sends a power ready signal to the main board through a power switch on the main board to cause CPU to boot the computer normally and the CPU commands to store temporary data and programs in the memory in the hard disk. Such safely stored data and programs may be retrieved from hard disk by CPU for use when computer is powered on again.
    Type: Application
    Filed: May 10, 2001
    Publication date: November 29, 2001
    Inventors: Chia-Chi Tsui, Tung-Chou Hsieh
  • Patent number: 6323073
    Abstract: An SOI layer has a dielectric layer and a silicon layer formed on the dielectric layer. A shallow trench isolation structure is formed on the silicon layer. The STI structure passes through to the dielectric layer. A thermal diffusion process is performed to drive dopants into a first region of the silicon layer so as to form an N-well or P-well doped region. Next, a thermal diffusion process is performed to drive dopants into a second region of the silicon layer so as to form a P-well or N-well doped region. Finally, an epitaxy layer, having a thickness of about 200 angstroms, is grown on the surface of the silicon layer by way of a molecular-beam epitaxy (MBE) growth process, a liquid-phase epitaxy (LPE) growth process, or a vapor-phase epitaxy (VPE) growth process.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: November 27, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Wen-Kuan Yeh, Hua-Chou Tseng, Jiann Liu
  • Patent number: 6324092
    Abstract: A random access memory cell. The RAM cell includes a first transistor and a second transistor. A control gate of the first transistor is coupled to a control signal line. A data read terminal of the first transistor is coupled to a data read line. An earth terminal of the first transistor is connected to a ground. A floating gate terminal of the first transistor is located between a portion of a substrate and a portion of the control gate. A control gate of the second transistor is also coupled to the control signal line. The data write terminal of the second transistor is a data write line. A data transmission terminal of the second transistor is coupled to the floating gate of the first transistor. To write data into the RAM cell, a write control voltage is applied to the control signal line. Similarly, to read data from the RAM cell, a read control voltage is applied to the control signal line. The write control voltage is greater than the read control voltage.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: November 27, 2001
    Assignee: Macronix International Co., Ltd.
    Inventors: Fuh-cheng Jong, Ming-Hung chou, Kent Kuohua Chang
  • Patent number: 6322942
    Abstract: A xerographic photoreceptor primarily formed by amorphous silicon material is disclosed, wherein the xerographic photoreccptor is a photosensitive drum used in copying and manufactured by the plasma enhanced low pressure chemical vapor deposition system. Such a drum has a higher resolution, and a longer lifetime. In this structure, an Al2O3 oxidization layer is grown on an aluminum substrate. Then a n type hydrogenated amorphous silicon blocking layer is grown on the aluminum substrate with Al2O3 oxidization layer. Then an intrinsic hydrogenated amorphous silicon charge generating transmission layer is grown on the n type hydrogenated amorphous silicon blocking layer. Finally a hydrogenated amorphous carbon surface protecting layer is grown on the intrinsic hydrogenated amorphous silicon charge generation transport layer for forming a xerographic photoreceptor with a multiple layer structure.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: November 27, 2001
    Assignee: National Science Council of Republic of China
    Inventors: Jung-Chuan Chou, Hsu-Ying Yang, Chau-Yun Jen
  • Publication number: 20010042734
    Abstract: Methods of planarizing structures formed on the surfaces of substrates and wafers are disclosed. The methods form a planarizing layer over the surface and the structures, or the locations where the structures are to be formed, such that the top surface of the layer has low areas between the locations of the structures, and such that the low areas lie substantially within a plane which is below the tops of the structures. A polish-stop layer is thee formed over the low areas of the planarizing layer, the polish-stop layer being more resistant to polishing than the planarizing layer and, preferably, the structures. The resulting surface is then polished. The polishing may be accomplished by, for example, standard mechanical polishing, and chemical-mechanical polishing.
    Type: Application
    Filed: June 12, 2001
    Publication date: November 22, 2001
    Inventors: Solomon I. Beilin, Michael G. Lee, William T. Chou, Larry Louis Moresco, Wen-Chou Vincent Wang
  • Patent number: 6318863
    Abstract: An illumination device and an image projection apparatus having the same. The illumination device has a light source with multiple light emitting devices and an uniform illuminating means evenly distributed in front of the light source. The light emitted from the light source can thus uniformly project on a light valve. In addition, a polarization converter is used to convert the light into a usable polarization type, so as to increase the illumination efficiency. The image projection apparatus basically has three of the above mentioned illumination devices to emit three elementary color lights projecting onto a screen.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: November 20, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Kuo-Tung Tiao, Fu-Ming Chuang, Jinn-Chou Yoo, Sheng-Hsiung Chan, Tzeng-Ke Shiau
  • Patent number: 6320129
    Abstract: This invention provides a method for making an electrode film for a composite polymer material. A composite plating method is used to form a conductive plate film with microrough surface of 0.01 to 100 microns which will be adhered to a composite polymer material, enhances the adhering performance and reduces the interface electrical resistance.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: November 20, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Shu-Chin Chou, Kun-Huang Chang, Chen-Ron Lin
  • Patent number: 6318259
    Abstract: An apparatus and method for supplying emulsion ink to a printing plate on a printing press is disclosed. The apparatus includes an ink feed and recirculation system and associated control system to quickly and reliably form a high quality emulsion ink. The control system utilizes both feedback and feedforward control strategies. The recirculation of the emulsion ink ensures that the emulsion ink remains stable and makes it possible to reformulate the emulsion ink, if necessary, without waiting for the exhaustion of all of the emulsion ink that is in need of reformulation.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: November 20, 2001
    Assignee: Graphic Systems, Inc.
    Inventors: Shem-Mong Chou, Thaddeus A. Niemero, Xin Xin Wang, Thomas W. Orzechowski, Joseph Vucko
  • Patent number: 6316630
    Abstract: The present invention provides convergent processes for preparing epothilone A and B, desoxyepothilones A and B, and analogues thereof, useful in the treatment of cancer and cancer which has developed a multidrug-resistant phenotype. Also provided are intermediates useful for preparing said epothilones.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: November 13, 2001
    Assignee: Sloan Kettering Institute for Cancer Research
    Inventors: Samuel J. Danishefsky, Peter Bertinato, Dai-Shi Su, DongFang Meng, Ting-Chao Chou, Ted Kamenecka, Erik J Sorensen, Aaron Balog, Kenneth A. Savin
  • Patent number: 6316321
    Abstract: A method for forming MOSFET is disclosed. The method includes firstly providing a substrate, on which a gate without spacer is already formed. A first spacer is formed on sidewall of the gate, a lightly doped drain is subsequently formed in the substrate. Next, a second spacer is formed on the first spacer. Finally, a heavily doped drain is formed in the substrate. The present invention can enhance stability of resistance of the gate and reduce pollution of the machine. Therefore, quality and efficiency of the fabrication of MOSFET will be enhanced.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: November 13, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Yung-Chang Lin, Jih-Wen Chou, Tung-Po Chen
  • Patent number: 6316365
    Abstract: The present invention provides a method for chemically-mechanically polishing a substrate comprising tantalum and a conductive metal (other than tantalum). The method comprises (a) applying to the substrate a conductive metal-selective polishing composition and a metal oxide abrasive, (b) selectively removing at least a portion of the conductive metal as compared to the tantalum from the substrate, (c) applying to the substrate a tantalum-selective polishing composition and a metal oxide abrasive, and (d) removing at least a portion of the tantalum as compared to the conductive metal from the substrate. In one embodiment, the conductive metal-selective polishing composition is any such polishing composition, and the tantalum-selective polishing composition comprises a persulfate compound and a passivation film-forming agent for the conductive metal.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: November 13, 2001
    Assignee: Cabot Microelectronics Corporation
    Inventors: Shumin Wang, Homer Chou
  • Patent number: 6317314
    Abstract: A housing for a module unit of a portable computer includes a surrounding wall member and a cover member. The surrounding wall member includes a rectangular surrounding wall, and a partition disposed in and spanning a rectangular area confined by the surrounding wall. The partition cooperates with the surrounding wall to form a first receiving space with a first open end, and a second receiving space with a second open end. The partition is formed with an opening for intercommunicating the first and second receiving spaces. The cover member is formed separately from and is mounted on the surrounding wall member at the first open end of the first receiving space to cover the first receiving space. The first receiving space is adapted to receive a circuit board therein. The second receiving space is adapted to receive the module unit therein.
    Type: Grant
    Filed: March 13, 2000
    Date of Patent: November 13, 2001
    Assignee: Compal Electronics, Inc.
    Inventors: Shao-Tsu Kung, Ming-Hsun Chou
  • Patent number: 6315534
    Abstract: An air compressor includes a pressure gage attached to a cylinder housing, a compression device having a piston container slidably received in the cylinder housing for supporting a compression valve and a positioning block and a valve piece and a limiting piece. A motor is secured to a seat. A gear is rotatably secured to the seat and driven by the motor and includes a weight pivotally coupled to the piston container with a link. The elements may be secured onto the cylinder housing and the seat separately before the seat is secured to the cylinder housing.
    Type: Grant
    Filed: December 11, 1999
    Date of Patent: November 13, 2001
    Inventor: Wen San Chou
  • Patent number: D450907
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: November 20, 2001
    Assignee: Gamemax Corporation
    Inventor: Shang-Ter Chou
  • Patent number: D451244
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: November 27, 2001
    Inventors: Huang-Wen Chen, Suz-Chou Yang