Abstract: A method of forming a semiconductor device includes forming photodiodes extending from a front-side surface of a semiconductor layer into the semiconductor layer; forming transistors on the front-side surface of the semiconductor layer; forming an interconnect structure over the transistors, the interconnect structure comprising an inter-metal dielectric and metal lines in the inter-metal dielectric; etching first regions of a backside surface of the semiconductor layer to form trenches in the semiconductor layer and non-overlapping the photodiodes; after forming the trenches, etching second regions of the backside surface of the semiconductor layer to form pits in the semiconductor layer and overlapping the photodiodes; and depositing a dielectric material in the trenches and the pits.

Abstract: Systems and methods reduce a locking time of a type-II all-digital phase-locked loop (ADPLL) circuit by performing steps that comprise receiving a reference signal having a reference frequency and setting a digitally controlled oscillator (DCO) to a target frequency greater than the reference frequency. The DCO generates an output signal that is used to generate a feedback signal. A time-to-digital converter is used to determine an initial phase difference between the reference signal and the feedback signal, and a digital initial phase compensation circuit adjusts the initial phase difference to a substantially zero phase difference to reduce the locking time of the ADPLL circuit such that the ADPLL circuit reaches a steady-state condition in ten or fewer cycles of the reference signal.

Abstract: A semiconductor structure and its manufacturing method are provided. The semiconductor structure includes a substrate, a first dielectric layer on the substrate, a second dielectric layer on the first dielectric layer, a seal ring structure including first and second interconnect structures, and a passivation layer on the seal ring structure and the second dielectric layer. The first interconnect structure is located in the first dielectric layer. The second interconnect structure is located in the second dielectric layer and connected to the first interconnect structure. The passivation layer has a spacer portion covering a sidewall of the second dielectric layer and a portion of the first dielectric layer. A ditch exists in the passivation layer and the first dielectric layer. The spacer portion is located between the ditch and the seal ring structure. The semiconductor structure is able to reduce time and power of an etching process for forming the ditch.

Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. The lenticular lenses may be configured to enable stereoscopic viewing of the display such that a viewer perceives three-dimensional images. To mitigate jaggedness in a curved edge of the active area, control circuitry may modify input pixel data for the display using dimming factors. Each brightness value of the pixel data may be multiplied by a corresponding dimming factor such that the curved edge has a smooth appearance. Each physical pixel in the display may have an associated perceived pixel that is based on an appearance of that physical pixel through the lenticular lens film. The perceived pixel may have a different footprint than its corresponding physical pixel. The dimming factors for boundary smoothing in the curved edges may be based on the perceived pixels.

Abstract: An imaging lens assembly includes a plurality of optical lens elements, a single-piece-formed light blocking sheet and a lens barrel. The lens barrel has a circular light-passing hole corresponding to the plurality of optical lens elements and the single-piece-formed light blocking sheet. The single-piece-formed light blocking sheet has a central aperture corresponding to the lens barrel and the plurality of optical lens elements. A maximum aperture diameter is defined by the central aperture. The single-piece-formed light blocking sheet comprises a plurality of light blocking structures surrounding and disposed adjacent to the central aperture. A minimum inner radius of the central aperture is defined near the center of each of the light blocking structures.

Abstract: A method for treating tinnitus includes the steps of: determining a tinnitus frequency of a patient; selecting a plurality of therapeutic tones which is a descending Shepard scale that includes the tinnitus frequency of the patient and other frequencies ranging from an octave higher than the tinnitus frequency to an octave lower than the tinnitus frequency; and subjecting the patient to several cycles of a stimulation pulse training in which the patient listens to the therapeutic tones played repetitively with a pause between every two cycles, each of the therapeutic tones being played for a time period of 500 milliseconds, one of the therapeutic tones matching the tinnitus frequency of the patient occurring randomly once after stimulus at the beginning of the pause in every four cycles, so as to reduce the patient's perception to tinnitus.

Abstract: An imaging lens module includes an optical element holder being one-piece formed, a lens element and a light folding component corresponding to the lens element. Each of two side surfaces of the optical element holder has a light through hole, and light passes through the optical element holder via the light through holes. The optical element holder includes a lens element accommodation portion and a folding component accommodation portion respectively for the lens element and the light folding component to be disposed therein. The light folding component includes a light receive surface, a first reflection surface and a light exit surface. The light enters the light folding component from the light receive surface, the first reflection surface is configured to reflect the light coming from the light receive surface so as to redirect the light, and the light exits the light folding component from the light exit surface.

Abstract: The present disclosure provides a polyester and a molded article. The polyester includes residues of formula (i), formula (ii), formula (iii), and formula (iv): in which R1 is an aromatic group, R2 is a C2-C6 straight-chain hydrocarbon group, * represents a linking bond. Based on 100 mol% of a sum of the residues of the formula (ii), the formula (iii) and the formula (iv), a content of the residue of the formula (iii) ranges from 50 mol% to 85 mol%, and the residue of the formula (iv) ranges from 12 mol% to 40 mol%.

Abstract: A safety cord tilter, in which two cords of the cord tilter for controlling opening or closing of the blind slats are exposed outside the headrail by a length set within a safety length range. The rear ends of the two cords are respectively connected with a first pull rod and a second pull rod for pulling the cords. When the first and second pull rods are used to control opening or closing of the blind slats, the first pull rod or the second pull rod reaches the blind rail at the top end, whereby the allowable exposed lengths of the pulled-out cords will not exceed the safety range so as to shorten the exposed length of the cords. This prevents a child from playing with the cords and twisting the cords around the neck and achieves safety effect.

Abstract: A metal light blocking element includes an outer diameter surface, a first annular surface, a second annular surface and an anti-reflecting layer. The outer diameter surface surrounds the metal light blocking element. The first annular surface is disposed opposite to the outer diameter surface, and the first annular surface is closer to a central axis than the outer diameter surface to the central axis. The second annular surface is disposed opposite to the outer diameter surface, the second annular surface is closer to the central axis than the outer diameter surface to the central axis, and the first annular surface is connected to the second annular surface to form a minimum opening structure. The anti-reflecting layer is disposed on the first annular surface and the second annular surface, and includes a light absorbing layer and a nanostructure layer. The nanostructure layer is disposed on the light absorbing layer.

Abstract: One aspect of the present invention is to provide systems and methods that improve the accuracy of an assay that comprise at least one or more parameters each having a random error.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor having a photodetector disposed within a semiconductor substrate. A dielectric structure is disposed on a first side of the semiconductor substrate. An isolation structure extends from the dielectric structure into the first side of the semiconductor substrate. The isolation structure laterally wraps around the photodetector and comprises an upper portion disposed above the first side of the semiconductor substrate and directly contacting sidewalls of the dielectric structure. The isolation structure comprises a first material different from a second material of the dielectric structure.

Abstract: A semiconductor structure includes a source/drain (S/D) feature disposed in a semiconductor layer, a metal gate stack (MG) disposed in a first interlayer dielectric (ILD) layer and adjacent to the S/D feature, a second ILD layer disposed over the MG, and an S/D contact disposed over the S/D feature. The semiconductor structure further includes an air gap disposed between a sidewall of a bottom portion of the S/D contact and the first ILD layer, where a sidewall of a top portion of the S/D contact is in direct contact with the second ILD layer.

Abstract: An optical device is provided. The optical device includes a ring waveguide and a bus waveguide. The ring waveguide includes a coupling region. The bus waveguide is disposed adjacent to and spaced apart from the coupling region of the ring waveguide. The bus waveguide includes a coupling structure corresponding to the coupling region.

Abstract: An automated product/service vending system and method that offers potential customers a discount price for a particular product/service. A price investigation device searches in a plurality of online shops to obtain a lowest market price for the product/service and an offering device calculates a reduced price that is lower than the lowest market price but is profitable for the operator of the system, according to a predetermined profit value of the product/service.

Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.

Abstract: Systems and methods of supporting RACH optimization and monitoring of UP packet delay performance are described. During RACH optimization, a NF provisioning MnS with modify MOIAttributes operation to configure targets for RACH optimization and a NF provisioning MnS with modifyMOIAttributes operation are separately consumed to enable a RACH optimization function for a NR cell. After this, a performance assurance MnS with notifyFileReady or reportStreamData operation is consumed to collect RACH optimization-related measurements for the NR cell and RACH performance data of the RACH optimization-related measurements analyzed to evaluate RACH optimization performance for the NR cell. During monitoring of UP packet delay performance, raw performance measurements related to UP packet delay based on at least one of NG-RAN measurement results or time stamps in GTP packets are obtained from a NG-RAN or UPF, UP packet delay performance measurements are generated.

Abstract: An IC structure comprises a first transistor formed on a substrate, a first interconnect structure over the first transistor, a dielectric layer over the first interconnect structure, a plurality of 2D semiconductor islands on the dielectric layer, and a plurality of second transistors formed on the plurality of 2D semiconductor islands.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.

Abstract: The present invention provides a method of sugar-guided modifying a glycosylated polypeptide. First, a boronic acid group of a probe molecule and a sugar group of the glycosylated polypeptide form a first covalent bond. Next, an alkyne group of a modifying group and an azide group of the probe molecule form a second covalent bond by adding a promoter. As a result, the modifying group can be close to the glycosylated polypeptide. Then, the modifying group can bind to a nucleophilic residue that is near the sugar group, through a nucleophilic addition reaction. The method of the present invention can selectively modify a given site with the guidance of the sugar group.