Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230277806
    Abstract: Described are methods, systems, and devices for facilitation of intraluminal medical procedures within the neurovasculature including catheters and catheter advancement elements.
    Type: Application
    Filed: April 28, 2023
    Publication date: September 7, 2023
    Inventors: Tony M. Chou, Scott D. Wilson, Vera Shinsky
  • Publication number: 20230284441
    Abstract: The present application provides a memory device and a method of manufacturing the memory device.
    Type: Application
    Filed: March 3, 2022
    Publication date: September 7, 2023
    Inventor: LIANG-PIN CHOU
  • Publication number: 20230284218
    Abstract: A base station can implement a method for scheduling downlink transmissions to a user equipment (UE). The method may be performed by processing hardware and includes transmitting to the UE a control element that includes information related to a first time resource for receiving a first downlink data unit associated with a media access control layer from the base station and a second time resource for receiving a second downlink data unit associated with the media access control layer from the base station (1102). The first time resource and the second time resource are non-consecutive and have different respective timeslot offsets within one or more frames, the information including an index into a table stored at the UE, the table specifying a plurality of candidate timeslot offsets for the first time resource (1104). In addition, the method includes transmitting to the UE the first downlink data unit over the first time resource and the second downlink data unit over the second resource (1106).
    Type: Application
    Filed: July 30, 2021
    Publication date: September 7, 2023
    Inventor: Kao-Peng Chou
  • Publication number: 20230282750
    Abstract: Methods of forming improved dielectric layers and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a transistor structure on a semiconductor substrate; a first dielectric layer on the transistor structure; a second dielectric layer on the first dielectric layer, the second dielectric layer having a nitrogen concentration greater than a nitrogen concentration of the first dielectric layer; a first conductive structure extending through the second dielectric layer and the first dielectric layer, the first conductive structure being electrically coupled to a first source/drain region of the transistor structure, a top surface of the first conductive structure being level with a top surface of the second dielectric layer; and a second conductive structure physically and electrically coupled to the first conductive structure, a bottom surface of the second conductive structure being a first distance below the top surface of the second dielectric layer.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 7, 2023
    Inventors: Yu-Lien Huang, Tze-Liang Lee, Jr-Hung Li, Chi-Hao Chang, Hao-Yu Chang, Pei-Yu Chou
  • Publication number: 20230284514
    Abstract: A flexible touch panel includes a flexible touch substrate, an overcoat layer, a device layer, and a waterproof layer. The overcoat layer is disposed over and directly contacting the flexible touch substrate. An adhesive force of the overcoat layer obtained according to an ASTM D3359 cross-cut test is greater than 4B. The device layer is disposed over the overcoat layer. The waterproof layer is interposed between the overcoat layer and the device layer.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Inventors: Yen-Chung CHEN, Mei-Ling CHOU, Chia-Yu LIU
  • Patent number: 11749619
    Abstract: A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: September 5, 2023
    Assignees: ADVANCED SEMICONDUCTOR ENGINEERING, INC., PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: You-Lung Yen, Pao-Hung Chou, Chun-Hsien Yu
  • Patent number: 11750795
    Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. The lenticular lenses may be configured to enable stereoscopic viewing of the display such that a viewer perceives three-dimensional images. The display may have a number of independently controllable viewing zones. A eye and/or head tracking system may use a camera to capture images of a viewer of the display. Control circuitry in the electronic device may use the captured images from the eye and/or head tracking system to determine which viewing zones are occupied by the viewer's eyes. The control circuitry may disable or dim viewing zones that are not occupied by the viewer's eyes in order to conserve power. An unoccupied viewing zone and an adjacent, occupied viewing zone may display the same image to increase sharpness in the display.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: September 5, 2023
    Assignee: Apple Inc.
    Inventors: Yi-Pai Huang, Felipe Bacim De Araujo E Silva, Ping-Yen Chou, Byoungsuk Kim, Chaohao Wang, Yi Huang, Michael J. Rockwell, Seung Wook Kim, Pretesh A. Mascarenhas
  • Patent number: 11750294
    Abstract: Systems and methods for optical communication are provided. For instance, a method for optical communication can include receiving, by a first coupling module, a power-on signal from a first electronic device coupled to the first coupling module. The method can also include relaying, by the first coupling module, a first optical signal to a second coupling module coupled to a second electronic device. The method can also include relaying, by the second coupling module, in response to receipt of the first optical signal, a second optical signal to the first coupling module. The method can also include activating, by the first coupling module, in response to receipt of the second optical signal, a data transfer circuit for relaying data via an optical communication interface between the first coupling module and the second coupling module.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: September 5, 2023
    Assignee: ARTILUX, INC.
    Inventors: Shih-Tai Chuang, Shih-Jie Wu, Li-Gang Lai, Yien-Tien Chou, Shao-Chien Chang, Kai-Wei Chiu, Shu-Lu Chen
  • Patent number: 11751071
    Abstract: Network Functions Virtualization (NFV) abstracts network functions, allowing them to be installed, controlled, and manipulated by software running on standardized compute nodes such as cloud computing platform rather than on dedicated hardware. In a 5G mobile communications network, the base station or gNB may be split into virtualized and non-virtualized network functions (NFs). Described herein are systems and methods for managing such gNBs within the NFV framework.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: September 5, 2023
    Assignee: Apple Inc.
    Inventors: Yizhi Yao, Joey Chou
  • Patent number: 11747474
    Abstract: The present disclosure relates to a method and a system for laser distance measurement. The method includes: obtaining, from a control circuit, a synchronization signal; generating, by at least one signal generator, a first periodic signal, a second periodic signal, and a third periodic signal based on the synchronization signal; emitting, by a laser emitting device, a laser beam toward a target, the laser beam being generated under a modulation of the first periodic signal; generating, by an optical detector, a measurement signal in response to a signal mixing of the second periodic signal and a reflected laser beam from the target; and determining a distance to the target based on the measurement signal and the third periodic signal.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: September 5, 2023
    Assignee: SHENZHEN MILESEEY TECHNOLOGY CO., LTD.
    Inventors: Long Luo, Zhi Chou
  • Patent number: 11751400
    Abstract: In some embodiments, the present disclosure relates to an integrated circuit. The integrated circuit has a first doped region and a second doped region within a substrate. A ferroelectric material is arranged over the substrate and laterally between the first doped region and the second doped region. A conductive electrode is over the ferroelectric material and between sidewalls of the ferroelectric material. One or more sidewall spacers are arranged along opposing sides of the ferroelectric material. A dielectric layer continuously and laterally extends from directly below the one or more sidewall spacers to directly below the ferroelectric material.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: September 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei Cheng Wu, Pai Chi Chou
  • Patent number: 11749584
    Abstract: The present disclosure describes heat dissipating structures that can be formed either in functional or non-functional areas of three-dimensional system on integrated chip structures. In some embodiments, the heat dissipating structures maintain an average operating temperature of memory dies or chips below about 90° C. For example, a structure includes a stack with chip layers, where each chip layer includes one or more chips and an edge portion. The structure further includes a thermal interface material disposed on the edge portion of each chip layer, a thermal interface material layer disposed over a top chip layer of the stack, and a heat sink over the thermal interface material layer.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: September 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Hsiang Huang, Chin-Chou Liu, Chin-Her Chien, Fong-yuan Chang, Hui Yu Lee
  • Patent number: 11749760
    Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Han Lin, Chao-Ching Chang, Yi-Ming Lin, Yen-Ting Chou, Yen-Chang Chen, Sheng-Chan Li, Cheng-Hsien Chou
  • Patent number: 11749050
    Abstract: A sheet processing apparatus includes first and second sheet processing modules, a connecting module, and a storage module. In each of the first and second sheet processing modules, a sheet received from an entrance port is identified by an identifying unit, and if the sheet is qualified, the sheet is transported to a first communication port through a first transport path. In the connecting module, a first diverter mechanism is configured to permit sheet transport between a second communication port and a selected one of the first and second sheet processing modules. The storage module is disposed for receiving and storing the sheet from the connecting module.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: September 5, 2023
    Assignee: MASTERWORK AUTOMODULES TECH CORP. LTD.
    Inventors: Hung-Hsun Chou, Wen-Hsien Tsai
  • Patent number: 11745451
    Abstract: A method of using a device of inflating and repairing a broken tire contains a step of: placing the device on the ground. The device contains: an accommodation box, a sealant can, a cap, and at least one delivery hose. The accommodation box accommodates an air compressor for compressing air so as to produce compressed air. The accommodation box includes a first coupling orifice and a second coupling orifice. The sealant can includes a body in which sealant is received, and the cap is connected on an open end of the body. The cap includes an air inflow tube and a sealant supply tube), and the cap is engaged on the first coupling orifice or the second coupling orifice. The at least one delivery hose includes a first connector and a second connector connected with two components, thus inflating and repairing the broken tire diversely.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: September 5, 2023
    Inventors: Wen-San Chou, Cheng-Hsien Chou
  • Patent number: 11744863
    Abstract: Process for preparing a heat-treated pooled human platelet lysate, said process comprising the steps of: a) Providing a pooled human platelet lysate (p HPL), b) Heat-treating the pooled human platelet lysate at a temperature of 50° C. to 70° C. during 20 to 40 minutes, c) Purifying the heat-treated pooled human platelet lysate of step b).
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: September 5, 2023
    Assignees: Centre Hospitalier Regional et Universitaire De Lille (CHRU), UNIVERSITE DE LILLE 2 DROIT ET SANTE, UNIVERSITE DU LITTORAL COTE D'OPALE, INSTITUT NATIONAL DE LA SANTE ET DE LA RECHERCHE MEDICALE (INSERM), TAIPEI MEDICAL UNIVERSITY
    Inventors: David Devos, Thierry Burnouf, Jean-christophe Devedjian, Ming-Li Chou, Flore Gouel
  • Patent number: 11748850
    Abstract: Embodiments relate to a super-resolution engine that converts a lower resolution input image into a higher resolution output image. The super-resolution engine includes a directional scaler, an enhancement processor, a feature detection processor, a blending logic circuit, and a neural network. The directional scaler generates directionally scaled image data by upscaling the input image. The enhancement processor generates enhanced image data by applying an example-based enhancement, a peaking filter, or some other type of non-neural network image processing scheme to the directionally scaled image data. The feature detection processor determines features indicating properties of portions of the directionally scaled image data. The neural network generates residual values defining differences between a target result of the super-resolution enhancement and the directionally scaled image data. The blending logic circuit blends the enhanced image data with the residual values according to the features.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: September 5, 2023
    Assignee: Apple Inc.
    Inventors: Jim Chen Chou, Chenge Li, Yun Gong
  • Patent number: 11749718
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a heat transfer layer disposed over a substrate, a channel material layer, a gate structure and source and drain terminals. The channel material layer has a first surface and a second surface opposite to the first surface, and the channel material layer is disposed on the heat transfer layer with the first surface in contact with the heat transfer layer. The gate structure is disposed above the channel material layer. The source and drain terminals are in contact with the channel material layer and located at two opposite sides of the gate structure.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: September 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Tse Hung, Ang-Sheng Chou, Hung-Li Chiang, Tzu-Chiang Chen, Chao-Ching Cheng
  • Patent number: 11749571
    Abstract: In a method of inspection of a semiconductor substrate a first beam of light is split into two or more second beams of light. The two or more second beams of light are respectively transmitted onto a first set of two or more first locations on top of the semiconductor substrate. In response to the transmitted two or more second beams of light, two or more reflected beams of light from the first set of two or more first locations are received. The received two or more reflected beams of light are detected to generate two or more detected signals. The two or more detected signals are analyzed to determine whether a defect exists at the set of the two or more first locations.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sheng He Huang, Chung-Pin Chou, Shiue-Ming Guo, Hsuan-Chia Kao, Yan-Cheng Chen, Sheng-Ching Kao, Jun Xiu Liu
  • Patent number: 11749797
    Abstract: A fluoride shuttle (F-shuttle) battery and nanostructures of copper based cathode materials in the fluoride shuttle battery. The F-shuttle batteries include a liquid electrolyte, which allows the F-shuttle batteries to operate under room temperature. The minimum thickness of copper layer within the copper nanostructures is no more than 20 nm. The thickness of copper layer within the copper nanostructures is controlled and reduced to ensure the energy densities of F-shuttle batteries.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: September 5, 2023
    Assignees: HONDA MOTOR CO., LTD., CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Qingmin Xu, Christopher J. Brooks, Ryan Mckenney, Nam Hawn Chou, Kaoru Omichi, Simon C. Jones, Thomas F. Miller, III, Stephen A. Munoz