Patents by Inventor Christophe Pierrat

Christophe Pierrat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020098424
    Abstract: An electronically programmed mask is connected to an electronic device, such as a processor. In operation, a mask design is first entered into the processor. The processor controls a display of an image on the electronically programmed mask, wherein the display replicates conventional type masks. The electronically programmed mask is designed such that the display presented on its screen provides optical contrast and characteristics that are easily changed or reprogrammed by the processor. Electronically controlled masks provide the same patterns as mechanical type masks without requiring rigid, permanent type structures to form a desired pattern.
    Type: Application
    Filed: March 28, 2002
    Publication date: July 25, 2002
    Applicant: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Christophe Pierrat
  • Patent number: 6424882
    Abstract: The shape of chrome patterns on an optical pattern transfer tool are adjusted to get a desired shape on a wafer in the manufacture of semiconductor devices, wherein very small regions on a photoresist are defined and these regions are controlled with a high degree of accuracy. The optical pattern transfer tool has first and second planar surfaces lying in substantially parallel planes and a plurality of opaque regions overlying the first planar surface. First and second steps formed between and the first and second planar surfaces at first and second edges, respectively, define a width of the first planar surface. Each of the opaque regions are spaced from one another and offset from one another such that they are alternately aligned along a length of the first planar surface, such that one of the opaque regions is aligned with a portion of the first edge and the next one of the opaque regions along the length is aligned with a portion of the second edge.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: July 23, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6421111
    Abstract: A multi-image reticle used to form integrated circuitry comprises a two dimensional array of spaced images arranged in a matrix of controllably spaced rows and columns of images on a single reticle. No rotation of the reticle is required to expose various levels of circuitry on a semiconductor wafer. The wafer is held in a stepper device, which controllably positions the wafer under the desired image of the mask for exposure of a resist on the wafer. A movable aperture controls exposure through a selected image or mask pattern on the reticle. By controlling which image is used, and accurately positioning the wafer via the stepper, multiple images are accurately registered, leading to improvement in dimensions of circuitry and other structures formed on the wafer.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: July 16, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6418008
    Abstract: A capacitor having a pear-shaped cross section is provided. In one embodiment, the pear-shaped capacitor is a stacked container capacitor used in a dynamic random access memory circuit with a bit-line-over-capacitor construction. Each capacitor is at a minimum bit line distance from all adjacent bit line contacts, and also at a minimum capacitor distance from all adjacent capacitors along a substantial portion of its perimeter.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: July 9, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Mark Jost, William Stanton, Christophe Pierrat
  • Publication number: 20020076622
    Abstract: A structure and method are provided for correcting the optical proximity effects on a tri-tone attenuated phase-shifting mask. An attenuated rim, formed by an opaque region and an attenuated phase-shifting region, can be kept at a predetermined width across the mask or for certain types of structures. Typically, the attenuated rim is made as large as possible to maximize the effect of the attenuated phase-shifting region while still preventing the printing of larger portions of the attenuated phase-shifting region during the development process.
    Type: Application
    Filed: December 20, 2000
    Publication date: June 20, 2002
    Inventors: Christophe Pierrat, Youping Zhang
  • Patent number: 6391709
    Abstract: A capacitor having a pear-shaped cross section is provided. In one embodiment, the pear-shaped capacitor is a stacked container capacitor used in a dynamic random access memory circuit with a bit-line-over- capacitor construction. Each capacitor is at a minimum bit line distance from all adjacent bit line contacts, and also at a minimum capacitor distance from all adjacent capacitors along a substantial portion of its perimeter.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: May 21, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Mark Jost, William Stanton, Christophe Pierrat
  • Patent number: 6379847
    Abstract: An electronically programmed mask is connected to an electronic device, such as a processor. In operation, a mask design is first entered into the processor. The processor controls a display of an image on the electronically programmed mask, wherein the display replicates conventional type masks. The electronically programmed mask is designed such that the display presented on its screen provides optical contrast and characteristics that are easily changed or reprogrammed by the processor. Electronically controlled masks provide the same patterns as mechanical type masks without requiring rigid, permanent type structures to form a desired pattern.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: April 30, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Christophe Pierrat
  • Publication number: 20020048141
    Abstract: A capacitor having a pear-shaped cross section is provided. In one embodiment, the pear-shaped capacitor is a stacked container capacitor used in a dynamic random access memory circuit with a bit-line-over-capacitor construction. Each capacitor is at a minimum bit line distance from all adjacent bit line contacts, and also at a minimum capacitor distance from all adjacent capacitors along a substantial portion of its perimeter.
    Type: Application
    Filed: March 6, 2001
    Publication date: April 25, 2002
    Inventors: Mark Jost, William Stanton, Christophe Pierrat
  • Patent number: 6374396
    Abstract: Methods of correcting for proximity effect are disclosed, wherein the methods account for intensity level variation across a field of exposure. The methods may be utilized to produce improved masks for reproducing a desired image on a target, often a semiconductor substrate. Furthermore, a system is disclosed to perform the correction methods. Masks and apparatus produced from such masks utilizing the correction methods are also disclosed.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: April 16, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Bill Baggenstoss, Christophe Pierrat
  • Patent number: 6373976
    Abstract: A method and apparatus for calibrating the coordinate systems of photomask processing machines improves processing efficiency and the quality of resulting photomasks. A test pattern is printed on an unproductive area of the photomask. The test pattern is used to calibrate the coordinate system of each processing machine on which the photomask is mounted. Using the test pattern as a common reference point enables points located using one processing machine to be quickly and accurately found on a second processing machine. The test pattern is also used as a reference for other metrology measurements.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: April 16, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Christophe Pierrat, Baorui Yang
  • Patent number: 6369432
    Abstract: A capacitor having a pear-shaped cross section is provided. In one embodiment, the pear-shaped capacitor is a stacked container capacitor used in a dynamic random access memory circuit with a bit-line-over- capacitor construction. Each capacitor is at a minimum bit line distance from all adjacent bit line contacts, and also at a minimum capacitor distance from all adjacent capacitors along a substantial portion of its perimeter.
    Type: Grant
    Filed: February 23, 1998
    Date of Patent: April 9, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Mark Jost, William Stanton, Christophe Pierrat
  • Publication number: 20020017674
    Abstract: Capacitors, DRAM circuitry, and methods of forming the same are described. In one embodiment, a capacitor comprises a first container which is joined with a substrate node location and has an opening defining a first interior area. A second container is joined with the node location and has an opening defining a second interior area. The areas are spaced apart from one another in a non-overlapping relationship. A dielectric layer and a conductive capacitor electrode layer are disposed operably proximate the first and second containers. In another embodiment, the first and second containers are generally elongate and extend away from the node location along respective first and second central axes. The axes are different and spaced apart from one another. In yet another embodiment, a conductive layer of material is disposed over and in electrical communication with a substrate node location. The layer of material has an outer surface with a first region and a second region spaced apart from the first region.
    Type: Application
    Filed: November 23, 1998
    Publication date: February 14, 2002
    Inventors: MARTIN CEREDIG ROBERTS, CHRISTOPHE PIERRAT
  • Publication number: 20020009675
    Abstract: A method for forming a photomask including applying photoresist to a semiconductor substrate, exposing a first area of the photoresist to a first dosage of radiation, and exposing a second area of the photoresist to a second dosage of radiation. The first and second areas may be concurrently exposed. First and second regions of the photoresist are then removed to form first and second openings that have different depths in the photoresist. Such removal may be effected by developing the first and second areas of the photoresist. One of the openings may extend down to an insulating layer formed on the semiconductor substrate. A contact and/or trench etch may be performed to remove a portion of the insulating layer. Conductive material may then be deposited in the opening so formed to form a contact, a via, or another electrically conductive element that communicates with a structure underlying the insulating layer.
    Type: Application
    Filed: August 30, 2001
    Publication date: January 24, 2002
    Inventors: Nanseng Jeng, Christophe Pierrat
  • Patent number: 6337172
    Abstract: A semiconductor wafer having a first layer and overlying insulating layer receives a photoresist layer. A first photoresist area is exposed to light having a first dosage, while a second, adjacent photoresist area is concurrently exposed to light having a second dosage. The first area and second area then are concurrently developed to partially expose the photoresist layer. The partial exposure removes photoresist within the first area to one depth and within the second area to a second depth. The second depth differs from the first depth. In one embodiment, the second depth extends through the photoresist down to the insulating layer. After subsequently performing a contact and/or trench etch through the exposed insulating layer and removing excess photoresist above the insulating layer, conductive material is deposited in the contact/trench opening and over the insulating layer. The result is an upper conductive layer coupled to the first layer via a contact or other conductive connection.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: January 8, 2002
    Inventors: Nanseng Jeng, Christophe Pierrat
  • Publication number: 20010049063
    Abstract: An electronically programmed mask is connected to an electronic device, such as a processor. In operation, a mask design is first entered into the processor. The processor controls a display of an image on the electronically programmed mask, wherein the display replicates conventional type masks. The electronically programmed mask is designed such that the display presented on its screen provides optical contrast and characteristics that are easily changed or reprogrammed by the processor. Electronically controlled masks provide the same patterns as mechanical type masks without requiring rigid, permanent type structures to form a desired pattern.
    Type: Application
    Filed: October 25, 1999
    Publication date: December 6, 2001
    Inventors: DOUGLAS J. CUTTER, CHRISTOPHE PIERRAT
  • Publication number: 20010044057
    Abstract: A subresolution grating composed of approximately circular contacts is fabricated around the border of the primary pattern of a photomask. As a result, resolution at the edges of the photomask pattern is improved when the pattern is printed on a wafer surface. In addition, the reduced leakage enables a more efficient use of the glass plate on which the photomask is fabricated as well as a more efficient use of the wafer surface as a result of being able to place patterns closer together.
    Type: Application
    Filed: July 30, 2001
    Publication date: November 22, 2001
    Applicant: Micron Technology, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6319644
    Abstract: Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Christophe Pierrat, James E. Burdorf, William Baggenstoss, William Stanton
  • Publication number: 20010041409
    Abstract: This invention teaches methods and apparatus for forming self-aligned photosensitive material spacers about protruding structures in semiconductor devices. One embodiment of the invention is a method for forming a LDD structure, utilizing disposable photosensitive material spacers. A second embodiment of the invention comprises a method for forming a transistor, having salicided source/drain regions, utilizing photosensitive polyimide spacers for forming the salicided source/drain regions, without disposing of the spacers. A third embodiment of the invention comprises a method for creating an offset from a protruding structure on a semiconductor substrate, using disposable photosensitive material spacers.
    Type: Application
    Filed: March 26, 2001
    Publication date: November 15, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Nanseng Jeng, Christophe Pierrat
  • Publication number: 20010029403
    Abstract: A system and method for enhancing process latitude (tolerances) in the fabrication of devices and integrated circuits. A measuring point is selected corresponding to a feature of critical dimension. Then the pattern is convolved with the model, and its value and rate of change are calculated over a range of corresponding values of a first process parameter. Next, an optimum threshold having the largest rate of change, or contrast, is selected. Finally, proximity correction is performed using relevant parameters.
    Type: Application
    Filed: January 23, 2001
    Publication date: October 11, 2001
    Applicant: Micron Technology, Inc.
    Inventors: Christophe Pierrat, James Burdorf
  • Patent number: 6297879
    Abstract: A method of photomask inspection uses available technology in a novel fashion to detect defects on a photomask. The method involves inspecting a photomask using a modified microscope, image comparison software, and a CCD camera. The microscope is modified to view the photomask out of focus and at low magnifications. The photomask may be scanned at multiple focuses to implement the inspection. This image is then compared with a reference image, such as an image from another die or a database. Any discrepancies between the images indicate a defect in the photomask. Alternatively, the photomask is inspected using a low magnification, low NA objective in dark field image of the optical microscope.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: October 2, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Baorui Yang, Christophe Pierrat