Patents by Inventor Christophe Pierrat

Christophe Pierrat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6556277
    Abstract: Photolithographic methods and apparatus for reducing or eliminating the proximity effect. Multiple exposures using different exposure parameters are used to reduce or to eliminate the proximity effect.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: April 29, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6551750
    Abstract: A structure and method are provided to ensure self-aligned fabrication of a tri-tone attenuated phase-shifting mask. A sub-resolution, 0 degree phase, greater than 90% transmission rim is provided along the edge of an opaque region. The alignment of this sub-resolution rim with the opaque and attenuated regions of the mask is performed in a single patterning step. In one embodiment, a narrow opaque region can be replaced by a sub-resolution, 0 degree phase, greater than 90% transmission line.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: April 22, 2003
    Assignee: Numerical Technologies, Inc.
    Inventor: Christophe Pierrat
  • Publication number: 20030068566
    Abstract: A full phase shifting mask (FPSM) can be advantageously used in a damascene process for hard-to-etch metal layers. Because the FPSM can be used with a positive photoresist, features on an original layout can be replaced with shifters on a FPSM layout. Adjacent shifters should be of opposite phase, e.g. 0 and 180 degrees. In one embodiment, a dark field trim mask can be used with the FPSM. The trim mask can include cuts that correspond to cuts on the FPSM. Cuts on the FPSM can be made to resolve phase conflicts between proximate shifters. In one case, exposing two proximate shifters on the FPSM and a corresponding cut on the trim mask can form a feature in the metal layer. The FPSM and/or the trim mask can include proximity corrections to further improve printing resolution.
    Type: Application
    Filed: November 14, 2002
    Publication date: April 10, 2003
    Applicant: Numerical Technologies, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6541165
    Abstract: Techniques are provided for extending the use of phase shift techniques to implementation of masks used for complex layouts in the layers of integrated circuits, beyond selected critical dimension features such as transistor gates to which such structures have been limited in the past. The method includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and application of sub-resolution assist features within phase shift regions and optical proximity correction features to phase shift regions. Both opaque field phase shift masks and complementary binary masks defining interconnect structures and other types of structures that are not defined using phase shifting, necessary for completion of the layout of the layer are produced.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: April 1, 2003
    Assignee: Numerical Technologies, Inc.
    Inventor: Christophe Pierrat
  • Publication number: 20030061587
    Abstract: One embodiment of the invention provides a system to facilitate visualization of optical proximity corrections to a circuit layout. This system operates by receiving an input circuit layout and a set of optical proximity correction parameters. The system performs an optical proximity correction on this input circuit layout using the set of optical proximity correction parameters. The output of the optical proximity correction process includes an output circuit layout with optical proximity corrections. This output also includes additional information that allows a user to visualize how the set of optical proximity corrections were determined. Notably, the additional information can be stored in the same representation as the output circuit layout and viewed with the same viewer used for viewing the output circuit layout.
    Type: Application
    Filed: September 21, 2001
    Publication date: March 27, 2003
    Applicant: Numerical Technologies, Inc.
    Inventors: Youping Zhang, Christophe Pierrat
  • Patent number: 6537710
    Abstract: An electronically programmed mask is connected to an electronic device, such as a processor. In operation, a mask design is first entered into the processor. The processor controls a display of an image on the electronically programmed mask, wherein the display replicates conventional type masks. The electronically programmed mask is designed such that the display presented on its screen provides optical contrast and characteristics that are easily changed or reprogrammed by the processor. Electronically controlled masks provide the same patterns as mechanical type masks without requiring rigid, permanent type structures to form a desired pattern.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: March 25, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Christophe Pierrat
  • Patent number: 6539521
    Abstract: A technique for forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, includes identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects. An evaluation point is determined for the edge based on a first target length for corner segments, a second target length for non-corner segments, and characteristics of the edge. It is then determined how to correct at least a portion of the edge for proximity effects based on an analysis at the evaluation point. Another technique determines an edge type of the edge of the polygon based on the first target length for corner segments, the second target length for non-corner segments, and the characteristics of the edge. Then, the edge is divided into segments based on the edge type and the characteristics of the edge.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: March 25, 2003
    Assignee: Numerical Technologies, Inc.
    Inventors: Christophe Pierrat, Youping Zhang
  • Publication number: 20030056190
    Abstract: Methods and apparatuses for preparing layouts and masks that use phase shifting to enable production of subwavelength features on an integrated circuit in close (optical) proximity to other structures are described. One embodiment selects from several strategies for resolving conflicts between phase shifters used to define features and (optically) proximate structures that are being defined other than by phase shifting. One embodiment adds additional phase shifters to define the conflicting structures. Another embodiment corrects the shape of the phase shifters in proximity to a conflicting structure. Resulting integrated circuits can include a greater number of subwavelength features even in areas that are in close proximity to structures that were not initially identified for production using a phase shifting mask.
    Type: Application
    Filed: October 15, 2002
    Publication date: March 20, 2003
    Applicant: Numerical Technologies, Inc.
    Inventors: Hua-Yu Liu, Christophe Pierrat, Kent Richardson
  • Publication number: 20030044059
    Abstract: Automated techniques for identifying dummy/main features on a mask layer are provided. In a multiple mask layer technique, the definition of a dummy/main feature can be based on connectivity information or functional association information. In a geometry technique, the definition of a dummy/main feature can be based on a feature size, a feature shape, a pattern of features, or a proximity of a feature to a neighboring feature. In one embodiment, multiple definitions and multiple techniques can be used.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 6, 2003
    Applicant: Numerical Technologies, Inc.
    Inventors: Fang-Cheng Chang, Christophe Pierrat
  • Patent number: 6528217
    Abstract: An electronically programmed mask is connected to an electronic device, such as a processor. In operation, a mask design is first entered into the processor. The processor controls a display of an image on the electronically programmed mask, wherein the display replicates conventional type masks. The electronically programmed mask is designed such that the display presented on its screen provides optical contrast and characteristics that are easily changed or reprogrammed by the processor. Electronically controlled masks provide the same patterns as mechanical type masks without requiring rigid, permanent type structures to form a desired pattern.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: March 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Douglas J. Cutter, Christophe Pierrat
  • Patent number: 6524752
    Abstract: Techniques are provided for extending the use of phase shift techniques to implementation of masks used for complex layouts in the layers of integrated circuits, beyond selected critical dimension features such as transistor gates to which such structures have been limited in the past. The method includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and application of sub-resolution assist features within phase shift regions and optical proximity correction features to phase shift regions. Both opaque field phase shift masks and complementary binary masks defining interconnect structures and other types of structures that are not defined using phase shifting, necessary for completion of the layout of the layer are produced.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: February 25, 2003
    Assignee: Numerical Technologies, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6523165
    Abstract: Methods and apparatuses for preparing layouts and masks that use phase shifting to enable production of subwavelength features on an integrated circuit in close (optical) proximity to other structures are described. One embodiment selects from several strategies for resolving conflicts between phase shifters used to define features and (optically) proximate structures that are being defined other than by phase shifting. One embodiment adds additional phase shifters to define the conflicting structures. Another embodiment optically corrects the shape of the phase shifters in proximity to a conflicting structure. Resulting integrated circuits can include a greater number of subwavelength features even in areas that are in close proximity to structures that were not initially identified for production using a phase shifting mask.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: February 18, 2003
    Assignee: Numerical Technologies, Inc.
    Inventors: Hua-Yu Liu, Christophe Pierrat, Kent Richardson
  • Patent number: 6519501
    Abstract: A system and method for enhancing process latitude (tolerances) in the fabrication of devices and integrated circuits. A measuring point is selected corresponding to a feature of critical dimension. Then the pattern is convolved with the model, and its value and rate of change are calculated over a range of corresponding values of a first process parameter. Next, an optimum threshold having the largest rate of change, or contrast, is selected. Finally, proximity correction is performed using relevant parameters.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: February 11, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Christophe Pierrat, James Burdorf
  • Patent number: 6514422
    Abstract: A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch which produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multilayer work piece having different layers formed of the same material, or it may be a single layer of material. The process can be used to manufacture a base structure for a conical cathode emitter tip.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: February 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Karen Huang, Christophe Pierrat
  • Publication number: 20030023939
    Abstract: One embodiment of the invention provides a system that analyzes a layout related to a circuit on a semiconductor chip using an instance-based representation of a set of geometrical features that comprise the layout. The system operates by receiving a representation of the layout, wherein the representation defines a plurality of nodes that include one or more geometrical features. Next, the system converts the representation into an instance-based representation by identifying multiple occurrences of identical node instances in the layout, wherein each node instance can be further processed without having to consider effects of external factors on the node instance. The system then performs an further processing on the instance-based representation by processing each node instance only once, whereby the processing does not have to be repeated on multiple occurrences of the node instance in the layout.
    Type: Application
    Filed: July 26, 2001
    Publication date: January 30, 2003
    Applicant: Numerical Technologies
    Inventors: Christophe Pierrat, Chin-Hsen Lin, Yao-Ting Wang, Fang-Cheng Chang
  • Publication number: 20030013024
    Abstract: A method extends the use of phase shift techniques to complex layouts, and includes identifying a pattern, and automatically mapping the phase shifting regions for implementation of such features. The pattern includes small features having a dimension smaller than a first particular feature size, and at least one relatively large feature, the at least one relatively large feature and another feature in the pattern having respective sides separated by a narrow space. Phase shift regions are laid out including a first set of phase shift regions to define said small features, and a second set of phase shift regions to assist definition of said side of said relatively large feature. An opaque feature is used to define the relatively large feature, and a phase shift region in the second set is a sub-resolution window inside the perimeter of the opaque feature.
    Type: Application
    Filed: September 16, 2002
    Publication date: January 16, 2003
    Applicant: Numerical Technologies, Inc.
    Inventor: Christophe Pierrat
  • Publication number: 20030014732
    Abstract: Methods and apparatuses for preparing layouts and masks that use phase shifting to enable production of subwavelength features on an integrated circuit in close (optical) proximity to other structures are described. One embodiment selects from several strategies for resolving conflicts between phase shifters used to define features and (optically) proximate structures that are being defined other than by phase shifting. One embodiment adds additional phase shifters to define the conflicting structures. Another embodiment optically corrects the shape of the phase shifters in proximity to a conflicting structure. Resulting integrated circuits can include a greater number of subwavelength features even in areas that are in close proximity to structures that were not initially identified for production using a phase shifting mask.
    Type: Application
    Filed: July 13, 2001
    Publication date: January 16, 2003
    Applicant: Numerical Technologies, Inc.
    Inventors: Hua-Yu Liu, Christophe Pierrat, Kent Richardson
  • Publication number: 20030014235
    Abstract: A computer-implemented method for matching parameters of outputs generated by a first and second process. The first process generates a first output having a characteristic measurable by a first parameter, and the second process generates a second output having the characteristic measurable by a second parameter. A computer having a processing unit and memory is provided. The computer generates a first model of the first parameter for the first process and a second model of the second parameter for the second process. The computer generates a first simulated output of the first process using the first model. A correction, which is a function of the second model and which compensates for the effect of the second process on the second parameter, is applied to the first simulated output to obtain a corrected output. The second process is applied to the corrected output to generate with the computer thereby a third output matching the first parameter of the first output.
    Type: Application
    Filed: August 29, 2002
    Publication date: January 16, 2003
    Applicant: Micron Technology, Inc.
    Inventors: James Burdorf, Christophe Pierrat
  • Publication number: 20030008222
    Abstract: Techniques are provided for extending the use of phase shift techniques to implementation of masks used for complex layouts in the layers of integrated circuits, beyond selected critical dimension features such as transistor gates to which such structures have been limited in the past. The method includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and application of sub-resolution assist features within phase shift regions and optical proximity correction features to phase shift regions. In one approach, phase shift regions are laid out so that they extend around corners in a feature, and in one or more identified corners having greater process latitude, the phase shift regions are divided and assigned opposite phases in the corner.
    Type: Application
    Filed: September 5, 2002
    Publication date: January 9, 2003
    Applicant: Numerical Technologies, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 6503666
    Abstract: Techniques are provided for extending the use of phase shift techniques to implementation of masks used for complex layouts in the layers of integrated circuits, beyond selected critical dimension features such as transistor gates to which such structures have been limited in the past. The method includes identifying features for which phase shifting can be applied, automatically mapping the phase shifting regions for implementation of such features, resolving phase conflicts which might occur according to a given design rule, and application of sub-resolution assist features within phase shift regions and optical proximity correction features to phase shift regions. Both opaque field phase shift masks and complementary binary masks defining interconnect structures and other types of structures that are not defined using phase shifting, necessary for completion of the layout of the layer are produced.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: January 7, 2003
    Assignee: Numerical Technologies, Inc.
    Inventor: Christophe Pierrat