Patents by Inventor Chun-Chieh Wang
Chun-Chieh Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11414553Abstract: A fouling-proof structure is applicable to synthetic leather or fabric and it includes an alcohol-resistant layer; and a water-based fouling-proof layer disposed on the alcohol-resistant layer, wherein the alcohol-resistant layer is formed by curing an alcohol-resistant combination, and the alcohol-resistant combination comprises polyurethane resin, wherein the water-based fouling-proof layer is formed by curing a water-based fouling-proof combination, and the water-based fouling-proof combination comprises polyurethane resin, water, polymerized siloxanes, water-based PTFE and silicone oil.Type: GrantFiled: March 6, 2020Date of Patent: August 16, 2022Assignee: JANTEC CORP.Inventors: Ching-Hsiang Chang, Kuo-Hsing Yeh, Chun-Chieh Wang
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Patent number: 11411112Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.Type: GrantFiled: May 31, 2020Date of Patent: August 9, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Chieh Wang, Sheng-Wei Yeh, Yueh-Ching Pai, Chi-Jen Yang
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Patent number: 11410889Abstract: In a method of manufacturing a semiconductor device, semiconductor layers, which are vertically arranged with a space between adjacent semiconductor layers, are provided over a substrate, an interfacial layer is formed around each of the semiconductor layers, a dielectric layer is formed on the interfacial layer around each of the semiconductor layers, a first conductive layer is formed on the dielectric layer, the first conductive layer is removed so that the dielectric layer is exposed, a second conductive layer is formed on the exposed dielectric layer so that the space between adjacent semiconductor layers is not fully filled by the second conductive layer, a third conductive layer is formed on the second conductive layer so that the space between adjacent semiconductor layers is filled by the third conductive layer, and the semiconductor layers are semiconductor wires or sheets.Type: GrantFiled: July 24, 2020Date of Patent: August 9, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chun-Chieh Wang, Yueh-Ching Pai
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Patent number: 11398482Abstract: A semiconductor device including a cap layer and a method for forming the same are disclosed. In an embodiment, a method includes epitaxially growing a first semiconductor layer over an N-well; etching the first semiconductor layer to form a first recess; epitaxially growing a second semiconductor layer filling the first recess; etching the second semiconductor layer, the first semiconductor layer, and the N-well to form a first fin; forming a shallow trench isolation region adjacent the first fin; and forming a cap layer over the first fin, the cap layer contacting the second semiconductor layer, forming the cap layer including performing a pre-clean process to remove a native oxide from exposed surfaces of the second semiconductor layer; performing a sublimation process to produce a first precursor; and performing a deposition process wherein material from the first precursor is deposited on the second semiconductor layer to form the cap layer.Type: GrantFiled: June 8, 2020Date of Patent: July 26, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Chieh Wang, Yueh-Ching Pai, Huai-Tei Yang
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Publication number: 20220229477Abstract: A heat dissipation system of a portable electronic device is provided. The heat dissipation system includes a body and at least one fan. A heat source of the portable electronic device is disposed in the body. The fan is a centrifugal fan disposed in the body. The fan has at least one flow inlet, at least one flow outlet, and at least one spacing portion. The flow outlet faces toward the heat source, and the spacing portion surrounds the flow inlet and abuts against the body, so as to isolate the flow inlet and the heat source in two spaces independent of each other in the body.Type: ApplicationFiled: January 11, 2022Publication date: July 21, 2022Applicant: Acer IncorporatedInventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Kuang-Hua Lin, Chun-Chieh Wang, Shu-Hao Kuo
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Publication number: 20220223598Abstract: A semiconductor structure and its manufacturing method are provided. A semiconductor structure includes a substrate and several bit lines on the substrate. Each of the bit lines includes a first conductive layer on the substrate, a second conductive layer on the first conductive layer, and a hardmask layer on the second conductive layer. The semiconductor structure further includes several contacts disposed on the substrate and positioned between two adjacent bit lines, wherein the bottom surfaces of the contacts physically contact the substrate. The top surfaces of the contacts are not higher than the top surfaces of the hardmask layers. Each of the contacts includes a bottom contact part on the substrate and a top contact part on the bottom contact part, and a width of a top surface of the top contact part is greater than a width of a top surface of the bottom contact part.Type: ApplicationFiled: January 11, 2022Publication date: July 14, 2022Inventors: Tzu-Ming OU YANG, Chun-Chieh WANG, Shu-Ming LEE
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Publication number: 20220176677Abstract: The present invention relates to a composite laminate plate, a housing and a mobile communication device. The composite laminate includes a top metal layer with a through hole and an array antenna, and an area ratio of the array antenna to the through hole meets a specific range, thereby enhancing wave transmissivity of a millimeter wave. Moreover, the composite laminate has a specific material structure, such that it has good mechanical properties and low density. The housing and the mobile communication device made by the composite laminate have advantages of metallic texture, high signal intensity and excellent effect for light weight tendency.Type: ApplicationFiled: October 8, 2021Publication date: June 9, 2022Inventors: Yen-Lin HUANG, Pei-Jung TSAI, Li-De WANG, Chun-Chieh WANG
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Patent number: 11339796Abstract: A fan blade includes an arch-shaped body, a connecting portion, at least one sheet and at least one reinforcement component. The arch-shaped body has a pressure bearing surface and a negative pressure surface opposite to the pressure bearing surface. The connecting portion is connected to a first end portion of the arch-shaped body. The sheet is connected to the pressure bearing surface or the negative pressure surface. The reinforcement component is connected to the pressure bearing surface. An orthogonal projection of the sheet on the arch-shaped body and an orthogonal projection of the reinforcement component on the arch-shaped body are not overlapped with each other. A fan is also provided.Type: GrantFiled: December 5, 2019Date of Patent: May 24, 2022Assignee: Acer IncorporatedInventors: Chun-Chieh Wang, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin
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Publication number: 20220149157Abstract: The present disclosure describes an exemplary fin structure formed on a substrate. The disclosed fin structure comprises an n-type doped region formed on a top portion of the substrate, a silicon epitaxial layer on the n-type doped region, and an epitaxial stack on the silicon epitaxial layer, wherein the epitaxial stack comprises a silicon-based seed layer in physical contact with the silicon epitaxial layer. The fin structure can further comprise a liner surrounding the n-type doped region, and a dielectric surrounding the liner.Type: ApplicationFiled: January 24, 2022Publication date: May 12, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shahaji B. MORE, Huai-Tei YANG, Zheng-Yang PAN, Shih-Chieh CHANG, Chun-Chieh WANG, Cheng-Han LEE
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Publication number: 20220139707Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process.Type: ApplicationFiled: January 18, 2022Publication date: May 5, 2022Inventors: Cheng-Wei Chang, Min-Hsiu Hung, Hung-Yi Huang, Chun Chieh Wang, Yu-Ting Lin
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Publication number: 20220132700Abstract: A heat dissipation system of portable electronic device includes a body, at least one fan and at least one spacing member. At least one heat source of the portable electronic device is arranged in the body. The fan is a centrifugal fan disposed in the body. The fan has at least one flow inlet located in the axial direction and at least one flow outlet located in the radial direction. The spacing member is disposed on at least one of the body or the fan to form a stratified air flow in the body along the axial direction. The stratified air flows into the fan through the flow inlet and out of the fan through the flow outlet respectively.Type: ApplicationFiled: September 10, 2021Publication date: April 28, 2022Applicant: Acer IncorporatedInventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Kuang-Hua Lin, Chun-Chieh Wang, Shu-Hao Kuo
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Patent number: 11316428Abstract: A time signal generating circuit of a power converter and a control method thereof are provided. The time signal generating circuit includes a reference frequency generating circuit, an on-time circuit and a frequency tracking circuit. The reference frequency generating circuit provides a reference frequency signal. The on-time circuit provides an on-time signal according to a first reference signal and a second reference signal. The second reference signal is related to an output voltage of the power converter. The frequency tracking circuit is coupled to the reference frequency generating circuit and the on-time circuit, and compares frequencies of the reference frequency signal and the on-time signal within a default time to generate a tracking signal. The on-time circuit adjusts the second reference signal according to the tracking signal, so that the on-time circuit adjusts the frequency of the on-time signal.Type: GrantFiled: October 20, 2020Date of Patent: April 26, 2022Assignee: uPI Semiconductor Corp.Inventors: Chih-Lien Chang, Chun-Chieh Wang
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Publication number: 20220124937Abstract: A heat dissipation device includes a heat dissipation member and a fan. The heat dissipation member includes a first heat dissipation fin group and a second heat dissipation fin group stacked on the first heat dissipation fin group. The first heat dissipation fin group includes a plurality of first heat dissipation fins, and the second heat dissipation fin group includes a plurality of second heat dissipation fins. The fan is stacked on the second heat dissipation fin group. The fan is configured to rotate around an axis. The first heat dissipation fins and the second heat dissipation fins are arranged around the axis.Type: ApplicationFiled: October 19, 2021Publication date: April 21, 2022Applicant: Acer IncorporatedInventors: Shu-Hao Kuo, Wen-Neng Liao, Cheng-Wen Hsieh, Tsung-Ting Chen, Chun-Chieh Wang, Chi-Tai Ho, Kuan-Lin Chen
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Patent number: 11309784Abstract: The disclosure provides a power conversion circuit with a multi-function pin and a multi-function setting method thereof. The multi-function pin is coupled to an external setting circuit. The power conversion circuit includes a first function circuit, a second function circuit, and a judging circuit. The first function circuit is coupled to the multi-function pin. The second function circuit is coupled to the multi-function pin. The judging circuit is coupled to the multi-function pin, the first function circuit, and the second function circuit. The judging circuit provides a setting current to the multi-function pin, so that the external setting circuit generates a voltage according to the setting current. The judging circuit judges the type of external setting circuit according to voltage so as to activate the first function circuit or the second function circuit accordingly.Type: GrantFiled: August 12, 2020Date of Patent: April 19, 2022Assignee: uPI Semiconductor Corp.Inventors: Chih-Lien Chang, Chun-Chieh Wang
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Patent number: 11303042Abstract: A communication device includes a display device, a first antenna element, a second antenna element, a third antenna element, and a fourth antenna element. The display device is surrounded by the first antenna element, the second antenna element, the third antenna element, and the fourth antenna element. Any adjacent two of the first antenna element, the second antenna element, the third antenna element, and the fourth antenna element have different polarization directions.Type: GrantFiled: April 28, 2020Date of Patent: April 12, 2022Assignee: HTC CORPORATIONInventors: Cheng-Hung Lin, Szu-Po Wang, Chun-Chieh Wang, Yu-Yu Chen, Shih-Hua Wu, Dun-Yuan Cheng
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Publication number: 20220084874Abstract: A first photoresist material is formed. The first photoresist material is exposed through a phase shift mask. The first photoresist material is developed to form a first photoresist layer, wherein the first photoresist layer comprises a plurality of first photoresist patterns and a plurality of first openings between the plurality of first photoresist patterns. A first conductive material is formed in the plurality of first openings. A second photoresist layer is formed over the first conductive material, wherein the second photoresist layer comprises at least one second opening. A second conductive material is formed in the at least one second opening. The first photoresist layer and the second photoresist layer are removed, to form a plurality of first conductive patterns and at least one second conductive pattern. A dielectric layer is formed, wherein the at least one second conductive pattern is disposed in the dielectric layer.Type: ApplicationFiled: November 29, 2021Publication date: March 17, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Chieh Wang, Hung-Jui Kuo, Jaw-Jung Shin, Ming-Tan Lee
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Patent number: 11268525Abstract: A heat dissipation fan suited for being assembled in an electronic device is provided. The heat dissipation fan includes a hub and a plurality of fan blades disposed at and surrounding the hub. The fan blade has ductility and flexibility, and any two fan blades next to each other are in different thickness.Type: GrantFiled: December 17, 2019Date of Patent: March 8, 2022Assignee: Acer IncorporatedInventors: Yu-Ming Lin, Wen-Neng Liao, Cheng-Wen Hsieh, Chun-Chieh Wang, Hung-Chi Chen, Yu-Shih Wang, Ming-Fei Tsai
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Patent number: 11262818Abstract: A portable electronic device including a body, a door, a carrier and at least one electronic module is provided. The door is movably mounted on the body. The carrier includes a first side and a second side opposite to each other, the first side is pivoted to the body, and the second side is movably pivoted to the door. The electronic module is disposed on the carrier. At least one opening is formed between the door and the body when the door moves away from the body, and the door drives the carrier to rotate relative to the body, such that the electronic module is tilted with respect to the body along with the movement of the door, and the electronic module is exposed to an external environment via the opening for heat dissipation.Type: GrantFiled: July 6, 2020Date of Patent: March 1, 2022Assignee: Acer IncorporatedInventors: Yi-Ta Huang, Chun-Chieh Wang, Wu-Chen Lee, Cheng-Nan Ling, Cheng-Wen Hsieh
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Patent number: 11257714Abstract: An integrated circuit device includes a semiconductor substrate; and a pad region over the semiconductor substrate. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer over the pad region. The integrated circuit device further includes a conductive pillar on the UBM layer, wherein the conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes a protection structure over the sidewall surface of the conductive pillar, wherein sidewalls of the UBM layer are substantially free of the protection structure, and the protection structure is a non-metal material.Type: GrantFiled: July 21, 2015Date of Patent: February 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chien Ling Hwang, Yi-Wen Wu, Chun-Chieh Wang, Chung-Shi Liu
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Patent number: 11233123Abstract: The present disclosure describes an exemplary method to form p-type fully strained channel (PFSC) or an n-type fully strained channel (NFSC) that can mitigate epitaxial growth defects or structural deformations in the channel region due to processing. The exemplary method can include (i) two or more surface pre-clean treatment cycles with nitrogen trifluoride (NF3) and ammonia (NH3) plasma, followed by a thermal treatment; (ii) a prebake (anneal); and (iii) a silicon germanium epitaxial growth with a silicon seed layer, a silicon germanium seed layer, or a combination thereof.Type: GrantFiled: January 13, 2020Date of Patent: January 25, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shahaji B. More, Huai-Tei Yang, Zheng-Yang Pan, Shih-Chieh Chang, Chun-Chieh Wang, Cheng-Han Lee