Patents by Inventor Chun-Hsien Lin

Chun-Hsien Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11410880
    Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: August 9, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20220246790
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Inventors: Kai CHENG, Tsau-Hua HSIEH, Fang-Ying LIN, Tung-Kai LIU, Hui-Chieh WANG, Chun-Hsien LIN, Jui-Feng KO
  • Publication number: 20220246791
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Inventors: Kai CHENG, Tsau-Hua HSIEH, Fang-Ying LIN, Tung-Kai LIU, Hui-Chieh WANG, Chun-Hsien LIN, Jui-Feng KO
  • Publication number: 20220238677
    Abstract: A method for fabricating a nanowire transistor includes the steps of first forming a nanowire channel structure on a substrate, in which the nanowire channel structure includes first semiconductor layers and second semiconductor layers alternately disposed over one another. Next, a gate structure is formed on the nanowire channel structure and then a source/drain structure is formed adjacent to the gate structure, in which the source/drain structure is made of graphene.
    Type: Application
    Filed: February 26, 2021
    Publication date: July 28, 2022
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai, Ching-Wen Hung, Chun-Hsien Lin
  • Publication number: 20220223728
    Abstract: A semiconductor device includes a substrate having a first region and a second region, a first fin-shaped structure extending along a first direction on the first region, a double diffusion break (DDB) structure extending along a second direction to divide the first fin-shaped structure into a first portion and a second portion, and a first gate structure and a second gate structure extending along the second direction on the DDB structure.
    Type: Application
    Filed: March 28, 2022
    Publication date: July 14, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shou-Wan Huang, Chun-Hsien Lin
  • Publication number: 20220223716
    Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, a barrier layer on the buffer layer, a gate electrode on the barrier layer, a field plate adjacent to two sides of the gate electrode, and a first passivation layer adjacent to two sides of the gate electrode. Preferably, a sidewall of the field plate includes a first curve.
    Type: Application
    Filed: March 28, 2022
    Publication date: July 14, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: An-Chi Liu, Chun-Hsien Lin
  • Patent number: 11380986
    Abstract: A wireless communication device and method are provided. The wireless communication device includes a main body, a rotating module and an antenna module. The main body includes a housing and an RF signal module accommodated in the housing; the rotating module is accommodated in the housing and located at one side of the RF signal module, and includes a rotor motor and a rotating shaft, and the rotor motor is connected to the rotating shaft for rotating the rotating shaft; the antenna module is accommodated in the housing and disposed on the rotating shaft, and is electrically connected to the RF signal module. The wireless signal communication method includes: rotating the antenna module, determining the intensity of the RF signal received by the antenna module, and stopping the rotation of the antenna module. Therefore, the antenna module can dynamically adjust its orientation to receive the RF signal with sufficient intensity.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: July 5, 2022
    Assignee: HTC CORPORATION
    Inventors: Cheng Hung Lin, Chia Te Chien, Chun Hsien Lee
  • Publication number: 20220205128
    Abstract: Provides an electropolishing treatment method for a stainless steel workpiece, wherein the method comprises the following steps: placing the stainless steel workpiece in an oxalic acid solution and performing supersonic oscillation; performing a first electropolishing treatment to the stainless steel workpiece, wherein the first electropolishing treatment uses the stainless steel workpiece as an anode and 10% to 15% perchloric acid as an electrolyte, and when a constant voltage is set as 12V, the first electropolishing treatment procedure is performed; and performing a second electropolishing treatment to the stainless steel workpiece, wherein the second electropolishing treatment uses the stainless steel workpiece after the first electropolishing treatment as an anode, and an electrolyte consists of ethanol, sulfuric acid and perchloric acid, and when a constant voltage is set as 12V, the second electropolishing treatment is performed to obtain the stainless steel workpiece after the second electropolishing
    Type: Application
    Filed: December 27, 2021
    Publication date: June 30, 2022
    Inventors: CHUN-HSIANG KAO, YI-CHERNG FERNG, KUO-KUANG JEN, SHUN-YI JIAN, MING-HSIEN LIN, YU-CHIH TZENG, CHIA-YU LEE
  • Publication number: 20220209083
    Abstract: An electronic device including a substrate, an electronic unit, a data line, a control unit, a test pad and a test switch element is provided by the present disclosure. The substrate includes a first surface and a second surface opposite to the first surface, wherein the first surface includes an active area. The electronic unit is disposed on the substrate and located in the active area. The data line is disposed on the substrate. The control unit is disposed on the substrate and located in the active area, and the control unit is electrically connected between the electronic unit and the data line. The test pad is disposed on the second surface of the substrate. The test switch element is disposed on the substrate and located in the active area, and the test switch element is electrically connected between the data line and the test pad.
    Type: Application
    Filed: November 24, 2021
    Publication date: June 30, 2022
    Applicant: InnoLux Corporation
    Inventor: Chun-Hsien LIN
  • Publication number: 20220197414
    Abstract: A touch display device is provided in this disclosure. The touch display device includes a substrate, a first conductive layer, a second conductive layer, a stacked structure, an inorganic light emitting unit, and a touch sensing circuit. The first conductive layer is disposed on the substrate. The first conductive layer includes a gate electrode. The second conductive layer is disposed on the first conductive layer. The second conductive layer includes a source electrode and a drain electrode. The stacked structure is disposed on the substrate. The staked structure includes a conductive channel and a sensing electrode. The inorganic light emitting unit is disposed on the stacked structure. The inorganic light emitting unit is electrically connected with the drain electrode via the conductive channel. The touch sensing circuit is electrically connected with the sensing electrode.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Applicant: InnoLux Corporation
    Inventors: Po-Yang Chen, Hsing-Yuan Hsu, Tzu-Min Yan, Chun-Hsien Lin, Kuei-Sheng Chang
  • Patent number: 11367725
    Abstract: A method for fabricating a buried word line (BWL) of a dynamic random access memory (DRAM) includes the steps of: forming a first doped region in a substrate; removing part of the first doped region to form a trench in the substrate; forming a gate structure in the trench; and forming a barrier structure between the gate structure and the first doped region.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: June 21, 2022
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Chun-Hsien Lin, Fu-Che Lee
  • Publication number: 20220181481
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; removing part of the first fin-shaped structure to form a first trench; forming a dielectric layer in the first trench to form a double diffusion break (DDB) structure; and forming a first gate structure and a second gate structure on the DDB structure. Preferably, a bottom surface of the first gate structure is lower than a top surface of the first fin-shaped structure.
    Type: Application
    Filed: January 4, 2021
    Publication date: June 9, 2022
    Inventors: Shou-Wan Huang, Chun-Hsien Lin
  • Patent number: 11355639
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; removing part of the first fin-shaped structure to form a first trench; forming a dielectric layer in the first trench to form a double diffusion break (DDB) structure; and forming a first gate structure and a second gate structure on the DDB structure. Preferably, a bottom surface of the first gate structure is lower than a top surface of the first fin-shaped structure.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: June 7, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shou-Wan Huang, Chun-Hsien Lin
  • Publication number: 20220173306
    Abstract: A semiconductor device for internet of things (IoT) device includes a substrate having an array region defined thereon and a ring of dummy pattern surrounding the array region. Preferably, the ring of dummy pattern includes a plurality of magnetic tunneling junctions (MTJs) and a ring of metal interconnect pattern overlapping the MTJs and surrounding the array region. The semiconductor device further includes a gap between the array region and the ring of dummy pattern.
    Type: Application
    Filed: December 27, 2020
    Publication date: June 2, 2022
    Inventors: Hui-Lin Wang, Chun-Hsien Lin
  • Patent number: 11342319
    Abstract: A display device includes a substrate, a first signal line disposed on the substrate, and a first pixel including a first transistor having a gate electrode, a source electrode and a drain electrode, wherein the source electrode is electrically connected to the first signal line. The display device includes a fan-out line electrically connected to the first signal line, wherein the fan-out line partially overlaps the first pixel and is formed in a layer different from layers of the gate electrode, the source electrode and the drain electrode.
    Type: Grant
    Filed: November 22, 2020
    Date of Patent: May 24, 2022
    Assignee: InnoLux Corporation
    Inventors: Chun-Hsien Lin, Tsau-Hua Hsieh
  • Patent number: 11335827
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: May 17, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Kai Cheng, Tsau-Hua Hsieh, Fang-Ying Lin, Tung-Kai Liu, Hui-Chieh Wang, Chun-Hsien Lin, Jui-Feng Ko
  • Publication number: 20220141964
    Abstract: An electronic device is provided, the electronic device includes a driving substrate (13), the driving substrate includes a plurality of circular grooves and a plurality of rectangular grooves, and a plurality of disc-shaped electronic components, at least one disc-shaped electronic component is disposed in at least one circular groove, an alignment element positioned on a top surface of the at least one disc-shaped electronic component, a diameter of the at least one disc-shaped electronic component is defined as R, a diameter of the alignment element is defined as r, a width of at least one rectangular groove among the rectangular grooves is defined as w, and a height of the at least one rectangular groove is defined as H, and the disc-shaped electronic component and the rectangular groove satisfy the condition of (R+r)/2>(w2+H2)1/2.
    Type: Application
    Filed: October 21, 2021
    Publication date: May 5, 2022
    Applicant: InnoLux Corporation
    Inventor: Chun-Hsien LIN
  • Publication number: 20220140185
    Abstract: An electronic device is provided, the electronic device includes a driving substrate, the driving substrate includes a plurality of circular grooves and a plurality of rectangular grooves, a plurality of disc-shaped light-emitting units, at least one disc-shaped light-emitting unit is disposed in at least one circular groove, and the at least one disc-shaped light-emitting unit includes an alignment element positioned on a top surface of the at least one disc-shaped light-emitting unit, a diameter of the at least one disc-shaped light-emitting unit is defined as R, a diameter of the alignment element is defined as r, a width of at least one rectangular groove among the rectangular grooves is defined as w, and a height of the at least one rectangular groove is defined as H, and the at least one disc-shaped light-emitting unit and the at least one rectangular groove satisfy the condition of (R+r)/2>(w2+H2)1/2.
    Type: Application
    Filed: December 3, 2020
    Publication date: May 5, 2022
    Inventor: Chun-Hsien LIN
  • Publication number: 20220139963
    Abstract: An electronic device is provided. The electronic device includes a substrate, a light-emitting unit, and a circuit layer. The substrate has a first surface and a second surface, and the second surface is opposite the first surface. The light-emitting unit is disposed on the first surface, and the circuit layer is disposed on the second surface. The circuit layer includes a first layer and a second layer. The second layer is disposed on the first layer. The first layer includes a plurality of first wirings. The second layer includes a plurality of second wirings. The plurality of first wirings intersect with the plurality of second wirings.
    Type: Application
    Filed: September 16, 2021
    Publication date: May 5, 2022
    Inventor: Chun-Hsien LIN
  • Publication number: 20220140218
    Abstract: An embodiment of the disclosure provides an electronic device including multiple units. Each unit in the units includes multiple primary bonding regions and at least one reserved bonding region. Each reserved bonding region is connected to the primary bonding regions. The number of the at least one reserved bonding region is less than the number of primary bonding regions.
    Type: Application
    Filed: October 19, 2021
    Publication date: May 5, 2022
    Applicant: Innolux Corporation
    Inventors: Chun-Hsien Lin, Shuhei Hosaka