Patents by Inventor Chun-Hung Lin

Chun-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230371249
    Abstract: An antifuse-type one time programming memory cell at least includes an antifuse transistor. The antifuse transistor includes a first nanowire, a first gate structure, a first drain/source structure and a second drain/source structure. The first nanowire is surrounded by the first gate structure. The first gate structure comprises a first spacer, a second spacer, a first gate dielectric layer and a first gate layer. The first drain/source structure is electrically contacted with a first terminal of the first nanowire. The second drain/source structure is electrically contacted with a second terminal of the first nanowire.
    Type: Application
    Filed: March 13, 2023
    Publication date: November 16, 2023
    Inventors: Lun-Chun CHEN, Ping-Lung HO, Chun-Hung LIN
  • Patent number: 11818884
    Abstract: A method for manufacturing a non-volatile memory device is provided. The method includes forming a trench through a sacrificial layer and extending into a substrate, filling a first insulating material into the trench, and implanting a dopant in the first insulating material by an implantation process. Then, the first insulating material is partially removed to form a first recess between the sacrificial layers. The lowest point of the first recess is lower than the top surface of the substrate. The method includes filling a second insulating material in the first recess and removing the sacrificial layer to form a second recess adjacent to the second insulating material. The method includes forming a first polycrystalline silicon layer in the second recess, and sequentially forming a dielectric layer and a second polycrystalline silicon layer on the first polycrystalline silicon layer.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: November 14, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Chien-Hsien Wu, Chun-Hung Lin, Kao-Tsair Tsai, Yao-Ting Tsai
  • Publication number: 20230356113
    Abstract: A vapor chamber includes a vapor chamber main body, a degassing tube, and a fixing layer. The vapor chamber main body includes a first casing and a second casing correspondingly sealed with the first casing. The first casing is disposed with a tube trough. One of the first casing and the second casing is formed with a filling hole corresponding to the tube trough. The degassing tube is placed in the tube trough. A feeding channel communicating with the filling hole is formed between the degassing tube, the tube trough and the second casing. The fixing layer is formed in the feeding channel to fasten the degassing tube on the vapor chamber main body. Therefore, the production procedure may be simplified and the degassing tube may be firmly fastened on the vapor chamber main body.
    Type: Application
    Filed: August 18, 2022
    Publication date: November 9, 2023
    Inventor: Chun-Hung LIN
  • Publication number: 20230349644
    Abstract: A combination structure of a vapor chamber and a heat pipe includes a half-shell seat element, a half-shell cover element, a wick structure, and a working fluid. The half-shell seat element includes a vapor chamber half-shell seat and multiple heat pipe half-shell seats. Each heat pipe half-shell seat is extended from the vapor chamber half-shell seat. The vapor chamber half-shell seat includes a vapor chamber cavity. Each heat pipe half-shell seat includes a heat pipe cavity. Each heat pipe cavity communicates with the vapor chamber cavity. The half-shell cover element is sealedly connected with the half-shell seat element. The wick structure is continuously laid on the vapor chamber half-shell seat and each heat pipe half-shell seat, and is formed in the vapor chamber cavity and each heat pipe cavity. The working fluid is disposed in the vapor chamber cavity.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 2, 2023
    Inventor: Chun-Hung LIN
  • Publication number: 20230354552
    Abstract: An assembly structure of a vapor chamber and a heat pipe includes a vapor chamber half housing, multiple heat pipe half housings, a half housing covering component, a capillary structure, and a working fluid. The vapor chamber half housing has a bottom plate and a lower surrounding plate. A vapor chamber room is enclosed between the bottom plate and the lower surrounding plate, and the lower surrounding plate has multiple lower engaging half rings. The heat pipe half housings are connected to the lower engaging half rings. The half housing covering component is connected and sealed with the vapor chamber half housing and the heat pipe half housings. The capillary structure is continuously disposed on the vapor chamber half housing and the heat pipe half housings and disposed in the vapor chamber room and the heat pipe rooms.
    Type: Application
    Filed: August 18, 2022
    Publication date: November 2, 2023
    Inventor: Chun-Hung LIN
  • Publication number: 20230345670
    Abstract: A vapor chamber and a manufacturing method thereof are disclosed. The vapor chamber includes a first housing, multiple supporting columns, a capillary structure, a second housing, a bonding layer, and a working fluid. The first housing includes an inner surface. Each supporting column is disposed on the inner surface of the first housing and includes an end surface. The capillary structure is disposed on the inner surface of the first housing. The second housing is sealed with the first housing correspondingly to jointly define a chamber. The bonding layer is formed between the inner surface of the first housing and the end surfaces of the supporting columns. The working fluid is arranged inside the chamber. Accordingly, it is able to swiftly changing the positions of the supporting columns according to the actual cooling needs, thereby significantly reducing the manufacturing time required.
    Type: Application
    Filed: August 18, 2022
    Publication date: October 26, 2023
    Inventor: Chun-Hung LIN
  • Publication number: 20230337398
    Abstract: A heat dissipation module is provided. The heat dissipation module has a heat conductive housing and at least one heat pipe. The heat conductive housing has a first half housing and a second half housing. The first half housing and the second half housing are coupled with each other. A capillary is attached to an internal surface of the heat conductive housing, and the heat conductive housing is filled with a working fluid. The heat pipe penetrates through the heat conductive housing. The heat pipe is attached to an internal surface of a bottom of the first half housing.
    Type: Application
    Filed: May 12, 2022
    Publication date: October 19, 2023
    Inventor: Chun-Hung LIN
  • Publication number: 20230324130
    Abstract: A heat dissipation module includes a housing, a first capillary structure, and at least two heat pipe assemblies. The outer periphery of the housing has multiple sidewalls. At least two sidewalls have an opening and an inner rim formed inside the opening. The first capillary structure covers the interior of the housing and is disposed along each inner rim. Each heat pipe assembly includes a cover plate, multiple heat pipes and a second capillary structure. Each cover plate has multiple through holes and an inner sidewall. Each heat pipe has an open end connected and sealed with each corresponding through hole. Each second capillary structure covers each inner sidewall and the interior of the heat pipes. Each cover plate covers each corresponding opening, such that each second capillary structure is attached closely to the first capillary structure.
    Type: Application
    Filed: May 13, 2022
    Publication date: October 12, 2023
    Inventor: Chun-Hung LIN
  • Patent number: 11783905
    Abstract: When a driving circuit of an anti-fuse memory device programs a selected anti-fuse memory cell, voltage differences between unselected bit lines and unselected anti-fuse control lines would be eliminated or decreased to an acceptable value by floating unselected anti-fuse control lines or by applying a second control line voltage to the unselected anti-fuse control lines. Leakage currents flowing from unselected bit lines through ruptured anti-fuse transistors of the anti-fuse memory device to the unselected anti-fuse control lines would be decreased or eliminated, and program disturbance would be avoided.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: October 10, 2023
    Assignee: eMemory Technology Inc.
    Inventors: Chieh-Tse Lee, Ting-Yang Yen, Cheng-Da Huang, Chun-Hung Lin
  • Publication number: 20230317520
    Abstract: A manufacturing method for a semiconductor structure is provided. First active areas, a second active area, and a third active area are formed. A first dielectric layer is formed on the active areas. A patterned region that includes a cavity region and a dielectric region is formed in the first dielectric layer, and the cavity region surrounds the dielectric region. A filling layer is formed in the cavity region. Multiple first contact holes and at least one second contact hole that penetrate the first dielectric layer are formed. Each first contact hole exposes a portion of the corresponding first active area, and the second contact hole replaces the dielectric region and exposes a portion of the second active area. Metal layers are filled in to the first contact holes and the second contact hole.
    Type: Application
    Filed: April 4, 2022
    Publication date: October 5, 2023
    Inventors: Chun-Hung LIN, Kao-Tsair TSAI, Chung-Hsien LIU, Tz-Hau GUO, Yen-Jui CHU
  • Publication number: 20230295627
    Abstract: This invention generally relates to a novel composition of RNA/mRNA medicines as well as vaccines produced by using replicase- and/or RNA-dependent RNA polymerase (RdRp)-mediated RNA cycling reaction (RCR). The present invention is useful for developing a variety of self-amplifying RNA/mRNA (samRNA) medicines and vaccines containing at least a replicase/RdRp-binding site in the 5?- or 3?-end, or both, of any desired RNA molecule, including but not limited to antisense RNA (aRNA), small interferring RNA (siRNA), short hairpin RNA (shRNA), microRNA (miRNA)/miRNA precursor, long non-coding RNA (lnRNA) and mRNA. These RNA molecules can be either in single-stranded or in double-stranded, or mixed, conformation. The samRNA so obtained is useful not only for producing RNA-based vaccines and/or medicines but also for generating the mRNA-associated proteins, peptides, and/or antibodies under a proper in-vitro or in-cell translation condition.
    Type: Application
    Filed: January 18, 2023
    Publication date: September 21, 2023
    Inventors: Shi-Lung Lin, Sam Lin, Chun-Hung Lin
  • Patent number: 11746466
    Abstract: A water-repellent fabric includes a base cloth and a water-repellent resin. The water-repellent resin is disposed on the base cloth, in which a method of fabricating the water-repellent resin includes the following steps. A first thermal process is performed to mix a polyol, a cross-linking agent, and a choline to form a first mixture, in which a reaction temperature of the first thermal process is between 90° C. and 120° C. A second thermal process is performed to mix the first mixture and a water repellent to form the water-repellent resin, in which the water repellent includes a hydroxyl group, an amino group, or combinations thereof, and a reaction temperature of the second thermal process is between 120° C. and 150° C.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: September 5, 2023
    Assignee: TAIWAN TEXTILE RESEARCH INSTITUTE
    Inventors: Chen-Shou Hsu, Sun-Wen Juan, Chun-Hung Lin
  • Patent number: 11739445
    Abstract: A temperature-responsive material having a structure represented by formula (I): is provided, where in formula (I), X has a structure represented by formula (i) or formula (ii): x and y are in a molar ratio of 9:1 to 1:3, n is an integer of 7 to 120, and m is an integer of 10 to 1,000.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: August 29, 2023
    Assignee: Taiwan Textile Research Institute
    Inventors: Wen-Hsiang Chen, Chun-Hung Lin
  • Publication number: 20230262994
    Abstract: A resistive memory cell includes a P-well region, an isolation structure, an N-well region, a first gate structure, a second gate structure, a first N-type doped region, a second N-type doped region, a third N-type doped region, a fourth N-type doped region, a word line, a bit line, a conductor line and a program line. The third N-type doped region, the fourth N-type doped region and the N-well region are collaboratively formed as an N-type merged region. The bit line is connected with the first N-type doped region. The word line is connected with a conductive layer of the first gate structure. The conductor line is connected with the second N-type doped region and a conductive layer of the second gate structure. The program line is connected with the N-type merged region.
    Type: Application
    Filed: February 9, 2023
    Publication date: August 17, 2023
    Inventors: Tsung-Mu LAI, Wei-Chen CHANG, Chun-Hung LIN
  • Publication number: 20230253370
    Abstract: A chip includes a semiconductor substrate, an electrical connector over the semiconductor substrate, and a molding compound molding a lower part of the electrical connector therein. A top surface of the molding compound is lower than a top end of the electrical connector. A recess extends from the top surface of the molding compound into the molding compound.
    Type: Application
    Filed: April 18, 2023
    Publication date: August 10, 2023
    Inventor: Chun-Hung Lin
  • Publication number: 20230229208
    Abstract: An air-liquid composite cooler for a memory module is provided. The memory module has a top portion and two side portions. The air-liquid composite cooler includes a liquid-cooling structure and a pair of air-cooling structures. The liquid-cooling structure is arranged on the top portion and has a liquid passage. The air-cooling structure is arranged on a side portion, and includes a phase-change thermo-conductive member. One end of the phase-change thermo-conductive member contacts the liquid-cooling structure to conduct heat and another end of the phase-change thermo-conductive member is extended in a direction away from the liquid-cooling structure. Therefore, the overall cooling efficiency of the cooler may be improved.
    Type: Application
    Filed: June 14, 2022
    Publication date: July 20, 2023
    Inventors: Chun-Hung Lin, Hamid Nalbandian, Chun-Teng Chiu, Kuang-Lu Lee
  • Publication number: 20230198973
    Abstract: Techniques of service to service authentication in distributed computing systems are disclosed herein. One example technique includes identifying a token type of a security token and an authentication scheme indicated in an access request for authenticating the access request. The example technique also includes using a combination of the identified token type of the security token and the authentication scheme indicated in the access request as a key to locate an authentication pattern in a mapping table and identifying an authentication policy corresponding to the authentication pattern. The example technique can then include applying the identified authentication policy to the received data package to authenticate the access request based on the security token and conditionally providing the client service access to the platform service.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 22, 2023
    Inventors: Chun-Hung Lin, Matthias Leibmann
  • Publication number: 20230197156
    Abstract: A non-volatile memory cell includes a first select transistor, a first floating gate transistor, a second floating gate transistor and a second select transistor. The first select transistor is connected with a program source line and a program word line. The first floating gate transistor includes a floating gate. The first floating gate transistor is connected with the first select transistor and a program bit line. The second floating gate transistor includes a floating gate. The second floating gate transistor is connected with a read source line. The second select transistor is connected with the second floating gate transistor, the read word line and the read bit line. The floating gate of the second floating gate transistor is connected with the floating gate of the first floating gate transistor.
    Type: Application
    Filed: August 16, 2022
    Publication date: June 22, 2023
    Inventors: Chih-Chun CHEN, Chun-Hung LIN
  • Publication number: 20230174706
    Abstract: A zwitterionic resin is manufactured by a manufacturing method which includes the following steps. A first thermal process is performed on a first crosslinking agent and a choline having hydroxyl group or amino group to form a first mixture, in which the first crosslinking agent includes an isocyanate group. A second thermal process is performed on the first mixture, a second crosslinking agent, a chain extender, and an amino acid to form the zwitterionic resin, in which the chain extender includes a polyol.
    Type: Application
    Filed: July 1, 2022
    Publication date: June 8, 2023
    Inventors: Chen-Shou HSU, Sun-Wen JUAN, Chun-Hung LIN
  • Patent number: 11661480
    Abstract: A poly(amide-imide) is provided. The poly(amide-imide) is represented by formula (1), wherein R is a C6 aryl group, a C7-C8 aralkyl group, a C2-C6 alkoxyalkyl group, or a C3-C18 alkyl group; and 0.02?X?0.5.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: May 30, 2023
    Assignee: Taiwan Textile Research Institute
    Inventors: Shang-Chih Chou, Shao-Yen Chang, Chun-Hung Lin