Patents by Inventor Chun-Lang Chen

Chun-Lang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180149960
    Abstract: A method of fabricating a photomask includes depositing a phase shifter over a light transmitting substrate, depositing a shading layer over the light transmitting substrate, and removing a portion of the shading layer and a portion of the phase shifter to expose a portion of the light transmitting substrate. The phase shifter having at least two semiconductor layers and at least two dielectric layers.
    Type: Application
    Filed: January 5, 2017
    Publication date: May 31, 2018
    Inventors: Chun-Lang CHEN, Chih-Chiang TU, Shih-Hao YANG
  • Patent number: 9953833
    Abstract: Provided is a method for creating a mask blank that includes a capping layer and a shifter layer. The capping layer is optically compatible and process compatible with the shifter layer. The method may include providing a cleaned and polished mask substrate to a deposition tool and depositing, within the deposition tool, a shifter layer over a cleaned and polished mask substrate. The shifter layer may include each material of a set of materials in a first proportion. The method may also include depositing an additional layer over the shifter layer, the additional layer providing a capping layer over the shifter layer. The capping layer includes the materials in a second proportion unequal to the first proportion. The capping layer includes molybdenum, silicon, and nitride in a proportion that aids in detection by a residual gas analyzer. Also provided is also a mask blank structure incorporating the compatible capping layer.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: April 24, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Boming Hsu, Tran-Hui Shen
  • Patent number: 9921467
    Abstract: A mask blank and a mask are provided. The mask blank includes a substrate, and an etching stop layer embedded in the substrate. The mask includes the mask blank with the embedded etching stop layer, and a plurality of recesses formed in the mask blank. The recess exposes the embedded etching stop layer.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: March 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen
  • Publication number: 20180059534
    Abstract: A method includes depositing a first material layer over a first substrate; and depositing a graphene layer over the first material layer. The method further includes depositing an amorphous silicon layer over the graphene layer and bonding the amorphous silicon layer to a second substrate, thereby forming an assembly. The method further includes annealing the assembly, thereby converting the amorphous silicon layer to a silicon oxide layer. The method further includes removing the first substrate from the assembly and removing the first material layer from the assembly, thereby exposing the graphene layer.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 1, 2018
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Chue San Yoo, Jong-Yuh Chang, Chia-Shiung Tsai, Ping-Yin Liu, Hsin-Chang Lee, Chih-Cheng Lin, Yun-Yue Lin
  • Publication number: 20180059535
    Abstract: A method includes depositing a first material layer over a substrate; and depositing a graphene layer over the first material layer, thereby forming a first assembly. The method further includes attaching a carrier to the graphene layer; removing the substrate from the first assembly; and removing the first material layer from the first assembly.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 1, 2018
    Inventors: Chih-Chiang Tu, Chun-Lang Chen
  • Publication number: 20170345703
    Abstract: A spin dry etching process includes loading an object into a dry etching system. A dry etching process is performed to the object, and the object is spun while the dry etching process is being performed. The spin dry etching process is performed using a semiconductor fabrication system. The semiconductor fabrication system includes a dry etching chamber in which a dry etching process is performed. A holder apparatus has a horizontally-facing slot that is configured for horizontal insertion of an etchable object therein. The etchable object includes either a photomask or a wafer. A controller is communicatively coupled to the holder apparatus and configured to spin the holder apparatus in a clockwise or counterclockwise direction while the dry etching process is being performed. An insertion of the etchable object into the horizontally-facing slot of the holder apparatus restricts a movement of the object as the dry etching process is performed.
    Type: Application
    Filed: July 7, 2016
    Publication date: November 30, 2017
    Inventors: Chih-Chiang Tu, Chun-Lang Chen
  • Patent number: 9829786
    Abstract: A phase shift mask blank includes a transparent substrate, a phase shift layer, a first hard mask layer and an opaque layer. The transparent substrate is disposed on the transparent substrate. The first hard mask layer is disposed on the phase shift layer. The phase shift layer has an etching selectivity with respect to the first hard mask layer. The opaque layer is disposed on the first hard mask layer.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: November 28, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Lang Chen, Tzung-Shiun Liu
  • Publication number: 20170293218
    Abstract: In some embodiments, a patterned photomask has a plurality of shielding layers. In some embodiments, a photomask for mask patterning is described. The photomask includes a phase shift layer overlying a transparent layer. The photomask also includes a first shielding layer overlying the phase shift layer. The first shielding layer has a first thickness and a first optical density. The photomask further includes a second shielding layer overlying the first shielding layer. The second shielding layer has a second thickness and a second optical density. The second thickness is less that than the first thickness and the second optical density is less than the first optical density.
    Type: Application
    Filed: November 28, 2016
    Publication date: October 12, 2017
    Inventors: Chih-Chiang Tu, Chun-Lang Chen
  • Publication number: 20170168387
    Abstract: A system and method for repairing a photolithographic mask is provided. An embodiment comprises forming a shielding layer over an absorbance layer on a substrate. Once the shielding layer is in place, the absorbance layer may be repaired using, e.g., an e-beam process to initiate a reaction to repair a defect in the absorbance layer, with the shielding layer being used to shield the remainder of the absorbance layer from undesirable etching during the repair process.
    Type: Application
    Filed: February 27, 2017
    Publication date: June 15, 2017
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Jong-Yuh Chang, Boming Hsu, Tran-Hui Shen
  • Publication number: 20170153539
    Abstract: A mask blank and a mask are provided. The mask blank includes a substrate, and an etching stop layer embedded in the substrate. The mask includes the mask blank with the embedded etching stop layer, and a plurality of recesses formed in the mask blank. The recess exposes the embedded etching stop layer.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 1, 2017
    Inventors: CHIH-CHIANG TU, CHUN-LANG CHEN
  • Patent number: 9581894
    Abstract: A system and method for repairing a photolithographic mask is provided. An embodiment comprises forming a shielding layer over an absorbance layer on a substrate. Once the shielding layer is in place, the absorbance layer may be repaired using, e.g., an e-beam process to initiate a reaction to repair a defect in the absorbance layer, with the shielding layer being used to shield the remainder of the absorbance layer from undesirable etching during the repair process.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Jong-Yuh Chang, Boming Hsu, Tran-Hui Shen
  • Publication number: 20160377974
    Abstract: A phase shift mask blank includes a transparent substrate, a phase shift layer, a first hard mask layer and an opaque layer. The transparent substrate is disposed on the transparent substrate. The first hard mask layer is disposed on the phase shift layer. The phase shift layer has an etching selectivity with respect to the first hard mask layer. The opaque layer is disposed on the first hard mask layer.
    Type: Application
    Filed: June 29, 2015
    Publication date: December 29, 2016
    Inventors: Chun-Lang CHEN, Tzung-Shiun LIU
  • Patent number: 9513542
    Abstract: A first embodiment is a lithography mask comprising a transparent substrate and a first molybdenum silicon nitride (MoxSiyNz) layer. The first MoxSiyNz layer is over the transparent substrate. A percentage of molybdenum (x) of the first MoxSiyNz layer is between 1 and 2. A percentage of silicon (y) of the first MoxSiyNz layer is between 50 and 55. A percentage of nitride (z) of the first MoxSiyNz layer is between 40 and 50. The first MoxSiyNz layer has an opening therethrough.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: December 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chue San Yoo, Chun-Lang Chen
  • Publication number: 20160284616
    Abstract: An apparatus for increasing the uniformity in a critical dimension of chemical vapor deposition and etching during substrate processing, comprising a plurality of gas injectors for admitting a processing gas into an etching chamber. Each gas injector of the plurality of gas injectors is disposed along a track within the etching chamber and moveable along the track. Further, each gas injector is coupled with a throttling valve or nozzle to permit adjustment of processing gas flow rate. A method for increasing the uniformity in a critical dimension of chemical vapor deposition and etching during substrate processing includes performing a chemical deposition or etch using the plurality of moveable and adjustable gas injectors and measuring the critical dimension uniformity. Adjustments to the location of at least one gas injector or the processing gas flow rate to at least one gas injector are made to increase critical dimension uniformity.
    Type: Application
    Filed: June 10, 2016
    Publication date: September 29, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tzung-Shiun LU, Chun-Lang CHEN, Shih-Hao YANG, Jong-Yuh CHANG
  • Patent number: 9377701
    Abstract: In some embodiments, a mask patterning system includes an electronic memory configured to store an integrated circuit mask layout. A computation tool determines a number of radiation shots to be used to write the integrated circuit mask layout to a physical mask. The computation tool also determines a scaling factor which accounts for expected thermal expansion of the physical mask due to the number of radiation shots used in writing the integrated circuit mask layout to the physical mask. An ebeam or laser writing tool writes the integrated circuit mask layout to the physical mask based on the scaling factor and by using the number of radiation shots.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: June 28, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Jong-Yuh Chang, Chien-Chih Chen, Chen-Shao Hsu
  • Patent number: 9373551
    Abstract: An apparatus for increasing the uniformity in a critical dimension of chemical vapor deposition and etching during substrate processing, comprising a plurality of gas injectors for admitting a processing gas into an etching chamber. Each gas injector of the plurality of gas injectors is disposed along a track within the etching chamber and moveable along the track. Further, each gas injector is coupled with a throttling valve or nozzle to permit adjustment of processing gas flow rate. A method for increasing the uniformity in a critical dimension of chemical vapor deposition and etching during substrate processing includes performing a chemical deposition or etch using the plurality of moveable and adjustable gas injectors and measuring the critical dimension uniformity. Adjustments to the location of at least one gas injector or the processing gas flow rate to at least one gas injector are made to increase critical dimension uniformity.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: June 21, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzung-Shiun Lu, Chun-Lang Chen, Shih-Hao Yang, Jong-Yuh Chang
  • Publication number: 20160013058
    Abstract: Provided is a method for creating a mask blank that includes a capping layer and a shifter layer. The capping layer is optically compatible and process compatible with the shifter layer. The method may include providing a cleaned and polished mask substrate to a deposition tool and depositing, within the deposition tool, a shifter layer over a cleaned and polished mask substrate. The shifter layer may include each material of a set of materials in a first proportion. The method may also include depositing an additional layer over the shifter layer, the additional layer providing a capping layer over the shifter layer. The capping layer includes the materials in a second proportion unequal to the first proportion. The capping layer includes molybdenum, silicon, and nitride in a proportion that aids in detection by a residual gas analyzer. Also provided is also a mask blank structure incorporating the compatible capping layer.
    Type: Application
    Filed: September 17, 2015
    Publication date: January 14, 2016
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Boming Hsu, Tran-Hui Shen
  • Publication number: 20150370158
    Abstract: A system and method for repairing a photolithographic mask is provided. An embodiment comprises forming a shielding layer over an absorbance layer on a substrate. Once the shielding layer is in place, the absorbance layer may be repaired using, e.g., an e-beam process to initiate a reaction to repair a defect in the absorbance layer, with the shielding layer being used to shield the remainder of the absorbance layer from undesirable etching during the repair process.
    Type: Application
    Filed: August 31, 2015
    Publication date: December 24, 2015
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Jong-Yuh Chang, Boming Hsu, Tran-Hui Shen
  • Patent number: 9202947
    Abstract: A photovoltaic device manufacturing method is disclosed. Methods include manufacturing a photovoltaic cell using nanoimprint technology to define individual cell units of the photovoltaic device. The methods can include providing a substrate; forming a first conductive layer over the substrate; forming first grooves in the first conductive layer using a nanoimprint and etching process; forming an absorption layer over the first conductive layer, the absorption layer filling in the first grooves; forming second grooves in the absorption layer using a nanoimprint process; forming a second conductive layer over the absorption layer, the second conductive layer filling in the second grooves; and forming third grooves in the second conductive layer and the absorption layer, thereby defining a photovoltaic cell unit.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: December 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen
  • Patent number: 9142423
    Abstract: Provided is a method for creating a mask blank that includes a stop layer. The stop layer is optically compatible and process compatible with other layers included as part of the mask blanks. Such blanks may include EUV, phase-shifting, or OMOG masks. The stop layer includes molybdenum, silicon, and nitride in a proportion that allows for compatibility and aids in detection by a residual gas analyzer. Provided is also a method for the patterning of mask blanks with a stop layer, particularly the method for removing semi-transparent residue defects that may occur due to problems in prior mask creation steps. The method involves the detection of included materials with a residual gas analyzer. Provided is also a mask blank structure which incorporates the compatible stop layer.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: September 22, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Boming Hsu, Tran-Hui Shen