Abstract: A method for monitoring an electric vehicle charging apparatus is provided. A charging pile that includes a power meter and a processor is used to provide a charging current to an electric vehicle through a charging connector. The power meter detects the charging current to generate an initial current value and an initial power value that correspond to an initial charging time, and a present current value and a present power value that correspond to a present time, so that the processor calculates an initial resistance value and a present resistance value of the charging connector accordingly, and then calculates an estimated present temperature value of the charging connector based on the initial resistance value and the present resistance value. The estimated present temperature value is compared with an over-temperature threshold to determine whether to reduce the charging current.

Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.

Abstract: An electronic device is disclosed, which includes: a support unit; a display panel disposed on the support unit; a first circuit board, wherein the support unit is disposed between the display panel and the first circuit board; an electronic component disposed on the first circuit board; and a second circuit board electrically connected to the display panel, wherein the first circuit board is electrically connected to the display panel through the second circuit board, wherein the first circuit board includes a protruding section, and the electronic component is disposed on the protruding section.

Abstract: A fault diagnosis method applied to an optical tunnel network system (OPTUNS) having multiple optical switches and multiple optical fibers connected to the multiple optical switches is disclosed and includes following steps: detecting whether the multiple tunnels of the OPTUNS include a faulty tunnel, where each tunnel respectively passes through multiple component parts; when the faulty tunnel is detected, querying the multiple component parts that are passed through by the tunnels within a certain range with the faulty tunnel; respectively calculating a faulty count of each component part queried, where the faulty count indicates the quantity that the component parts being passed through by the faulty tunnels; and outputting one or more of the component parts that have the faulty count of non-zero.

Abstract: A magnetic memory including a substrate, a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ) stack, a first protection layer, and a second protection layer is provided. The SOT layer is located over the substrate. The MTJ stack is located on the SOT layer. The first protection layer and the second protection layer are located on the sidewall of the MTJ stack. The first protection layer is located between the second protection layer and the MTJ stack. There is a notch between the second protection layer and the SOT layer.

Abstract: A fitting for an upper brush in a double brush scrubbing chamber of a wafer cleaning system is disclosed. The fitting includes a base plate, a flanged pipe, and a threaded connector. The base plate includes a threaded hole with a stop surface therein and a channel extending from the stop surface through a lower surface of the base plate. The flanged pipe is inserted into the base plate such that the flange at the top end of a hollow tube rests on the stop surface and the hollow tube passes through the channel of the base plate. The threaded connector has a passage therethrough, and engages the threaded hole of the base plate to fix the flanged pipe in place. This structure is able to provide fluid while minimizing particle generation.

Abstract: A display panel includes a substrate and a plurality of pixel structures disposed on the substrate. Each of the pixel structures includes a first light-emitting element, a second light-emitting element, and a third light-emitting element. The first light-emitting element is disposed on the substrate and configured to generate a first colored light. A light output surface of the first light-emitting element includes a combined region. The second light-emitting element is disposed on a part of the combined region and configured to generate a second colored light. The third light-emitting element is disposed on the other part of the combined region and configured to generate a third colored light.

Abstract: A fitting for an upper brush in a double brush scrubbing chamber of a wafer cleaning system is disclosed. The fitting includes a base plate, a flanged pipe, and a threaded connector. The base plate includes a threaded hole with a stop surface therein and a channel extending from the stop surface through a lower surface of the base plate. The flanged pipe is inserted into the base plate such that the flange at the top end of a hollow tube rests on the stop surface and the hollow tube passes through the channel of the base plate. The threaded connector has a passage therethrough, and engages the threaded hole of the base plate to fix the flanged pipe in place. This structure is able to provide fluid while minimizing particle generation.

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.

Abstract: A plating apparatus for electroplating a wafer includes a housing defining a plating chamber for housing a plating solution. A voltage source of the apparatus has a first terminal having a first polarity and a second terminal having a second polarity different than the first polarity. The first terminal is electrically coupled to the wafer. An anode is within the plating chamber, and the second terminal is electrically coupled to the anode. A membrane support is within the plating chamber and over the anode. The membrane support defines apertures, wherein in a first zone of the membrane support a first aperture-area to surface-area ratio is a first ratio, and in a second zone of the membrane support a second aperture-area to surface-area ratio is a second ratio, different than the first ratio.

Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.

Abstract: A device for adjusting the degree of tightness is provided. The device is for a first strap element and a second strap element. The device includes an outer adjustment element, an inner adjustment element, and an intermediate adjustment element. The inner adjustment element is disposed inside the outer adjustment element. The intermediate adjustment element is disposed between the inner adjustment element and the outer adjustment element. The first strap element includes a first hollow region, and the second strap element includes a second hollow region. The inner adjustment element passes through the first hollow region and the second hollow region to adjust the degree of overlapping of the first hollow region and the second hollow region.

Abstract: A button mechanism is provided, including a button element, a magnet connected to the button, a hollow tube, a first coil, and a second coil. The first and second coils are disposed on the tube. When the first coil generates a first magnetic field, the magnet is magnetically attracted by the first coil, and the button element is positioned in the first position. When the second coil generates a second magnetic field, the magnet is attracted by the second coil, and the button element is positioned in the second position.

Abstract: A head-mounted display includes a display device, a connecting structure and a head abutting portion. The connecting structure is in a shape of strip. The connecting structure has two opposite ends. The ends are respectively connected with the display device. The connecting structure and the display device define an accommodation space. The accommodation space is configured to accommodate a head of a user. The head abutting portion is pivotally connected with the connecting structure. The head abutting portion is at least partially located between the connecting structure and the display device. The head abutting portion is configured to abut against the head of the user.

Abstract: A method for a clean procedure during manufacturing a semiconductor device, includes: providing a patterned sacrificial gate structure including a gate dielectric and a sacrificial layer; wherein the patterned sacrificial gate structure is embedded in a dielectric layer and an upper surface of the sacrificial layer is exposed; performing a first etching process to remove the sacrificial layer; and performing a hydrophilic treatment and a hydrophobic treatment to remove a residue of the sacrificial layer.

Abstract: A button mechanism is provided, including a button element, a magnet connected to the button, a hollow tube, a first coil, and a second coil. The first and second coils are disposed on the tube. When the first coil generates a first magnetic field, the magnet is magnetically attracted by the first coil, and the button element is positioned in the first position. When the second coil generates a second magnetic field, the magnet is attracted by the second coil, and the button element is positioned in the second position.

Abstract: A force feedback module is provided. The force feedback module includes a trigger element, an actuating element, and a transmission assembly disposed between the trigger element and the actuating element. The transmission assembly includes a first transmission element. The first transmission element and the trigger element change between a contact state and a non-contact state. When the first transmission element and the trigger element are in the contact state, a driving force generated by the actuating element is transmitted to the trigger element via the transmission assembly to generate force feedback.

Abstract: A control method of a multi-stage etching process and a processing device using the same are provided. The control method of the multi-stage etching process includes the following step S. A stack information of a plurality of hard mask layers is set. An etching target condition is set. Through a machine learning model, a parameter setting recipe of the hard mask layers is generated under the etching target condition. The machine learning model is trained based on the stack information of the hard mask layers, a plurality of process parameters and a process result.

Abstract: A method of cutting fins includes the following steps. A photomask including a snake-shape pattern is provided. A photoresist layer is formed over fins on a substrate. A photoresist pattern in the photoresist layer corresponding to the snake-shape pattern is formed by exposing and developing. The fins are cut by transferring the photoresist pattern and etching cut parts of the fins.

Abstract: A method of fabricating an MTJ device is provided including the following process. A first via is formed in the first dielectric layer. A first electrode layer is formed on the first dielectric layer and the first via. An MTJ stack layer is formed on the first electrode layer. A patterned second electrode layer is formed on the MTJ stack layer and used as a mask. A first ion beam etching process is performed to etch the patterned second electrode layer and pattern the MTJ stack layer and the first electrode layer to form a second electrode, an MTJ stack structure, and a first electrode. A first protective layer is formed to cover the second electrode and the MTJ stack structure. A second ion beam etching process is performed to remove a portion of the MTJ stack structure and a portion of the first electrode.