Patents by Inventor Chun-Lung Chen

Chun-Lung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240245213
    Abstract: A slide rail mechanism is configured to a cabinet. The slide rail mechanism includes a first rail assembly, a second rail assembly and a working member. The first and second assemblies are arranged on the cabinet. The working member is shiftable with respect to the cabinet. When a second rail of the first rail assembly is opened with respect to a first rail, the working member is moved in a transverse direction for preventing a fourth rail of the second rail assembly to be opened from a retracted position with respect to a third rail.
    Type: Application
    Filed: May 18, 2023
    Publication date: July 25, 2024
    Applicants: KING SLIDE WORKS CO., LTD., KING SLIDE TECHNOLOGY CO.,LTD.
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Yi-Syuan Jhao, Chun-Chiang Wang
  • Publication number: 20240245212
    Abstract: A slide rail mechanism is configured to a cabinet. The cabinet includes a wall with a first side and a second side opposite to the first side. The slide rail mechanism includes a first slide rail assembly, a second slide rail assembly and a working member. When a second rail of the first slide rail assembly is opened with respect to a first rail, the second rail is able to drive the working member for preventing a fourth rail of the second slide rail assembly to be opened with respect to a third rail.
    Type: Application
    Filed: May 16, 2023
    Publication date: July 25, 2024
    Applicants: KING SLIDE WORKS CO., LTD., KING SLIDE TECHNOLOGY CO.,LTD.
    Inventors: Ken-Ching Chen, Shih-Lung Huang, Yi-Syuan Jhao, Chun-Chiang Wang
  • Publication number: 20240249494
    Abstract: An environment managing and monitoring system and a method using same are provided. The environment managing and monitoring system is configured to assist monitors to obtain real-time information of the monitoring field and control device in the monitoring field. The environmental managing and monitoring system includes at least one sub-system and a host system. The host system is configured to output a region of interest condition and a monitoring condition to the sub-system, wherein the sub-system is configured to generate monitoring results according to the monitoring conditions, and selects an image range from the captured wide-angle dynamic real-time images according to the region of interest condition.
    Type: Application
    Filed: September 4, 2023
    Publication date: July 25, 2024
    Inventors: Yung-tai SU, Hsin-lung HSIEH, Yu-hsuan LIAO, Yu-min CHUANG, Pang-tzu LIU, Chun-yueh CHEN, Jia-hao LU, Cheng-ju HSUIEH, Ching-wei LEE, Tsung-hsun TSAI, Po-yuan KUO, Po-yi WU, Chen-wei CHOU
  • Publication number: 20240235355
    Abstract: A button mechanism is provided, including a button element, a magnet connected to the button, a hollow tube, a first coil, and a second coil. The first and second coils are disposed on the tube. When the first coil generates a first magnetic field, the magnet is magnetically attracted by the first coil, and the button element is positioned in the first position. When the second coil generates a second magnetic field, the magnet is attracted by the second coil, and the button element is positioned in the second position.
    Type: Application
    Filed: January 13, 2023
    Publication date: July 11, 2024
    Inventors: Chun-Lung CHEN, Chih-Ching HSIEH, Chun-Feng YEH
  • Patent number: 12001026
    Abstract: A head-mounted display includes a display device, a connecting structure and a head abutting portion. The connecting structure is in a shape of strip. The connecting structure has two opposite ends. The ends are respectively connected with the display device. The connecting structure and the display device define an accommodation space. The accommodation space is configured to accommodate a head of a user. The head abutting portion is pivotally connected with the connecting structure. The head abutting portion is at least partially located between the connecting structure and the display device. The head abutting portion is configured to abut against the head of the user.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: June 4, 2024
    Assignee: Quanta Computer Inc.
    Inventors: Hung-Yu Lin, Chun-Feng Yeh, Jia-Cheng Chang, Bing-Kai Huang, Chun-Nan Huang, Chun-Lung Chen
  • Patent number: 11990346
    Abstract: A method for a clean procedure during manufacturing a semiconductor device, includes: providing a patterned sacrificial gate structure including a gate dielectric and a sacrificial layer; wherein the patterned sacrificial gate structure is embedded in a dielectric layer and an upper surface of the sacrificial layer is exposed; performing a first etching process to remove the sacrificial layer; and performing a hydrophilic treatment and a hydrophobic treatment to remove a residue of the sacrificial layer.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: May 21, 2024
    Assignee: UNITED MICROELECTRONICS CORP
    Inventors: Chuan-Chang Wu, Zhen Wu, Hsuan-Hsu Chen, Chun-Lung Chen
  • Publication number: 20240136905
    Abstract: A button mechanism is provided, including a button element, a magnet connected to the button, a hollow tube, a first coil, and a second coil. The first and second coils are disposed on the tube. When the first coil generates a first magnetic field, the magnet is magnetically attracted by the first coil, and the button element is positioned in the first position. When the second coil generates a second magnetic field, the magnet is attracted by the second coil, and the button element is positioned in the second position.
    Type: Application
    Filed: January 13, 2023
    Publication date: April 25, 2024
    Inventors: Chun-Lung CHEN, Chih-Ching HSIEH, Chun-Feng YEH
  • Publication number: 20240115938
    Abstract: A force feedback module is provided. The force feedback module includes a trigger element, an actuating element, and a transmission assembly disposed between the trigger element and the actuating element. The transmission assembly includes a first transmission element. The first transmission element and the trigger element change between a contact state and a non-contact state. When the first transmission element and the trigger element are in the contact state, a driving force generated by the actuating element is transmitted to the trigger element via the transmission assembly to generate force feedback.
    Type: Application
    Filed: December 29, 2022
    Publication date: April 11, 2024
    Inventors: Chun-Feng YEH, Chun-Lung CHEN
  • Publication number: 20240047225
    Abstract: A control method of a multi-stage etching process and a processing device using the same are provided. The control method of the multi-stage etching process includes the following step S. A stack information of a plurality of hard mask layers is set. An etching target condition is set. Through a machine learning model, a parameter setting recipe of the hard mask layers is generated under the etching target condition. The machine learning model is trained based on the stack information of the hard mask layers, a plurality of process parameters and a process result.
    Type: Application
    Filed: September 6, 2022
    Publication date: February 8, 2024
    Inventors: Liang Ju WEI, Chung-Yi CHIU, Zhen WU, Hsuan-Hsu CHEN, Chun-Lung CHEN
  • Patent number: 11881409
    Abstract: A method of cutting fins includes the following steps. A photomask including a snake-shape pattern is provided. A photoresist layer is formed over fins on a substrate. A photoresist pattern in the photoresist layer corresponding to the snake-shape pattern is formed by exposing and developing. The fins are cut by transferring the photoresist pattern and etching cut parts of the fins.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: January 23, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Hao Huang, Chun-Lung Chen, Kun-Yuan Liao, Lung-En Kuo, Chia-Wei Hsu
  • Publication number: 20240016067
    Abstract: A magnetic memory including a substrate, a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ) stack, a first protection layer, and a second protection layer is provided. The SOT layer is located over the substrate. The MTJ stack is located on the SOT layer. The first protection layer and the second protection layer are located on the sidewall of the MTJ stack. The first protection layer is located between the second protection layer and the MTJ stack. There is a notch between the second protection layer and the SOT layer.
    Type: Application
    Filed: August 10, 2022
    Publication date: January 11, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chih-Wei Kuo, Chung Yi Chiu, Yi-Wei Tseng, Hsuan-Hsu Chen, Chun-Lung Chen
  • Publication number: 20240016062
    Abstract: A method of fabricating an MTJ device is provided including the following process. A first via is formed in the first dielectric layer. A first electrode layer is formed on the first dielectric layer and the first via. An MTJ stack layer is formed on the first electrode layer. A patterned second electrode layer is formed on the MTJ stack layer and used as a mask. A first ion beam etching process is performed to etch the patterned second electrode layer and pattern the MTJ stack layer and the first electrode layer to form a second electrode, an MTJ stack structure, and a first electrode. A first protective layer is formed to cover the second electrode and the MTJ stack structure. A second ion beam etching process is performed to remove a portion of the MTJ stack structure and a portion of the first electrode.
    Type: Application
    Filed: July 27, 2022
    Publication date: January 11, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Shun-Yu Huang, Yi-Wei Tseng, Chih-Wei Kuo, Yi-Xiang Chen, Hsuan-Hsu Chen, Chun-Lung Chen
  • Publication number: 20240006525
    Abstract: A method for manufacturing a high electron mobility transistor device includes providing a substrate. A channel material, a barrier material, a polarization adjustment material and a conductive material are formed on the substrate. A hard mask layer is formed on the conductive material. The conductive material is patterned to form a conductive layer by using the hard mask layer as a mask. A plurality of protection layers is formed on sidewalls of the hard mask layer and the conductive layer. The polarization adjustment material is patterned to form a polarization adjustment layer by using the plurality of protection layers and the hard mask as masks. The plurality of protection layers is removed. A portion of the conductive layer is laterally removed to form a first gate conductive layer.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 4, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Yuan Yu Chung, Bo-Yu Chen, You-Jia Chang, Lung-En Kuo, Kun-Yuan Liao, Chun-Lung Chen
  • Publication number: 20230411213
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming a contact etch stop layer (CESL) on the gate structure, forming an interlayer dielectric (ILD) layer on the CESL, forming a contact plug in the ILD layer and adjacent to the gate structure, forming a first stop layer on the ILD layer, and removing the first stop layer and the ILD layer around the gate structure to form an air gap exposing the CESL.
    Type: Application
    Filed: July 20, 2022
    Publication date: December 21, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Wen Zhang, Ming-Chou Lu, Kun-Chen Ho, Dien-Yang Lu, Chun-Lung Chen, Chung-Yi Chiu
  • Publication number: 20230411489
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an interlayer dielectric (ILD) layer on the gate structure, forming a contact hole in the ILD layer adjacent to the gate structure, performing a plasma doping process to form a doped layer in the ILD layer and a source/drain region adjacent to the gate structure, forming a conductive layer in the contact hole, planarizing the conductive layer to form a contact plug, removing the doped layer to form an air gap adjacent to the contact plug, and then forming a stop layer on the ILD layer and the contact plug.
    Type: Application
    Filed: July 19, 2022
    Publication date: December 21, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Wen Zhang, Kun-Chen Ho, Chun-Lung Chen, Chung-Yi Chiu, Ming-Chou Lu
  • Publication number: 20230403946
    Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.
    Type: Application
    Filed: August 28, 2023
    Publication date: December 14, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Laio, Yu-Tsung Lai, Wei-Hao Huang
  • Publication number: 20230354715
    Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.
    Type: Application
    Filed: June 27, 2023
    Publication date: November 2, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang
  • Patent number: 11800664
    Abstract: A wearable device, which is worn on a user's head, includes a front assembly, a rear assembly, and a connecting assembly. The connecting assembly connects the front assembly and the rear assembly, wherein the front assembly may be rotated by an angle relative to the rear assembly via the connecting assembly.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: October 24, 2023
    Assignee: QUANTA COMPUTER INC.
    Inventors: Shan-Peng Lai, Cheng-Wei Wu, Chun-Lung Chen, Heng-Min Hu
  • Publication number: 20230333346
    Abstract: An optical adjustment mechanism of wearable device includes a fixed portion, a movable portion, and an adjusting element. The fixed portion includes an outer frame connected with a first optical element, and the first optical element has an optical axis, wherein the outer frame forms a sectional plane along a direction parallel to the optical axis. The movable portion is movable relative to the fixed portion, and includes a holder. The holder holds a second optical element and is movably connected to the outer frame. The adjusting element connects the movable portion and the fixed portion, wherein the movable portion may be moved relative to the fixed portion by the adjusting element.
    Type: Application
    Filed: August 17, 2022
    Publication date: October 19, 2023
    Inventors: Chung-Yu CHIU, Chun-Lung CHEN
  • Publication number: 20230320229
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first ultra low-k (ULK) dielectric layer on the first MTJ; performing a first etching process to remove part of the first ULK dielectric layer and form a damaged layer on the first ULK dielectric layer; and forming a second ULK dielectric layer on the damaged layer.
    Type: Application
    Filed: May 10, 2023
    Publication date: October 5, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Tai-Cheng Hou, Wei-Xin Gao, Fu-Yu Tsai, Chin-Yang Hsieh, Chen-Yi Weng, Jing-Yin Jhang, Bin-Siang Tsai, Kun-Ju Li, Chih-Yueh Li, Chia-Lin Lu, Chun-Lung Chen, Kun-Yuan Liao, Yu-Tsung Lai, Wei-Hao Huang