Patents by Inventor Chun Wen

Chun Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200333865
    Abstract: A holster is provided to receive a radio (mobile communications device). The radio is operatively equipped with a front-facing touchscreen. The holster is equipped with an optical reflector. The optical reflector is adapted to change the direction of light rays passing through it in order to reflect only a portion of the front-facing touchscreen to a top window located within the holster. The top window and the touchscreen are substantially perpendicular to each other. The holster is equipped with at least one capacitive touch extension element that couples the top window to a point on the touchscreen to control an interface element on the touchscreen.
    Type: Application
    Filed: April 22, 2019
    Publication date: October 22, 2020
    Inventors: WAI MUN LEE, WOOI PING TEOH, CHUN WEN OOI
  • Publication number: 20200322733
    Abstract: AMEMS microphone includes a backplate that has a plurality of open areas, and a diaphragm spaced apart from the backplate. The diaphragm is deformable by sound waves to cause gaps between the backplate and the diaphragm being changed at multiple locations on the diaphragm. The diaphragm includes a plurality of anchor areas, located near a boundary of the diaphragm, which is fixed relative to the backplate. The diaphragm also includes multiple vent valves. Examples of the vent valve include a wing vent valve and a vortex vent valve.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Chun Yin Tsai
  • Publication number: 20200317506
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 10779100
    Abstract: An embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: September 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Chun-wen Cheng, Chin-Yi Cho, Li-Min Hung, Yao-Te Huang
  • Patent number: 10752497
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Patent number: 10745271
    Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: August 18, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Patent number: 10746693
    Abstract: A device includes a biosensor, a sensing circuit electrically connected to the biosensor, a quantizer electrically connected to the sensing circuit, a digital filter electrically connected to the quantizer, a selective window electrically connected to the digital filter, and a decision unit electrically connected to the selective window.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: August 18, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Jui-Cheng Huang, Yi-Shao Liu, Chun-Wen Cheng, Tung-Tsun Chen, Chin-Hua Wen
  • Patent number: 10734323
    Abstract: A package structure includes at least one integrated circuit component, an insulating encapsulation, and a redistribution structure. The at least one integrated circuit component includes a semiconductor substrate, an interconnection structure disposed on the semiconductor substrate, and signal terminals and power terminals located on and electrically connecting to the interconnection structure. The interconnection structure is located between the semiconductor substrate and the signal terminals and between the semiconductor substrate and the power terminals, and where a size of the signal terminals is less than a size of the power terminals. The insulating encapsulation encapsulates the at least one integrated circuit component. The redistribution structure is located on the insulating encapsulation and electrically connected to the at least one integrated circuit component.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: August 4, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Lin, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Che-Wei Hsu
  • Patent number: 10727117
    Abstract: A method for manufacturing a semiconductor structure includes following operations. A sacrificial layer is formed over the conductive layer, wherein the sacrificial layer includes a first sacrificial portion over the first conductive portion, and a second sacrificial portion over the second conductive portion, and a first thickness of the first sacrificial portion is larger than a second thickness of the second sacrificial portion. The first sacrificial portion and the second sacrificial portion of the sacrificial layer, and the second conductive portion of the conductive layer are removed, with at least a portion of the first conductive portion remaining over the bottom of the trench.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: July 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Hsiang Liao, Ya-Huei Li, Li-Wei Chu, Chun-Wen Nieh, Hung-Yi Huang, Chih-Wei Chang, Ching-Hwanq Su
  • Publication number: 20200231431
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of vias, a signal transmitting portion, a heater and a sensing material. The plurality of vias penetrates the substrate, wherein each of the plurality of vias includes a conductive or semiconductive portion surrounded by an oxide layer. The signal transmitting portion is disposed in the substrate, wherein adjacent vias of the plurality of vias surrounds the signal transmitting portion. The heater is electrically connected to the signal transmitting portion, and the sensing material is disposed over the heater and electrically connected to the substrate. A method of manufacturing a semiconductor structure is also provided.
    Type: Application
    Filed: April 8, 2020
    Publication date: July 23, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 10715924
    Abstract: A MEMS microphone includes a backplate that has a plurality of open areas, and a diaphragm spaced apart from the backplate. The diaphragm is deformable by sound waves to cause gaps between the backplate and the diaphragm being changed at multiple locations on the diaphragm. The diaphragm includes a plurality of anchor areas, located near a boundary of the diaphragm, which is fixed relative to the backplate. The diaphragm also includes multiple vent valves. Examples of the vent valve include a wing vent valve and a vortex vent valve.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Chun Yin Tsai
  • Patent number: 10710871
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 10714395
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate, an isolation feature between and adjacent to the first fin and the second fin, and a fin isolation structure between the first fin and the second fin. The fin isolation structure includes a first insulating layer partially embedded in the isolation feature, a second insulating layer having sidewall surfaces and a bottom surface that are covered by the first insulating layer, a first capping layer covering the second insulating layer and having sidewall surfaces that are covered by the first insulating layer, and a second capping layer having sidewall surfaces and a bottom surface that are covered by the first capping layer.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chu-An Lee, Chen-Hao Wu, Peng-Chung Jangjian, Chun-Wen Hsiao, Teng-Chun Tsai, Huang-Lin Chao
  • Publication number: 20200213701
    Abstract: An integrated microphone device is provided. The integrated microphone device includes a substrate, a plate, and a membrane. The substrate includes an aperture allowing acoustic pressure to pass through. The plate is disposed on a side of the substrate. The membrane is disposed between the substrate and the plate and movable relative to the plate as acoustic pressure strikes the membrane. The membrane includes a vent valve having an open area that is variable in response to a change in acoustic pressure.
    Type: Application
    Filed: March 10, 2020
    Publication date: July 2, 2020
    Inventors: Chun-Wen CHENG, Chia-Hua CHU, Chun-Yin TSAI, Tzu-Heng WU, Wen-Cheng KUO
  • Publication number: 20200213708
    Abstract: A headband adjustment structure includes a rotary adjusting assembly, a wearing unit having an adjustable accommodation space, a cable management module located between the wearing unit and the rotary adjusting assembly for carrying a cable, an adjustment gear set linkably coupled to the cable management module, and a driving rotation shaft set passing through the wearing unit and the cable management module, and linkably coupled to the wearing unit and the adjustment gear set, and coaxially connected to the rotary adjusting assembly. When the rotary adjusting assembly rotates the driving rotation shaft set, the driving rotation shaft set synchronously moves the wearing unit to adjust the adjustable accommodation space, and moves the cable management module through the adjustment gear set. The amount of the movement of the cable management module is different from that of the wearing unit.
    Type: Application
    Filed: April 18, 2019
    Publication date: July 2, 2020
    Inventors: Chun-Wen Wang, Ko-Chun Wang, Chao Chien, Kok-Kan Chan, Chien-Yu Hou, Chun-Lung Chen
  • Publication number: 20200212242
    Abstract: A monofacial tube-type PERC solar cell includes a rear silver busbar (1), an all-aluminum rear electric field (2), a rear composite film (3), P-type silicon (5), an N-type emitter (6), a front passivation film (7), and a front silver electrode (8). The rear composite film (3) includes one or more of an aluminum oxide film, a silicon dioxide film, a silicon oxynitride film, and a silicon nitride film, and is deposited on a rear surface of a silicon wafer by a tubular PECVD device. The tubular PECVD device includes four gas lines of silane, ammonia, trimethyl aluminum, and nitrous oxide. Such monofacial tube-type PERC solar cell has advantages of high photoelectric conversion efficiency, high appearance quality and high electroluminescence yield, and solves the problems of scratching and undesirable coating due to the process.
    Type: Application
    Filed: May 25, 2017
    Publication date: July 2, 2020
    Inventors: Jiebin FANG, Kang-Cheng LIN, Chun-Wen LAI, Nailin HE, Wenjie YIN, Ta-neng HO, Gang CHEN
  • Patent number: 10700177
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate including a conductive region made of silicon, germanium or a combination thereof. The method also includes forming an insulating layer over the semiconductor substrate and forming an opening in the insulating layer to expose the conductive region. The method also includes performing a deposition process to form a metal layer over a sidewall and a bottom of the opening, so that a metal silicide or germanide layer is formed on the exposed conductive region by the deposition process. The method also includes performing a first in-situ etching process to etch at least a portion of the metal layer and forming a fill metal material layer in the opening.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: June 30, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Min-Hsiu Hung, Yi-Hsiang Chao, Kuan-Yu Yeh, Kan-Ju Lin, Chun-Wen Nieh, Huang-Yi Huang, Chih-Wei Chang, Ching-Hwanq Su
  • Publication number: 20200199746
    Abstract: A coating device for a tube-type PERC solar cell includes a wafer loading area, a furnace body, a gas cabinet, a vacuum system, a heating system, a control system and a graphite boat, wherein the gas cabinet is provided with a first gas line for feeding silane, a second gas line for feeding ammonia, a third gas line for feeding trimethylaluminum, a fourth gas line for feeding nitrous oxide, and a fifth gas line for feeding methane. The graphite boat is employed for loading and unloading a silicon wafer. Pre-processing is performed to the graphite boat before use or after several coating, wherein the pre-processing includes: baking the graphite boat and coating at least one layer of silicon carbide film on a surface of the baked graphite boat. The present application also discloses a coating method for a tube-type PERC solar cell.
    Type: Application
    Filed: June 7, 2017
    Publication date: June 25, 2020
    Inventors: Kang-Cheng LIN, Jiebin FANG, Chun-Wen LAI, Ta-neng HO, Gang CHEN
  • Patent number: 10689247
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20200176429
    Abstract: A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The three-dimensional package structure is applicable to a POL, (Point of Load) converter.
    Type: Application
    Filed: February 2, 2020
    Publication date: June 4, 2020
    Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen