Patents by Inventor Chun Yang
Chun Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128216Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.Type: ApplicationFiled: January 4, 2023Publication date: April 18, 2024Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
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Publication number: 20240124298Abstract: Microelectromechanical devices and methods of manufacture are presented. Embodiments include bonding a mask substrate to a first microelectromechanical system (MEMS) device. After the bonding has been performed, the mask substrate is patterned. A first conductive pillar is formed within the mask substrate, and a second conductive pillar is formed within the mask substrate, the second conductive pillar having a different height from the first conductive pillar. The mask substrate is then removed.Type: ApplicationFiled: January 10, 2023Publication date: April 18, 2024Inventors: Yun-Chung Wu, Jhao-Yi Wang, Hao Chun Yang, Pei-Wei Lee, Wen-Hsiung Lu
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Publication number: 20240128420Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.Type: ApplicationFiled: December 6, 2022Publication date: April 18, 2024Applicant: AUO CorporationInventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
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Publication number: 20240125713Abstract: A method includes directing light at a first side of a semiconductor structure; detecting a first light intensity at a second side of the semiconductor structure, wherein the first light intensity corresponds to the light that penetrated the semiconductor structure from the first side to the second side; and comparing the first light intensity to a second light intensity, wherein the second light intensity corresponds to an expected intensity of light.Type: ApplicationFiled: January 10, 2023Publication date: April 18, 2024Inventors: Hao Chun Yang, Ming-Da Cheng, Pei-Wei Lee, Mirng-Ji Lii
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Publication number: 20240128178Abstract: A method of forming a semiconductor structure is provided, and includes trimming a first substrate to form a recess on a sidewall of the first substrate. A conductive structure is formed in the first substrate. The method includes bonding the first substrate to a carrier. The method includes thinning down the first substrate. The method also includes forming a dielectric material in the recess and over a top surface of the thinned first substrate. The method further includes performing a planarization process to remove the dielectric material and expose the conductive structure over the top surface. In addition, the method includes removing the carrier from the first substrate.Type: ApplicationFiled: February 8, 2023Publication date: April 18, 2024Inventors: Yu-Hung LIN, Wei-Ming WANG, Su-Chun YANG, Jih-Churng TWU, Shih-Peng TAI, Kuo-Chung YEE
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Patent number: 11960761Abstract: A memory control method is disclosed according to an embodiment. The method includes: temporarily storing first type data into a buffer memory, wherein the first type data is preset to be stored into a rewritable non-volatile memory module based on a first programming mode; in a state that the first type data is stored in the buffer memory, temporarily storing second type data into the buffer memory, and the second type data is preset to be stored into the rewritable non-volatile memory module based on a second programming mode different from the first programming mode; and in a state that a data volume of the first type data in the buffer memory does not reach a first threshold, if a data volume of the second type data in the buffer memory reaches a second threshold, storing the first type data in the buffer memory into the rewritable non-volatile memory module.Type: GrantFiled: December 11, 2020Date of Patent: April 16, 2024Assignee: PHISON ELECTRONICS CORP.Inventors: Chun-Yang Hu, Yi-Tein Hung
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Publication number: 20240120405Abstract: A semiconductor device includes a gate structure on a substrate, in which the gate structure includes a main branch extending along a first direction on the substrate and a sub-branch extending along a second direction adjacent to the main branch. The semiconductor device also includes a first doped region overlapping the main branch and the sub-branch according to a top view and a second doped region overlapping the first doped region.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Heng-Ching Lin, Yu-Teng Tseng, Chu-Chun Chang, Kuo-Yuh Yang, Chia-Huei Lin
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Publication number: 20240121899Abstract: An electronic device includes a substrate, a plurality of flexible circuit boards, a plurality of ICs and an insulator. The flexible circuit boards are disposed on the substrate. In a top view of the electronic device, the flexible circuit boards are overlapped with an edge of the substrate. The ICs are disposed on the substrate. The insulator is disposed on the flexible circuit boards and contacted the ICs, wherein the insulator has a first side and a second side opposite to the first side and the first side is closer to the edge than the second side. Along a first direction perpendicular to an extension direction of the edge, a first minimum distance between the second side and one of the ICs is less than a second minimum distance between the second side and one of the flexible circuit boards.Type: ApplicationFiled: December 19, 2023Publication date: April 11, 2024Inventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
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Patent number: 11955154Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.Type: GrantFiled: May 16, 2022Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
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Patent number: 11954758Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for dynamic wave pairing. A graphics processor may allocate one or more GPU workloads to one or more wave slots of a plurality of wave slots. The graphics processor may select a first execution slot of a plurality of execution slots for executing the one or more GPU workloads. The selection may be based on one of a plurality of granularities. The graphics processor may execute, at the selected first execution slot, the one or more GPU workloads at the one of the plurality of granularities.Type: GrantFiled: February 24, 2022Date of Patent: April 9, 2024Assignee: QUALCOMM IncorporatedInventors: Yun Du, Andrew Evan Gruber, Zilin Ying, Chunling Hu, Baoguang Yang, Yang Xia, Gang Zhong, Chun Yu, Eric Demers
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Patent number: 11950670Abstract: A waterproof container is adapted for an electronic device with a touch screen. The waterproof container includes an upper component and a lower component. The upper component includes a first layer, a second layer and a third layer. The second layer is disposed between the first layer and the third layer. A second touched part of the second layer is connected to a first touched part of the first layer by a plurality of first connections. The second touched part of the second layer is connected to a third touched part of the third layer by a plurality of second connections, and the plurality of first connections and the plurality of second connections are staggered relative to each other. The lower component is connected to the upper component. An accommodating space is enclosed by the lower component and the upper component for accommodating the electronic device.Type: GrantFiled: December 27, 2021Date of Patent: April 9, 2024Assignee: Universal Trim Supply Co., Ltd.Inventors: Chih-Wei Yang, Shih-Sheng Yang, Hou-Chun Yang
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Patent number: 11955378Abstract: A bonding method of package components and a bonding apparatus are provided. The method includes: providing at least one first package component and a second package component, wherein the at least one first package component has first electrical connectors and a first dielectric layer at a bonding surface of the at least one first package component, and the second package component has second electrical connectors and a second dielectric layer at a bonding surface of the second package component; bringing the at least one first package component and the second package component in contact, such that the first electrical connectors approximate or contact the second electrical connectors; and selectively heating the first electrical connectors and the second electrical connectors by electromagnetic induction, in order to bond the first electrical connectors with the second electrical connectors.Type: GrantFiled: July 29, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Li Hsiao, Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang
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Publication number: 20240113262Abstract: A light-emitting device includes: a semiconductor stack, including a first semiconductor layer, an active region and a second semiconductor layer; a first contact electrode and a second contact electrode formed on the semiconductor stack, wherein the first contact electrode includes a first contact part formed on the first semiconductor layer and the second contact electrode includes a second contact part formed on the second semiconductor layer; an insulating stack formed on the semiconductor stack, including an opening on the second contact part; a first electrode pad and a second electrode pad formed on the insulating stack, wherein the second electrode pad filled in the opening and connecting the second contact part; wherein the second electrode pad includes an upper surface, and the upper surface includes a platform area and a depression area on the second contact part; wherein the platform area has a maximum height relative to other areas of the upper surface; wherein an area of a projection of the platType: ApplicationFiled: September 1, 2023Publication date: April 4, 2024Inventors: Hsin-Ying WANG, Hui-Chun YEH, Jhih-Yong YANG, Chen OU, Cheng-Lin LU
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Patent number: 11946592Abstract: A bracket is provided. The bracket includes a fixing seat and a holding seat. The fixing seat has a first extending direction and includes at least one first contacting end surface, and a first angle is contained between the at least one first contacting end surface and the first extending direction. The holding seat is detachably connected to the fixing seat with a bend angle to form a bend structure, and the holding seat includes at least one second contacting end surface corresponding to the at least one first contacting end surface. The at least one first contacting end surface and the at least one second contacting end surface are located near or at a bend portion of the bend structure.Type: GrantFiled: May 20, 2022Date of Patent: April 2, 2024Assignee: WISTRON NEWEB CORPORATIONInventors: Lan-Chun Yang, Bing-Chun Chung, Li-Hsien Peng, Yi-Chieh Lin
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Patent number: 11949214Abstract: An electric power distribution panel is provided. The electric power distribution panel includes a first input bus, a second input bus, a plurality of brackets and a plurality of circuit breaker modules. The first and second input buses are coupled to a first power source and a second power source respectively. The plurality of brackets is electrically connected to the first and second input buses. The plurality of circuit breaker modules are assembled to the plurality of brackets respectively. Each of the plurality of circuit breaker modules includes a circuit breaker and an adapter detachably assembled to the circuit breaker. In each of the plurality of circuit breaker modules, the circuit breaker is electrically connected to the first input bus when the adapter is removed from the circuit breaker, and the circuit breaker is electrically connected to the second input bus when the adapter is assembled to the circuit breaker.Type: GrantFiled: September 21, 2020Date of Patent: April 2, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Simon Hoi-Keung Yu, Vincent Mark Byrne, Shan-Chun Yang
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Patent number: 11939603Abstract: A modified cutinase is disclosed. The cutinase has the modified amino acid sequence of SEQ ID NO: 2, wherein the modification is a substitution of asparagine at position 181 with alanine, or substitutions of asparagine at position 181 with alanine and phenylalanine at position 235 with leucine. The modified enzyme has improved PET-hydrolytic activity, and thus, the high-activity PET hydrolase is obtained, and the industrial application value of the PET hydrolase is enhanced.Type: GrantFiled: June 21, 2023Date of Patent: March 26, 2024Assignee: HUBEI UNIVERSITYInventors: Chun-Chi Chen, Jian-Wen Huang, Jian Min, Xian Li, Beilei Shi, Panpan Shen, Yu Yang, Yumei Hu, Longhai Dai, Lilan Zhang, Yunyun Yang, Rey-Ting Guo
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Patent number: 11941157Abstract: A computer implemented method for managing the scope of permissions granted by users to application that includes collecting a set of permissions for an application from an application provider publication; and collecting a process flow for functional steps of the application from a review of the application that is published on a product review type publication. The computer implemented method further includes dividing the functional steps of the application into a plurality of journeys, each of said plurality of journeys having a function associated with a stage of a functional step from a perspective of a user; and matching permissions from the set of permissions for each journey of said plurality of journeys to provide matched permissible permissions to journeys stored in a customer journey store.Type: GrantFiled: December 16, 2020Date of Patent: March 26, 2024Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hao Chun Hung, Po-Cheng Chiu, Tsai-Hsuan Hsieh, Cheng-Lun Yang, Chiwen Chang, Shin Yu Wey
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Patent number: 11942169Abstract: A semiconductor memory device includes a first word line formed over a first active region. In some embodiments, a first metal line is disposed over and perpendicular to the first word line, where the first metal line is electrically connected to the first word line using a first conductive via, and where the first conductive via is disposed over the first active region. In some examples, the semiconductor memory device further includes a second metal line and a third metal line both parallel to the first metal line and disposed on opposing sides of the first metal line, where the second metal line is electrically connected to a source/drain region of the first active region using a second conductive via, and where the third metal line is electrically connected to the source/drain region of the first active region using a third conductive via.Type: GrantFiled: July 20, 2022Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsin-Wen Su, Kian-Long Lim, Wen-Chun Keng, Chang-Ta Yang, Shih-Hao Lin
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Patent number: 11942130Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.Type: GrantFiled: March 23, 2022Date of Patent: March 26, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
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Publication number: 20240098183Abstract: A marking method on image combined with sound signal, a terminal apparatus, and a server are provided. In the method, a first image is displayed. A selection command is detected. A target sound signal is embedded into a speech signal so as to generate a combined sound signal. The combined sound signal is transmitted. The selection command corresponds to a target region in the first image, and the selection command is generated selecting the target region through an input operation. The target sound signal corresponds to the target region of the selection command, and the speech signal is obtained by receiving sound. Accordingly, all attendants in the video conference are able to make makings on a shared screen.Type: ApplicationFiled: November 21, 2022Publication date: March 21, 2024Applicant: Acer IncorporatedInventors: Po-Jen Tu, Ming-Chun Fang, Jia-Ren Chang, Kai-Meng Tzeng, Chao-Kuang Yang