Abstract: A semiconductor device includes a substrate, one or more wiring layers disposed over the substrate, a passivation layer disposed over the one or more wiring layers, a first conductive layer disposed over the passivation layer, a second conductive layer disposed over the first conductive layer, an isolation structure formed in the first and second conductive layers to isolate a part of the first and second conductive layers, and a first metal pad disposed over the isolation structure and the part of the first and second conductive layers. In one or more of the foregoing or following embodiments, the semiconductor device further includes a second metal pad disposed over the second conductive layer and electrically isolated from the first metal pad.

Abstract: A method of performing intersystem change without N26 interface supported or not supported when a UE is registered to the same or different networks over 3GPP and non-3GPP accesses is proposed. UE registers to one or more PLMN/SNPN over 3GPP access and non-3GPP access. UE receives a REGISTRATION ACCEPT message over 3GPP access, which carries a first 5GS network feature support IE, which indicates that interworking without N26 interface not supported. UE also receives a REGISTRATION ACCEPT message over non-3GPP access, which carries a second 5GS network feature support IE, which indicates that interworking without N26 interface supported. UE ignores the second indication received over non-3GPP access and considers that N26 interface is supported for interworking. As a result, after intersystem change from 5G to 4G, UE triggers a TAU procedure over LTE in 4G EPS.

Abstract: A method of determining UE registration status for a UE that is registered to different PLMN networks over 3GPP and non-3GPP accesses is proposed. The UE triggers registration to a second Public Land Mobile Network (PLMN) or Standalone Non-Public Network (SNPN) over a second access, and receives a REGISTRATION ACCEPT message from the second network over the second access. The REGISTRATION ACCEPT message carries a 5GS registration result IE having a 5GS registration result value. If the 5GS registration result value indicates that the UE is registered (or not registered) to a first network over a first access, then the UE may ignore the indication and considers the UE is not registered (or registered) to the first network over the first access.

Abstract: A method of determining UE access identity for a UE that is registered to the same or different PLMN networks over 3GPP and non-3GPP accesses is proposed. The UE registers to one or more Public Land Mobile Network (PLMN) or Standalone Non-Public Network (SNPN) over 3GPP access and non-3GPP access. If the UE registers to the same PLMN/SNPN over 3GPP and non-3GPP access, then the UE handles the UE access identity as one common parameters. On the other hand, if the UE registers to different PLMN/SNPN over 3GPP and non-3GPP, then the UE handles the UE access identity as two independent parameters. The access identity may comprise a priority indicator IE that is set to “Access Identity 1 valid” for MPS or “Access Identity 2 valid” for MCS.

Abstract: A display device includes a first substrate, a second substrate, a plurality of drive ICs and at least one flexible circuit board. The first substrate has a first region and a second region near to the first region. The second substrate is disposed on the first region and has a lateral side. The plurality of drive ICs are disposed on the second region and arranged along the lateral side. The at least one flexible circuit board is disposed on the second region and disposed correspondingly to the lateral side. Wherein in a top view of the display device, each of the plurality of drive ICs does not overlap with the at least one flexible circuit board in a direction perpendicular to an extending direction of the lateral side.

Abstract: Provided are interfering RNAs (e.g., siRNAs) targeting SARS-CoV (e.g., the POL, Spike, Helicase, or Envelop gene thereof) and therapeutic uses thereof for inhibiting SARS-CoV infection and/or treating diseases associated with the infection (e.g., COVID-19).

Abstract: A power system is provided, including a power module, a plurality of first electric apparatus safety devices, and a plurality of second electric apparatus safety devices. The first electric apparatus safety devices and second electric apparatus safety devices are arranged along a first direction of the power system. The first electric apparatus safety devices, the second electric apparatus safety devices, and the power module are stacked along a second direction of the power system, wherein the first direction is perpendicular to the second direction.

Abstract: A scroll compressor comprises a partition plate, a compression mechanism, a capacity adjustment device and a sealing assembly. The sealing assembly isolates a back pressure chamber from a high-pressure space and low-pressure space. A first sealing portion is formed between the sealing assembly and the partition plate. The capacity adjustment device is provided with a variable pressure chamber and configured to establish or break the communication between a first compression chamber and the low pressure space by changing the pressure in the variable pressure chamber. According to the compressor, requirements for pressure in the back pressure chamber of the compressor in different load conditions can be balanced, the axial force on the compression mechanism can be reduced, the power consumption of the scroll compressor can be lowered, the system performance can be improved, and the manufacturing cost can be reduced.

Abstract: A chuck vacuum line of a semiconductor processing tool includes a first portion that penetrates a sidewall of a main pumping line of the semiconductor processing tool. The chuck vacuum line includes a second portion that is substantially parallel to the sidewall of the main pumping line and to a direction of flow in the main pumping line. A size of the second portion increases between an inlet end of the second portion and an outlet end of the second portion along the direction of flow in the main pumping line.

Abstract: A light source module includes a light guide plate, a light-emitting element, and first and second prism sheets. One of the light-emitting surface and the bottom surface of the light guide plate has strip-shaped microstructures. The bottom surface has bottom microstructures, and the angle between the first surface of each bottom microstructure and the bottom surface is 1° to 17°. The first prism sheet is disposed on the light-emitting surface and between the light-emitting surface and the second prism sheet and includes first prism rods. The second prism sheet includes second prism rods. The aspect ratio of the strip-shaped microstructure is greater than 0.2. The angle between the maximum luminance direction of the light from the light-emitting surface and the normal direction of the light-emitting surface is less than 70°. The light-emitting angle range is less than 40°. A display device including the light source module is also provided.

Abstract: A circuit is disclosed, in accordance with some embodiments. The circuit includes a transistor stage, a resistive element, a first tunable capacitive element and a second tunable capacitive element. The transistor stage includes a first input/output terminal and a second input/output terminal. The resistive element is connected to the transistor stage. The first tunable capacitive element is connected in parallel with the resistive element. The second tunable capacitive element is connected to the second input/output terminal of the transistor stage. The first tunable capacitive element and the second tunable capacitive element are configured to be selectively turned on and off to provide different frequency responses.

Abstract: Provided is a device including a fin structure and methods for forming such a device. A method includes forming an initial fin having a sidewall. Further, the method includes forming an additional layer of fin material over the sidewall, wherein the additional layer has a thickness. Also, the method includes adjusting the thickness of the additional layer of fin material to form a fin structure with a desired critical dimension.

Abstract: A case for receiving at least one electronic device is provided, including a housing, a hinge, a locking member, and a cover. The housing has an accommodating space and an opening communicated with the accommodating space. The hinge is slidably connected to the housing. The cover has an upper side, a lower side, and an outer surface. The lower side is pivotally connected to the hinge. When the locking member affixes the upper side to the housing and the hinge is in a first position relative to the housing, the cover is disposed between an environment space and the accommodating space, and the outer surface faces the environment space. When the locking member is released and the hinge moves to a second position relative to the housing, the cover leaves the position between the environment space and the accommodating space, and the outer surface faces the environment space.

Abstract: An electronic device includes a first substrate; a second substrate arranged opposite to the first substrate; a first electrode layer disposed on the first substrate; a display medium layer disposed between the first electrode layer and the second substrate; and a first metal element, wherein the first metal element is fixed on the first electrode layer through a conductive glue and an insulating glue; wherein in a normal direction of the first substrate, the conductive glue and the insulating glue are overlapped.

Abstract: A manufacturing method of an elastic paint is provided. The manufacturing method includes: blending an original composition to produce a first rough painting material, where the original composition includes polycarbonatediol (PCDL), a polyurethane (PU) elastic powder, poly(methyl methacrylate) (PMMA), a photoinitiator, a wetting agent, a solvent, and an auxiliary agent; carrying out precipitation treatment on the first rough painting material, and filtering the treated first rough painting material, to produce a second rough painting material; blending the second rough painting material; sealing the blended second rough painting material to produce a plurality of layers in the second rough painting material; removing an upper portion and a lower portion from the layers to produce a main ingredient; and adding a curing agent and a diluent into the main ingredient to produce an elastic paint.

Abstract: A semiconductor package according to the present disclosure includes a routing structure, a first die and a second die disposed over the routing structure, a first array of contact features disposed along a first direction and electrically coupling the first die to the routing structure, and a second array of contact features disposed along the first direction and electrically coupling the second die to the routing structure. The routing structure includes a plurality of metal lines and each of the plurality of metal lines electrically connects one of the first array of contact features and one of the second array of contact features. Each of the plurality of metal lines comprises at least two 90-degree turns on a horizontal plane.

Abstract: A charging system includes a source terminal and a sink terminal. The control method of the charging system includes transmitting a bus voltage by the source terminal, determining whether the sink terminal has entered a sink attached state when the sink terminal receives the bus voltage, enabling a message transceiver of the sink terminal if the sink terminal has entered the sink attached state, transmitting a source message to the transceiver of the sink terminal by the source terminal, transmitting a request message to the source terminal by the message transceiver of the sink terminal while the source terminal transmits the source message, and continuing to enable a communication function for communicating with the sink terminal and continuing to transmit the bus voltage to the sink terminal by the source terminal when the source terminal receives the request message.

Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.

Abstract: A first die includes a first substrate and a first interconnect structure. A second die is bonded to the first die and includes a second substrate and a second interconnect structure, such that the first and second interconnect structures are arranged between the first and second substrates. A redistribution layer (RDL) stack is arranged on an outer side of the first die opposite the first interconnect structure. A heat path includes a through substrate via (TSV) extending from a conductive layer in the first interconnect structure, through the first substrate, and into the RDL stack. An RDL dielectric material is included in the RDL stack and separates the heat path from an ambient environment. A thermal conductivity of the RDL dielectric is over twenty times a thermal conductivity of an interconnect dielectric material of the first interconnect structure or of the second interconnect structure.

Abstract: A die stacking structure, a semiconductor package and a method for forming the die stacking structure are provided. The die stacking structure includes a first device die; second device dies, bonded onto the first device die, and arranged side-by-side; and a stack of dielectric layers, extending in between the second device dies, and laterally enclosing each of the second device dies. The dielectric layers are respectively formed of a spin-on-glass (SOG) or a polymer, and a lower one of the dielectric layers has a thickness greater than a thickness of another one of the dielectric layers at a higher level.